STM32F10x Standard Peripherals Library
3.5.0
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This file contains all the functions prototypes for the DMA firmware library. More...
#include "stm32f10x.h"
Go to the source code of this file.
Data Structures | |
struct | DMA_InitTypeDef |
DMA Init structure definition. More... | |
Defines | |
#define | IS_DMA_ALL_PERIPH(PERIPH) |
#define | DMA_DIR_PeripheralDST ((uint32_t)0x00000010) |
#define | DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) |
#define | IS_DMA_DIR(DIR) |
#define | DMA_PeripheralInc_Enable ((uint32_t)0x00000040) |
#define | DMA_PeripheralInc_Disable ((uint32_t)0x00000000) |
#define | IS_DMA_PERIPHERAL_INC_STATE(STATE) |
#define | DMA_MemoryInc_Enable ((uint32_t)0x00000080) |
#define | DMA_MemoryInc_Disable ((uint32_t)0x00000000) |
#define | IS_DMA_MEMORY_INC_STATE(STATE) |
#define | DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) |
#define | DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) |
#define | DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) |
#define | IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) |
#define | DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) |
#define | DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) |
#define | DMA_MemoryDataSize_Word ((uint32_t)0x00000800) |
#define | IS_DMA_MEMORY_DATA_SIZE(SIZE) |
#define | DMA_Mode_Circular ((uint32_t)0x00000020) |
#define | DMA_Mode_Normal ((uint32_t)0x00000000) |
#define | IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) |
#define | DMA_Priority_VeryHigh ((uint32_t)0x00003000) |
#define | DMA_Priority_High ((uint32_t)0x00002000) |
#define | DMA_Priority_Medium ((uint32_t)0x00001000) |
#define | DMA_Priority_Low ((uint32_t)0x00000000) |
#define | IS_DMA_PRIORITY(PRIORITY) |
#define | DMA_M2M_Enable ((uint32_t)0x00004000) |
#define | DMA_M2M_Disable ((uint32_t)0x00000000) |
#define | IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) |
#define | DMA_IT_TC ((uint32_t)0x00000002) |
#define | DMA_IT_HT ((uint32_t)0x00000004) |
#define | DMA_IT_TE ((uint32_t)0x00000008) |
#define | IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) |
#define | DMA1_IT_GL1 ((uint32_t)0x00000001) |
#define | DMA1_IT_TC1 ((uint32_t)0x00000002) |
#define | DMA1_IT_HT1 ((uint32_t)0x00000004) |
#define | DMA1_IT_TE1 ((uint32_t)0x00000008) |
#define | DMA1_IT_GL2 ((uint32_t)0x00000010) |
#define | DMA1_IT_TC2 ((uint32_t)0x00000020) |
#define | DMA1_IT_HT2 ((uint32_t)0x00000040) |
#define | DMA1_IT_TE2 ((uint32_t)0x00000080) |
#define | DMA1_IT_GL3 ((uint32_t)0x00000100) |
#define | DMA1_IT_TC3 ((uint32_t)0x00000200) |
#define | DMA1_IT_HT3 ((uint32_t)0x00000400) |
#define | DMA1_IT_TE3 ((uint32_t)0x00000800) |
#define | DMA1_IT_GL4 ((uint32_t)0x00001000) |
#define | DMA1_IT_TC4 ((uint32_t)0x00002000) |
#define | DMA1_IT_HT4 ((uint32_t)0x00004000) |
#define | DMA1_IT_TE4 ((uint32_t)0x00008000) |
#define | DMA1_IT_GL5 ((uint32_t)0x00010000) |
#define | DMA1_IT_TC5 ((uint32_t)0x00020000) |
#define | DMA1_IT_HT5 ((uint32_t)0x00040000) |
#define | DMA1_IT_TE5 ((uint32_t)0x00080000) |
#define | DMA1_IT_GL6 ((uint32_t)0x00100000) |
#define | DMA1_IT_TC6 ((uint32_t)0x00200000) |
#define | DMA1_IT_HT6 ((uint32_t)0x00400000) |
#define | DMA1_IT_TE6 ((uint32_t)0x00800000) |
#define | DMA1_IT_GL7 ((uint32_t)0x01000000) |
#define | DMA1_IT_TC7 ((uint32_t)0x02000000) |
#define | DMA1_IT_HT7 ((uint32_t)0x04000000) |
#define | DMA1_IT_TE7 ((uint32_t)0x08000000) |
#define | DMA2_IT_GL1 ((uint32_t)0x10000001) |
#define | DMA2_IT_TC1 ((uint32_t)0x10000002) |
#define | DMA2_IT_HT1 ((uint32_t)0x10000004) |
#define | DMA2_IT_TE1 ((uint32_t)0x10000008) |
#define | DMA2_IT_GL2 ((uint32_t)0x10000010) |
#define | DMA2_IT_TC2 ((uint32_t)0x10000020) |
#define | DMA2_IT_HT2 ((uint32_t)0x10000040) |
#define | DMA2_IT_TE2 ((uint32_t)0x10000080) |
#define | DMA2_IT_GL3 ((uint32_t)0x10000100) |
#define | DMA2_IT_TC3 ((uint32_t)0x10000200) |
#define | DMA2_IT_HT3 ((uint32_t)0x10000400) |
#define | DMA2_IT_TE3 ((uint32_t)0x10000800) |
#define | DMA2_IT_GL4 ((uint32_t)0x10001000) |
#define | DMA2_IT_TC4 ((uint32_t)0x10002000) |
#define | DMA2_IT_HT4 ((uint32_t)0x10004000) |
#define | DMA2_IT_TE4 ((uint32_t)0x10008000) |
#define | DMA2_IT_GL5 ((uint32_t)0x10010000) |
#define | DMA2_IT_TC5 ((uint32_t)0x10020000) |
#define | DMA2_IT_HT5 ((uint32_t)0x10040000) |
#define | DMA2_IT_TE5 ((uint32_t)0x10080000) |
#define | IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) |
#define | IS_DMA_GET_IT(IT) |
#define | DMA1_FLAG_GL1 ((uint32_t)0x00000001) |
#define | DMA1_FLAG_TC1 ((uint32_t)0x00000002) |
#define | DMA1_FLAG_HT1 ((uint32_t)0x00000004) |
#define | DMA1_FLAG_TE1 ((uint32_t)0x00000008) |
#define | DMA1_FLAG_GL2 ((uint32_t)0x00000010) |
#define | DMA1_FLAG_TC2 ((uint32_t)0x00000020) |
#define | DMA1_FLAG_HT2 ((uint32_t)0x00000040) |
#define | DMA1_FLAG_TE2 ((uint32_t)0x00000080) |
#define | DMA1_FLAG_GL3 ((uint32_t)0x00000100) |
#define | DMA1_FLAG_TC3 ((uint32_t)0x00000200) |
#define | DMA1_FLAG_HT3 ((uint32_t)0x00000400) |
#define | DMA1_FLAG_TE3 ((uint32_t)0x00000800) |
#define | DMA1_FLAG_GL4 ((uint32_t)0x00001000) |
#define | DMA1_FLAG_TC4 ((uint32_t)0x00002000) |
#define | DMA1_FLAG_HT4 ((uint32_t)0x00004000) |
#define | DMA1_FLAG_TE4 ((uint32_t)0x00008000) |
#define | DMA1_FLAG_GL5 ((uint32_t)0x00010000) |
#define | DMA1_FLAG_TC5 ((uint32_t)0x00020000) |
#define | DMA1_FLAG_HT5 ((uint32_t)0x00040000) |
#define | DMA1_FLAG_TE5 ((uint32_t)0x00080000) |
#define | DMA1_FLAG_GL6 ((uint32_t)0x00100000) |
#define | DMA1_FLAG_TC6 ((uint32_t)0x00200000) |
#define | DMA1_FLAG_HT6 ((uint32_t)0x00400000) |
#define | DMA1_FLAG_TE6 ((uint32_t)0x00800000) |
#define | DMA1_FLAG_GL7 ((uint32_t)0x01000000) |
#define | DMA1_FLAG_TC7 ((uint32_t)0x02000000) |
#define | DMA1_FLAG_HT7 ((uint32_t)0x04000000) |
#define | DMA1_FLAG_TE7 ((uint32_t)0x08000000) |
#define | DMA2_FLAG_GL1 ((uint32_t)0x10000001) |
#define | DMA2_FLAG_TC1 ((uint32_t)0x10000002) |
#define | DMA2_FLAG_HT1 ((uint32_t)0x10000004) |
#define | DMA2_FLAG_TE1 ((uint32_t)0x10000008) |
#define | DMA2_FLAG_GL2 ((uint32_t)0x10000010) |
#define | DMA2_FLAG_TC2 ((uint32_t)0x10000020) |
#define | DMA2_FLAG_HT2 ((uint32_t)0x10000040) |
#define | DMA2_FLAG_TE2 ((uint32_t)0x10000080) |
#define | DMA2_FLAG_GL3 ((uint32_t)0x10000100) |
#define | DMA2_FLAG_TC3 ((uint32_t)0x10000200) |
#define | DMA2_FLAG_HT3 ((uint32_t)0x10000400) |
#define | DMA2_FLAG_TE3 ((uint32_t)0x10000800) |
#define | DMA2_FLAG_GL4 ((uint32_t)0x10001000) |
#define | DMA2_FLAG_TC4 ((uint32_t)0x10002000) |
#define | DMA2_FLAG_HT4 ((uint32_t)0x10004000) |
#define | DMA2_FLAG_TE4 ((uint32_t)0x10008000) |
#define | DMA2_FLAG_GL5 ((uint32_t)0x10010000) |
#define | DMA2_FLAG_TC5 ((uint32_t)0x10020000) |
#define | DMA2_FLAG_HT5 ((uint32_t)0x10040000) |
#define | DMA2_FLAG_TE5 ((uint32_t)0x10080000) |
#define | IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) |
#define | IS_DMA_GET_FLAG(FLAG) |
#define | IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) |
Functions | |
void | DMA_DeInit (DMA_Channel_TypeDef *DMAy_Channelx) |
Deinitializes the DMAy Channelx registers to their default reset values. | |
void | DMA_Init (DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct) |
Initializes the DMAy Channelx according to the specified parameters in the DMA_InitStruct. | |
void | DMA_StructInit (DMA_InitTypeDef *DMA_InitStruct) |
Fills each DMA_InitStruct member with its default value. | |
void | DMA_Cmd (DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState) |
Enables or disables the specified DMAy Channelx. | |
void | DMA_ITConfig (DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) |
Enables or disables the specified DMAy Channelx interrupts. | |
void | DMA_SetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber) |
Sets the number of data units in the current DMAy Channelx transfer. | |
uint16_t | DMA_GetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx) |
Returns the number of remaining data units in the current DMAy Channelx transfer. | |
FlagStatus | DMA_GetFlagStatus (uint32_t DMAy_FLAG) |
Checks whether the specified DMAy Channelx flag is set or not. | |
void | DMA_ClearFlag (uint32_t DMAy_FLAG) |
Clears the DMAy Channelx's pending flags. | |
ITStatus | DMA_GetITStatus (uint32_t DMAy_IT) |
Checks whether the specified DMAy Channelx interrupt has occurred or not. | |
void | DMA_ClearITPendingBit (uint32_t DMAy_IT) |
Clears the DMAy Channelx's interrupt pending bits. |
This file contains all the functions prototypes for the DMA firmware library.
THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
Definition in file stm32f10x_dma.h.