DMA_Exported_Functions

Functions
void	DMA_DeInit (DMA_Channel_TypeDef *DMAy_Channelx)
	Deinitializes the DMAy Channelx registers to their default reset values.
void	DMA_Init (DMA_Channel_TypeDef *DMAy_Channelx, DMA_InitTypeDef *DMA_InitStruct)
	Initializes the DMAy Channelx according to the specified parameters in the DMA_InitStruct.
void	DMA_StructInit (DMA_InitTypeDef *DMA_InitStruct)
	Fills each DMA_InitStruct member with its default value.
void	DMA_Cmd (DMA_Channel_TypeDef *DMAy_Channelx, FunctionalState NewState)
	Enables or disables the specified DMAy Channelx.
void	DMA_ITConfig (DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
	Enables or disables the specified DMAy Channelx interrupts.
void	DMA_SetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx, uint16_t DataNumber)
	Sets the number of data units in the current DMAy Channelx transfer.
uint16_t	DMA_GetCurrDataCounter (DMA_Channel_TypeDef *DMAy_Channelx)
	Returns the number of remaining data units in the current DMAy Channelx transfer.
FlagStatus	DMA_GetFlagStatus (uint32_t DMAy_FLAG)
	Checks whether the specified DMAy Channelx flag is set or not.
void	DMA_ClearFlag (uint32_t DMAy_FLAG)
	Clears the DMAy Channelx's pending flags.
ITStatus	DMA_GetITStatus (uint32_t DMAy_IT)
	Checks whether the specified DMAy Channelx interrupt has occurred or not.
void	DMA_ClearITPendingBit (uint32_t DMAy_IT)
	Clears the DMAy Channelx's interrupt pending bits.

---

Function Documentation

void DMA_ClearFlag

(

uint32_t

DMAy_FLAG

)

Clears the DMAy Channelx's pending flags.

Parameters:

DMAy_FLAG,:

specifies the flag to clear. This parameter can be any combination (for the same DMA) of the following values: DMA1_FLAG_GL1: DMA1 Channel1 global flag. DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. DMA1_FLAG_GL2: DMA1 Channel2 global flag. DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. DMA1_FLAG_GL3: DMA1 Channel3 global flag. DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. DMA1_FLAG_GL4: DMA1 Channel4 global flag. DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. DMA1_FLAG_GL5: DMA1 Channel5 global flag. DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. DMA1_FLAG_GL6: DMA1 Channel6 global flag. DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. DMA1_FLAG_GL7: DMA1 Channel7 global flag. DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. DMA2_FLAG_GL1: DMA2 Channel1 global flag. DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. DMA2_FLAG_GL2: DMA2 Channel2 global flag. DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. DMA2_FLAG_GL3: DMA2 Channel3 global flag. DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. DMA2_FLAG_GL4: DMA2 Channel4 global flag. DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. DMA2_FLAG_GL5: DMA2 Channel5 global flag. DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.

Return values:

None

Definition at line 523 of file stm32f10x_dma.c.

void DMA_ClearITPendingBit

(

uint32_t

DMAy_IT

)

Clears the DMAy Channelx's interrupt pending bits.

Parameters:

DMAy_IT,:

specifies the DMAy interrupt pending bit to clear. This parameter can be any combination (for the same DMA) of the following values: DMA1_IT_GL1: DMA1 Channel1 global interrupt. DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. DMA1_IT_GL2: DMA1 Channel2 global interrupt. DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. DMA1_IT_GL3: DMA1 Channel3 global interrupt. DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. DMA1_IT_GL4: DMA1 Channel4 global interrupt. DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. DMA1_IT_GL5: DMA1 Channel5 global interrupt. DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. DMA1_IT_GL6: DMA1 Channel6 global interrupt. DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. DMA1_IT_GL7: DMA1 Channel7 global interrupt. DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. DMA2_IT_GL1: DMA2 Channel1 global interrupt. DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. DMA2_IT_GL2: DMA2 Channel2 global interrupt. DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. DMA2_IT_GL3: DMA2 Channel3 global interrupt. DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. DMA2_IT_GL4: DMA2 Channel4 global interrupt. DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. DMA2_IT_GL5: DMA2 Channel5 global interrupt. DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.

Return values:

None

Definition at line 684 of file stm32f10x_dma.c.

void DMA_Cmd	(	DMA_Channel_TypeDef *	DMAy_Channelx,
		FunctionalState	NewState
	)

Enables or disables the specified DMAy Channelx.

Parameters:

DMAy_Channelx,:	where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.
NewState,:	new state of the DMAy Channelx. This parameter can be: ENABLE or DISABLE.

Return values:

None

Definition at line 294 of file stm32f10x_dma.c.

void DMA_DeInit

(

DMA_Channel_TypeDef *

DMAy_Channelx

)

Deinitializes the DMAy Channelx registers to their default reset values.

Parameters:

DMAy_Channelx,:

where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.

Return values:

None

Definition at line 108 of file stm32f10x_dma.c.

uint16_t DMA_GetCurrDataCounter

(

DMA_Channel_TypeDef *

DMAy_Channelx

)

Returns the number of remaining data units in the current DMAy Channelx transfer.

Parameters:

DMAy_Channelx,:

where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.

Return values:

The	number of remaining data units in the current DMAy Channelx transfer.

Definition at line 371 of file stm32f10x_dma.c.

FlagStatus DMA_GetFlagStatus

(

uint32_t

DMAy_FLAG

)

Checks whether the specified DMAy Channelx flag is set or not.

Parameters:

DMAy_FLAG,:

specifies the flag to check. This parameter can be one of the following values: DMA1_FLAG_GL1: DMA1 Channel1 global flag. DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. DMA1_FLAG_GL2: DMA1 Channel2 global flag. DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. DMA1_FLAG_GL3: DMA1 Channel3 global flag. DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. DMA1_FLAG_GL4: DMA1 Channel4 global flag. DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. DMA1_FLAG_GL5: DMA1 Channel5 global flag. DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. DMA1_FLAG_GL6: DMA1 Channel6 global flag. DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. DMA1_FLAG_GL7: DMA1 Channel7 global flag. DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. DMA2_FLAG_GL1: DMA2 Channel1 global flag. DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. DMA2_FLAG_GL2: DMA2 Channel2 global flag. DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. DMA2_FLAG_GL3: DMA2 Channel3 global flag. DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. DMA2_FLAG_GL4: DMA2 Channel4 global flag. DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. DMA2_FLAG_GL5: DMA2 Channel5 global flag. DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.

Return values:

The	new state of DMAy_FLAG (SET or RESET).

Definition at line 433 of file stm32f10x_dma.c.

ITStatus DMA_GetITStatus

(

uint32_t

DMAy_IT

)

Checks whether the specified DMAy Channelx interrupt has occurred or not.

Parameters:

DMAy_IT,:

specifies the DMAy interrupt source to check. This parameter can be one of the following values: DMA1_IT_GL1: DMA1 Channel1 global interrupt. DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. DMA1_IT_GL2: DMA1 Channel2 global interrupt. DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. DMA1_IT_GL3: DMA1 Channel3 global interrupt. DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. DMA1_IT_GL4: DMA1 Channel4 global interrupt. DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. DMA1_IT_GL5: DMA1 Channel5 global interrupt. DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. DMA1_IT_GL6: DMA1 Channel6 global interrupt. DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. DMA1_IT_GL7: DMA1 Channel7 global interrupt. DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. DMA2_IT_GL1: DMA2 Channel1 global interrupt. DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. DMA2_IT_GL2: DMA2 Channel2 global interrupt. DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. DMA2_IT_GL3: DMA2 Channel3 global interrupt. DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. DMA2_IT_GL4: DMA2 Channel4 global interrupt. DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. DMA2_IT_GL5: DMA2 Channel5 global interrupt. DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.

Return values:

The	new state of DMAy_IT (SET or RESET).

Definition at line 595 of file stm32f10x_dma.c.

void DMA_Init	(	DMA_Channel_TypeDef *	DMAy_Channelx,
		DMA_InitTypeDef *	DMA_InitStruct
	)

Initializes the DMAy Channelx according to the specified parameters in the DMA_InitStruct.

Parameters:

DMAy_Channelx,:	where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.
DMA_InitStruct,:	pointer to a DMA_InitTypeDef structure that contains the configuration information for the specified DMA Channel.

Return values:

None

Definition at line 202 of file stm32f10x_dma.c.

void DMA_ITConfig	(	DMA_Channel_TypeDef *	DMAy_Channelx,
		uint32_t	DMA_IT,
		FunctionalState	NewState
	)

Enables or disables the specified DMAy Channelx interrupts.

Parameters:

DMAy_Channelx,:	where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.
DMA_IT,:	specifies the DMA interrupts sources to be enabled or disabled. This parameter can be any combination of the following values: DMA_IT_TC: Transfer complete interrupt mask DMA_IT_HT: Half transfer interrupt mask DMA_IT_TE: Transfer error interrupt mask
NewState,:	new state of the specified DMA interrupts. This parameter can be: ENABLE or DISABLE.

Return values:

None

Definition at line 326 of file stm32f10x_dma.c.

void DMA_SetCurrDataCounter	(	DMA_Channel_TypeDef *	DMAy_Channelx,
		uint16_t	DataNumber
	)

Sets the number of data units in the current DMAy Channelx transfer.

Parameters:

DMAy_Channelx,:	where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.
DataNumber,:	The number of data units in the current DMAy Channelx transfer.

Note:

This function can only be used when the DMAy_Channelx is disabled.

Return values:

None.

Definition at line 353 of file stm32f10x_dma.c.

void DMA_StructInit

(

DMA_InitTypeDef *

DMA_InitStruct

)

Fills each DMA_InitStruct member with its default value.

Parameters:

DMA_InitStruct

: pointer to a DMA_InitTypeDef structure which will be initialized.

Return values:

None

Definition at line 259 of file stm32f10x_dma.c.