#include <core_cm3.h>

Field Documentation

__IO uint32_t DCRDR

Offset: 0x08 Debug Core Register Data Register

Definition at line 624 of file core_cm3.h.

__O uint32_t DCRSR

Offset: 0x04 Debug Core Register Selector Register

Definition at line 623 of file core_cm3.h.

__IO uint32_t DEMCR

Offset: 0x0C Debug Exception and Monitor Control Register

Definition at line 625 of file core_cm3.h.

__IO uint32_t DHCSR

Offset: 0x00 Debug Halting Control and Status Register

Definition at line 622 of file core_cm3.h.

The documentation for this struct was generated from the following file:

Data Fields