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STM32F10x Standard Peripherals Library
3.5.0
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STM32F10x Standard Peripherals Library
3.5.0
|
Data Structures | |
| struct | CoreDebug_Type |
Defines | |
| #define | CoreDebug_DHCSR_DBGKEY_Pos 16 |
| #define | CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) |
| #define | CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
| #define | CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
| #define | CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
| #define | CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
| #define | CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) |
| #define | CoreDebug_DHCSR_S_SLEEP_Pos 18 |
| #define | CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) |
| #define | CoreDebug_DHCSR_S_HALT_Pos 17 |
| #define | CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) |
| #define | CoreDebug_DHCSR_S_REGRDY_Pos 16 |
| #define | CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
| #define | CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
| #define | CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
| #define | CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) |
| #define | CoreDebug_DHCSR_C_STEP_Pos 2 |
| #define | CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) |
| #define | CoreDebug_DHCSR_C_HALT_Pos 1 |
| #define | CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
| #define | CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
| #define | CoreDebug_DCRSR_REGWnR_Pos 16 |
| #define | CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) |
| #define | CoreDebug_DCRSR_REGSEL_Pos 0 |
| #define | CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) |
| #define | CoreDebug_DEMCR_TRCENA_Pos 24 |
| #define | CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) |
| #define | CoreDebug_DEMCR_MON_REQ_Pos 19 |
| #define | CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) |
| #define | CoreDebug_DEMCR_MON_STEP_Pos 18 |
| #define | CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) |
| #define | CoreDebug_DEMCR_MON_PEND_Pos 17 |
| #define | CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) |
| #define | CoreDebug_DEMCR_MON_EN_Pos 16 |
| #define | CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) |
| #define | CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
| #define | CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) |
| #define | CoreDebug_DEMCR_VC_INTERR_Pos 9 |
| #define | CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) |
| #define | CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
| #define | CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) |
| #define | CoreDebug_DEMCR_VC_STATERR_Pos 7 |
| #define | CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
| #define | CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
| #define | CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
| #define | CoreDebug_DEMCR_VC_MMERR_Pos 4 |
| #define | CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) |
| #define | CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
| #define | CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) |
memory mapped structure for Core Debug Register
| #define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) |
CoreDebug DCRSR: REGSEL Mask
Definition at line 670 of file core_cm3.h.
| #define CoreDebug_DCRSR_REGSEL_Pos 0 |
CoreDebug DCRSR: REGSEL Position
Definition at line 669 of file core_cm3.h.
| #define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) |
CoreDebug DCRSR: REGWnR Mask
Definition at line 667 of file core_cm3.h.
| #define CoreDebug_DCRSR_REGWnR_Pos 16 |
CoreDebug DCRSR: REGWnR Position
Definition at line 666 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) |
CoreDebug DEMCR: MON_EN Mask
Definition at line 686 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_EN_Pos 16 |
CoreDebug DEMCR: MON_EN Position
Definition at line 685 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) |
CoreDebug DEMCR: MON_PEND Mask
Definition at line 683 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_PEND_Pos 17 |
CoreDebug DEMCR: MON_PEND Position
Definition at line 682 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) |
CoreDebug DEMCR: MON_REQ Mask
Definition at line 677 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_REQ_Pos 19 |
CoreDebug DEMCR: MON_REQ Position
Definition at line 676 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) |
CoreDebug DEMCR: MON_STEP Mask
Definition at line 680 of file core_cm3.h.
| #define CoreDebug_DEMCR_MON_STEP_Pos 18 |
CoreDebug DEMCR: MON_STEP Position
Definition at line 679 of file core_cm3.h.
| #define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) |
CoreDebug DEMCR: TRCENA Mask
Definition at line 674 of file core_cm3.h.
| #define CoreDebug_DEMCR_TRCENA_Pos 24 |
CoreDebug DEMCR: TRCENA Position
Definition at line 673 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) |
CoreDebug DEMCR: VC_BUSERR Mask
Definition at line 695 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_BUSERR_Pos 8 |
CoreDebug DEMCR: VC_BUSERR Position
Definition at line 694 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) |
CoreDebug DEMCR: VC_CHKERR Mask
Definition at line 701 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_CHKERR_Pos 6 |
CoreDebug DEMCR: VC_CHKERR Position
Definition at line 700 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) |
CoreDebug DEMCR: VC_CORERESET Mask
Definition at line 710 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_CORERESET_Pos 0 |
CoreDebug DEMCR: VC_CORERESET Position
Definition at line 709 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) |
CoreDebug DEMCR: VC_HARDERR Mask
Definition at line 689 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_HARDERR_Pos 10 |
CoreDebug DEMCR: VC_HARDERR Position
Definition at line 688 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) |
CoreDebug DEMCR: VC_INTERR Mask
Definition at line 692 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_INTERR_Pos 9 |
CoreDebug DEMCR: VC_INTERR Position
Definition at line 691 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) |
CoreDebug DEMCR: VC_MMERR Mask
Definition at line 707 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_MMERR_Pos 4 |
CoreDebug DEMCR: VC_MMERR Position
Definition at line 706 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) |
CoreDebug DEMCR: VC_NOCPERR Mask
Definition at line 704 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 |
CoreDebug DEMCR: VC_NOCPERR Position
Definition at line 703 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) |
CoreDebug DEMCR: VC_STATERR Mask
Definition at line 698 of file core_cm3.h.
| #define CoreDebug_DEMCR_VC_STATERR_Pos 7 |
CoreDebug DEMCR: VC_STATERR Position
Definition at line 697 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) |
CoreDebug DHCSR: C_DEBUGEN Mask
Definition at line 663 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 |
CoreDebug DHCSR: C_DEBUGEN Position
Definition at line 662 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) |
CoreDebug DHCSR: C_HALT Mask
Definition at line 660 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_HALT_Pos 1 |
CoreDebug DHCSR: C_HALT Position
Definition at line 659 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) |
CoreDebug DHCSR: C_MASKINTS Mask
Definition at line 654 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_MASKINTS_Pos 3 |
CoreDebug DHCSR: C_MASKINTS Position
Definition at line 653 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) |
CoreDebug DHCSR: C_SNAPSTALL Mask
Definition at line 651 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 |
CoreDebug DHCSR: C_SNAPSTALL Position
Definition at line 650 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) |
CoreDebug DHCSR: C_STEP Mask
Definition at line 657 of file core_cm3.h.
| #define CoreDebug_DHCSR_C_STEP_Pos 2 |
CoreDebug DHCSR: C_STEP Position
Definition at line 656 of file core_cm3.h.
| #define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) |
CoreDebug DHCSR: DBGKEY Mask
Definition at line 630 of file core_cm3.h.
| #define CoreDebug_DHCSR_DBGKEY_Pos 16 |
CoreDebug DHCSR: DBGKEY Position
Definition at line 629 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) |
CoreDebug DHCSR: S_HALT Mask
Definition at line 645 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_HALT_Pos 17 |
CoreDebug DHCSR: S_HALT Position
Definition at line 644 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) |
CoreDebug DHCSR: S_LOCKUP Mask
Definition at line 639 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_LOCKUP_Pos 19 |
CoreDebug DHCSR: S_LOCKUP Position
Definition at line 638 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) |
CoreDebug DHCSR: S_REGRDY Mask
Definition at line 648 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_REGRDY_Pos 16 |
CoreDebug DHCSR: S_REGRDY Position
Definition at line 647 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) |
CoreDebug DHCSR: S_RESET_ST Mask
Definition at line 633 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_RESET_ST_Pos 25 |
CoreDebug DHCSR: S_RESET_ST Position
Definition at line 632 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) |
CoreDebug DHCSR: S_RETIRE_ST Mask
Definition at line 636 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 |
CoreDebug DHCSR: S_RETIRE_ST Position
Definition at line 635 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) |
CoreDebug DHCSR: S_SLEEP Mask
Definition at line 642 of file core_cm3.h.
| #define CoreDebug_DHCSR_S_SLEEP_Pos 18 |
CoreDebug DHCSR: S_SLEEP Position
Definition at line 641 of file core_cm3.h.
1.7.5 
