STM32F10x Standard Peripherals Library
3.5.0
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Defines | |
#define | CRC_DR_DR ((uint32_t)0xFFFFFFFF) |
#define | CRC_IDR_IDR ((uint8_t)0xFF) |
#define | CRC_CR_RESET ((uint8_t)0x01) |
#define | PWR_CR_LPDS ((uint16_t)0x0001) |
#define | PWR_CR_PDDS ((uint16_t)0x0002) |
#define | PWR_CR_CWUF ((uint16_t)0x0004) |
#define | PWR_CR_CSBF ((uint16_t)0x0008) |
#define | PWR_CR_PVDE ((uint16_t)0x0010) |
#define | PWR_CR_PLS ((uint16_t)0x00E0) |
#define | PWR_CR_PLS_0 ((uint16_t)0x0020) |
#define | PWR_CR_PLS_1 ((uint16_t)0x0040) |
#define | PWR_CR_PLS_2 ((uint16_t)0x0080) |
#define | PWR_CR_PLS_2V2 ((uint16_t)0x0000) |
#define | PWR_CR_PLS_2V3 ((uint16_t)0x0020) |
#define | PWR_CR_PLS_2V4 ((uint16_t)0x0040) |
#define | PWR_CR_PLS_2V5 ((uint16_t)0x0060) |
#define | PWR_CR_PLS_2V6 ((uint16_t)0x0080) |
#define | PWR_CR_PLS_2V7 ((uint16_t)0x00A0) |
#define | PWR_CR_PLS_2V8 ((uint16_t)0x00C0) |
#define | PWR_CR_PLS_2V9 ((uint16_t)0x00E0) |
#define | PWR_CR_DBP ((uint16_t)0x0100) |
#define | PWR_CSR_WUF ((uint16_t)0x0001) |
#define | PWR_CSR_SBF ((uint16_t)0x0002) |
#define | PWR_CSR_PVDO ((uint16_t)0x0004) |
#define | PWR_CSR_EWUP ((uint16_t)0x0100) |
#define | BKP_DR1_D ((uint16_t)0xFFFF) |
#define | BKP_DR2_D ((uint16_t)0xFFFF) |
#define | BKP_DR3_D ((uint16_t)0xFFFF) |
#define | BKP_DR4_D ((uint16_t)0xFFFF) |
#define | BKP_DR5_D ((uint16_t)0xFFFF) |
#define | BKP_DR6_D ((uint16_t)0xFFFF) |
#define | BKP_DR7_D ((uint16_t)0xFFFF) |
#define | BKP_DR8_D ((uint16_t)0xFFFF) |
#define | BKP_DR9_D ((uint16_t)0xFFFF) |
#define | BKP_DR10_D ((uint16_t)0xFFFF) |
#define | BKP_DR11_D ((uint16_t)0xFFFF) |
#define | BKP_DR12_D ((uint16_t)0xFFFF) |
#define | BKP_DR13_D ((uint16_t)0xFFFF) |
#define | BKP_DR14_D ((uint16_t)0xFFFF) |
#define | BKP_DR15_D ((uint16_t)0xFFFF) |
#define | BKP_DR16_D ((uint16_t)0xFFFF) |
#define | BKP_DR17_D ((uint16_t)0xFFFF) |
#define | BKP_DR18_D ((uint16_t)0xFFFF) |
#define | BKP_DR19_D ((uint16_t)0xFFFF) |
#define | BKP_DR20_D ((uint16_t)0xFFFF) |
#define | BKP_DR21_D ((uint16_t)0xFFFF) |
#define | BKP_DR22_D ((uint16_t)0xFFFF) |
#define | BKP_DR23_D ((uint16_t)0xFFFF) |
#define | BKP_DR24_D ((uint16_t)0xFFFF) |
#define | BKP_DR25_D ((uint16_t)0xFFFF) |
#define | BKP_DR26_D ((uint16_t)0xFFFF) |
#define | BKP_DR27_D ((uint16_t)0xFFFF) |
#define | BKP_DR28_D ((uint16_t)0xFFFF) |
#define | BKP_DR29_D ((uint16_t)0xFFFF) |
#define | BKP_DR30_D ((uint16_t)0xFFFF) |
#define | BKP_DR31_D ((uint16_t)0xFFFF) |
#define | BKP_DR32_D ((uint16_t)0xFFFF) |
#define | BKP_DR33_D ((uint16_t)0xFFFF) |
#define | BKP_DR34_D ((uint16_t)0xFFFF) |
#define | BKP_DR35_D ((uint16_t)0xFFFF) |
#define | BKP_DR36_D ((uint16_t)0xFFFF) |
#define | BKP_DR37_D ((uint16_t)0xFFFF) |
#define | BKP_DR38_D ((uint16_t)0xFFFF) |
#define | BKP_DR39_D ((uint16_t)0xFFFF) |
#define | BKP_DR40_D ((uint16_t)0xFFFF) |
#define | BKP_DR41_D ((uint16_t)0xFFFF) |
#define | BKP_DR42_D ((uint16_t)0xFFFF) |
#define | BKP_RTCCR_CAL ((uint16_t)0x007F) |
#define | BKP_RTCCR_CCO ((uint16_t)0x0080) |
#define | BKP_RTCCR_ASOE ((uint16_t)0x0100) |
#define | BKP_RTCCR_ASOS ((uint16_t)0x0200) |
#define | BKP_CR_TPE ((uint8_t)0x01) |
#define | BKP_CR_TPAL ((uint8_t)0x02) |
#define | BKP_CSR_CTE ((uint16_t)0x0001) |
#define | BKP_CSR_CTI ((uint16_t)0x0002) |
#define | BKP_CSR_TPIE ((uint16_t)0x0004) |
#define | BKP_CSR_TEF ((uint16_t)0x0100) |
#define | BKP_CSR_TIF ((uint16_t)0x0200) |
#define | RCC_CR_HSION ((uint32_t)0x00000001) |
#define | RCC_CR_HSIRDY ((uint32_t)0x00000002) |
#define | RCC_CR_HSITRIM ((uint32_t)0x000000F8) |
#define | RCC_CR_HSICAL ((uint32_t)0x0000FF00) |
#define | RCC_CR_HSEON ((uint32_t)0x00010000) |
#define | RCC_CR_HSERDY ((uint32_t)0x00020000) |
#define | RCC_CR_HSEBYP ((uint32_t)0x00040000) |
#define | RCC_CR_CSSON ((uint32_t)0x00080000) |
#define | RCC_CR_PLLON ((uint32_t)0x01000000) |
#define | RCC_CR_PLLRDY ((uint32_t)0x02000000) |
#define | RCC_CFGR_SW ((uint32_t)0x00000003) |
#define | RCC_CFGR_SW_0 ((uint32_t)0x00000001) |
#define | RCC_CFGR_SW_1 ((uint32_t)0x00000002) |
#define | RCC_CFGR_SW_HSI ((uint32_t)0x00000000) |
#define | RCC_CFGR_SW_HSE ((uint32_t)0x00000001) |
#define | RCC_CFGR_SW_PLL ((uint32_t)0x00000002) |
#define | RCC_CFGR_SWS ((uint32_t)0x0000000C) |
#define | RCC_CFGR_SWS_0 ((uint32_t)0x00000004) |
#define | RCC_CFGR_SWS_1 ((uint32_t)0x00000008) |
#define | RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) |
#define | RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) |
#define | RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) |
#define | RCC_CFGR_HPRE ((uint32_t)0x000000F0) |
#define | RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) |
#define | RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) |
#define | RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) |
#define | RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) |
#define | RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) |
#define | RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) |
#define | RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) |
#define | RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) |
#define | RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) |
#define | RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) |
#define | RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) |
#define | RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) |
#define | RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) |
#define | RCC_CFGR_PPRE1 ((uint32_t)0x00000700) |
#define | RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) |
#define | RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) |
#define | RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) |
#define | RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) |
#define | RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) |
#define | RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) |
#define | RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) |
#define | RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) |
#define | RCC_CFGR_PPRE2 ((uint32_t)0x00003800) |
#define | RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) |
#define | RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) |
#define | RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) |
#define | RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) |
#define | RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) |
#define | RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) |
#define | RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) |
#define | RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) |
#define | RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) |
#define | RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) |
#define | RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) |
#define | RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) |
#define | RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) |
#define | RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) |
#define | RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) |
#define | RCC_CFGR_PLLSRC ((uint32_t)0x00010000) |
#define | RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) |
#define | RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) |
#define | RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) |
#define | RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) |
#define | RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) |
#define | RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) |
#define | RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) |
#define | RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) |
#define | RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) |
#define | RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) |
#define | RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) |
#define | RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) |
#define | RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) |
#define | RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) |
#define | RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) |
#define | RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) |
#define | RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) |
#define | RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) |
#define | RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) |
#define | RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) |
#define | RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) |
#define | RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) |
#define | RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) |
#define | RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) |
#define | RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) |
#define | RCC_CFGR_USBPRE ((uint32_t)0x00400000) |
#define | RCC_CFGR_MCO ((uint32_t)0x07000000) |
#define | RCC_CFGR_MCO_0 ((uint32_t)0x01000000) |
#define | RCC_CFGR_MCO_1 ((uint32_t)0x02000000) |
#define | RCC_CFGR_MCO_2 ((uint32_t)0x04000000) |
#define | RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) |
#define | RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) |
#define | RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) |
#define | RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) |
#define | RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) |
#define | RCC_CIR_LSIRDYF ((uint32_t)0x00000001) |
#define | RCC_CIR_LSERDYF ((uint32_t)0x00000002) |
#define | RCC_CIR_HSIRDYF ((uint32_t)0x00000004) |
#define | RCC_CIR_HSERDYF ((uint32_t)0x00000008) |
#define | RCC_CIR_PLLRDYF ((uint32_t)0x00000010) |
#define | RCC_CIR_CSSF ((uint32_t)0x00000080) |
#define | RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) |
#define | RCC_CIR_LSERDYIE ((uint32_t)0x00000200) |
#define | RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) |
#define | RCC_CIR_HSERDYIE ((uint32_t)0x00000800) |
#define | RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) |
#define | RCC_CIR_LSIRDYC ((uint32_t)0x00010000) |
#define | RCC_CIR_LSERDYC ((uint32_t)0x00020000) |
#define | RCC_CIR_HSIRDYC ((uint32_t)0x00040000) |
#define | RCC_CIR_HSERDYC ((uint32_t)0x00080000) |
#define | RCC_CIR_PLLRDYC ((uint32_t)0x00100000) |
#define | RCC_CIR_CSSC ((uint32_t)0x00800000) |
#define | RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) |
#define | RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) |
#define | RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) |
#define | RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) |
#define | RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) |
#define | RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) |
#define | RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) |
#define | RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) |
#define | RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) |
#define | RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) |
#define | RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) |
#define | RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) |
#define | RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) |
#define | RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) |
#define | RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) |
#define | RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) |
#define | RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) |
#define | RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) |
#define | RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) |
#define | RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) |
#define | RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) |
#define | RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) |
#define | RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) |
#define | RCC_AHBENR_DMA1EN ((uint16_t)0x0001) |
#define | RCC_AHBENR_SRAMEN ((uint16_t)0x0004) |
#define | RCC_AHBENR_FLITFEN ((uint16_t)0x0010) |
#define | RCC_AHBENR_CRCEN ((uint16_t)0x0040) |
#define | RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) |
#define | RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) |
#define | RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) |
#define | RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) |
#define | RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) |
#define | RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) |
#define | RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) |
#define | RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) |
#define | RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) |
#define | RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) |
#define | RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) |
#define | RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) |
#define | RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) |
#define | RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) |
#define | RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) |
#define | RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) |
#define | RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) |
#define | RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) |
#define | RCC_APB1ENR_PWREN ((uint32_t)0x10000000) |
#define | RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) |
#define | RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) |
#define | RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) |
#define | RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) |
#define | RCC_BDCR_LSEON ((uint32_t)0x00000001) |
#define | RCC_BDCR_LSERDY ((uint32_t)0x00000002) |
#define | RCC_BDCR_LSEBYP ((uint32_t)0x00000004) |
#define | RCC_BDCR_RTCSEL ((uint32_t)0x00000300) |
#define | RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) |
#define | RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) |
#define | RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) |
#define | RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) |
#define | RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) |
#define | RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) |
#define | RCC_BDCR_RTCEN ((uint32_t)0x00008000) |
#define | RCC_BDCR_BDRST ((uint32_t)0x00010000) |
#define | RCC_CSR_LSION ((uint32_t)0x00000001) |
#define | RCC_CSR_LSIRDY ((uint32_t)0x00000002) |
#define | RCC_CSR_RMVF ((uint32_t)0x01000000) |
#define | RCC_CSR_PINRSTF ((uint32_t)0x04000000) |
#define | RCC_CSR_PORRSTF ((uint32_t)0x08000000) |
#define | RCC_CSR_SFTRSTF ((uint32_t)0x10000000) |
#define | RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) |
#define | RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) |
#define | RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) |
#define | GPIO_CRL_MODE ((uint32_t)0x33333333) |
#define | GPIO_CRL_MODE0 ((uint32_t)0x00000003) |
#define | GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) |
#define | GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) |
#define | GPIO_CRL_MODE1 ((uint32_t)0x00000030) |
#define | GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) |
#define | GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) |
#define | GPIO_CRL_MODE2 ((uint32_t)0x00000300) |
#define | GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) |
#define | GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) |
#define | GPIO_CRL_MODE3 ((uint32_t)0x00003000) |
#define | GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) |
#define | GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) |
#define | GPIO_CRL_MODE4 ((uint32_t)0x00030000) |
#define | GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) |
#define | GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) |
#define | GPIO_CRL_MODE5 ((uint32_t)0x00300000) |
#define | GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) |
#define | GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) |
#define | GPIO_CRL_MODE6 ((uint32_t)0x03000000) |
#define | GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) |
#define | GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) |
#define | GPIO_CRL_MODE7 ((uint32_t)0x30000000) |
#define | GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) |
#define | GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) |
#define | GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) |
#define | GPIO_CRL_CNF0 ((uint32_t)0x0000000C) |
#define | GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) |
#define | GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) |
#define | GPIO_CRL_CNF1 ((uint32_t)0x000000C0) |
#define | GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) |
#define | GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) |
#define | GPIO_CRL_CNF2 ((uint32_t)0x00000C00) |
#define | GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) |
#define | GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) |
#define | GPIO_CRL_CNF3 ((uint32_t)0x0000C000) |
#define | GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) |
#define | GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) |
#define | GPIO_CRL_CNF4 ((uint32_t)0x000C0000) |
#define | GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) |
#define | GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) |
#define | GPIO_CRL_CNF5 ((uint32_t)0x00C00000) |
#define | GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) |
#define | GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) |
#define | GPIO_CRL_CNF6 ((uint32_t)0x0C000000) |
#define | GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) |
#define | GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) |
#define | GPIO_CRL_CNF7 ((uint32_t)0xC0000000) |
#define | GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) |
#define | GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) |
#define | GPIO_CRH_MODE ((uint32_t)0x33333333) |
#define | GPIO_CRH_MODE8 ((uint32_t)0x00000003) |
#define | GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) |
#define | GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) |
#define | GPIO_CRH_MODE9 ((uint32_t)0x00000030) |
#define | GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) |
#define | GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) |
#define | GPIO_CRH_MODE10 ((uint32_t)0x00000300) |
#define | GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) |
#define | GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) |
#define | GPIO_CRH_MODE11 ((uint32_t)0x00003000) |
#define | GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) |
#define | GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) |
#define | GPIO_CRH_MODE12 ((uint32_t)0x00030000) |
#define | GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) |
#define | GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) |
#define | GPIO_CRH_MODE13 ((uint32_t)0x00300000) |
#define | GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) |
#define | GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) |
#define | GPIO_CRH_MODE14 ((uint32_t)0x03000000) |
#define | GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) |
#define | GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) |
#define | GPIO_CRH_MODE15 ((uint32_t)0x30000000) |
#define | GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) |
#define | GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) |
#define | GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) |
#define | GPIO_CRH_CNF8 ((uint32_t)0x0000000C) |
#define | GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) |
#define | GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) |
#define | GPIO_CRH_CNF9 ((uint32_t)0x000000C0) |
#define | GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) |
#define | GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) |
#define | GPIO_CRH_CNF10 ((uint32_t)0x00000C00) |
#define | GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) |
#define | GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) |
#define | GPIO_CRH_CNF11 ((uint32_t)0x0000C000) |
#define | GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) |
#define | GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) |
#define | GPIO_CRH_CNF12 ((uint32_t)0x000C0000) |
#define | GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) |
#define | GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) |
#define | GPIO_CRH_CNF13 ((uint32_t)0x00C00000) |
#define | GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) |
#define | GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) |
#define | GPIO_CRH_CNF14 ((uint32_t)0x0C000000) |
#define | GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) |
#define | GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) |
#define | GPIO_CRH_CNF15 ((uint32_t)0xC0000000) |
#define | GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) |
#define | GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) |
#define | GPIO_IDR_IDR0 ((uint16_t)0x0001) |
#define | GPIO_IDR_IDR1 ((uint16_t)0x0002) |
#define | GPIO_IDR_IDR2 ((uint16_t)0x0004) |
#define | GPIO_IDR_IDR3 ((uint16_t)0x0008) |
#define | GPIO_IDR_IDR4 ((uint16_t)0x0010) |
#define | GPIO_IDR_IDR5 ((uint16_t)0x0020) |
#define | GPIO_IDR_IDR6 ((uint16_t)0x0040) |
#define | GPIO_IDR_IDR7 ((uint16_t)0x0080) |
#define | GPIO_IDR_IDR8 ((uint16_t)0x0100) |
#define | GPIO_IDR_IDR9 ((uint16_t)0x0200) |
#define | GPIO_IDR_IDR10 ((uint16_t)0x0400) |
#define | GPIO_IDR_IDR11 ((uint16_t)0x0800) |
#define | GPIO_IDR_IDR12 ((uint16_t)0x1000) |
#define | GPIO_IDR_IDR13 ((uint16_t)0x2000) |
#define | GPIO_IDR_IDR14 ((uint16_t)0x4000) |
#define | GPIO_IDR_IDR15 ((uint16_t)0x8000) |
#define | GPIO_ODR_ODR0 ((uint16_t)0x0001) |
#define | GPIO_ODR_ODR1 ((uint16_t)0x0002) |
#define | GPIO_ODR_ODR2 ((uint16_t)0x0004) |
#define | GPIO_ODR_ODR3 ((uint16_t)0x0008) |
#define | GPIO_ODR_ODR4 ((uint16_t)0x0010) |
#define | GPIO_ODR_ODR5 ((uint16_t)0x0020) |
#define | GPIO_ODR_ODR6 ((uint16_t)0x0040) |
#define | GPIO_ODR_ODR7 ((uint16_t)0x0080) |
#define | GPIO_ODR_ODR8 ((uint16_t)0x0100) |
#define | GPIO_ODR_ODR9 ((uint16_t)0x0200) |
#define | GPIO_ODR_ODR10 ((uint16_t)0x0400) |
#define | GPIO_ODR_ODR11 ((uint16_t)0x0800) |
#define | GPIO_ODR_ODR12 ((uint16_t)0x1000) |
#define | GPIO_ODR_ODR13 ((uint16_t)0x2000) |
#define | GPIO_ODR_ODR14 ((uint16_t)0x4000) |
#define | GPIO_ODR_ODR15 ((uint16_t)0x8000) |
#define | GPIO_BSRR_BS0 ((uint32_t)0x00000001) |
#define | GPIO_BSRR_BS1 ((uint32_t)0x00000002) |
#define | GPIO_BSRR_BS2 ((uint32_t)0x00000004) |
#define | GPIO_BSRR_BS3 ((uint32_t)0x00000008) |
#define | GPIO_BSRR_BS4 ((uint32_t)0x00000010) |
#define | GPIO_BSRR_BS5 ((uint32_t)0x00000020) |
#define | GPIO_BSRR_BS6 ((uint32_t)0x00000040) |
#define | GPIO_BSRR_BS7 ((uint32_t)0x00000080) |
#define | GPIO_BSRR_BS8 ((uint32_t)0x00000100) |
#define | GPIO_BSRR_BS9 ((uint32_t)0x00000200) |
#define | GPIO_BSRR_BS10 ((uint32_t)0x00000400) |
#define | GPIO_BSRR_BS11 ((uint32_t)0x00000800) |
#define | GPIO_BSRR_BS12 ((uint32_t)0x00001000) |
#define | GPIO_BSRR_BS13 ((uint32_t)0x00002000) |
#define | GPIO_BSRR_BS14 ((uint32_t)0x00004000) |
#define | GPIO_BSRR_BS15 ((uint32_t)0x00008000) |
#define | GPIO_BSRR_BR0 ((uint32_t)0x00010000) |
#define | GPIO_BSRR_BR1 ((uint32_t)0x00020000) |
#define | GPIO_BSRR_BR2 ((uint32_t)0x00040000) |
#define | GPIO_BSRR_BR3 ((uint32_t)0x00080000) |
#define | GPIO_BSRR_BR4 ((uint32_t)0x00100000) |
#define | GPIO_BSRR_BR5 ((uint32_t)0x00200000) |
#define | GPIO_BSRR_BR6 ((uint32_t)0x00400000) |
#define | GPIO_BSRR_BR7 ((uint32_t)0x00800000) |
#define | GPIO_BSRR_BR8 ((uint32_t)0x01000000) |
#define | GPIO_BSRR_BR9 ((uint32_t)0x02000000) |
#define | GPIO_BSRR_BR10 ((uint32_t)0x04000000) |
#define | GPIO_BSRR_BR11 ((uint32_t)0x08000000) |
#define | GPIO_BSRR_BR12 ((uint32_t)0x10000000) |
#define | GPIO_BSRR_BR13 ((uint32_t)0x20000000) |
#define | GPIO_BSRR_BR14 ((uint32_t)0x40000000) |
#define | GPIO_BSRR_BR15 ((uint32_t)0x80000000) |
#define | GPIO_BRR_BR0 ((uint16_t)0x0001) |
#define | GPIO_BRR_BR1 ((uint16_t)0x0002) |
#define | GPIO_BRR_BR2 ((uint16_t)0x0004) |
#define | GPIO_BRR_BR3 ((uint16_t)0x0008) |
#define | GPIO_BRR_BR4 ((uint16_t)0x0010) |
#define | GPIO_BRR_BR5 ((uint16_t)0x0020) |
#define | GPIO_BRR_BR6 ((uint16_t)0x0040) |
#define | GPIO_BRR_BR7 ((uint16_t)0x0080) |
#define | GPIO_BRR_BR8 ((uint16_t)0x0100) |
#define | GPIO_BRR_BR9 ((uint16_t)0x0200) |
#define | GPIO_BRR_BR10 ((uint16_t)0x0400) |
#define | GPIO_BRR_BR11 ((uint16_t)0x0800) |
#define | GPIO_BRR_BR12 ((uint16_t)0x1000) |
#define | GPIO_BRR_BR13 ((uint16_t)0x2000) |
#define | GPIO_BRR_BR14 ((uint16_t)0x4000) |
#define | GPIO_BRR_BR15 ((uint16_t)0x8000) |
#define | GPIO_LCKR_LCK0 ((uint32_t)0x00000001) |
#define | GPIO_LCKR_LCK1 ((uint32_t)0x00000002) |
#define | GPIO_LCKR_LCK2 ((uint32_t)0x00000004) |
#define | GPIO_LCKR_LCK3 ((uint32_t)0x00000008) |
#define | GPIO_LCKR_LCK4 ((uint32_t)0x00000010) |
#define | GPIO_LCKR_LCK5 ((uint32_t)0x00000020) |
#define | GPIO_LCKR_LCK6 ((uint32_t)0x00000040) |
#define | GPIO_LCKR_LCK7 ((uint32_t)0x00000080) |
#define | GPIO_LCKR_LCK8 ((uint32_t)0x00000100) |
#define | GPIO_LCKR_LCK9 ((uint32_t)0x00000200) |
#define | GPIO_LCKR_LCK10 ((uint32_t)0x00000400) |
#define | GPIO_LCKR_LCK11 ((uint32_t)0x00000800) |
#define | GPIO_LCKR_LCK12 ((uint32_t)0x00001000) |
#define | GPIO_LCKR_LCK13 ((uint32_t)0x00002000) |
#define | GPIO_LCKR_LCK14 ((uint32_t)0x00004000) |
#define | GPIO_LCKR_LCK15 ((uint32_t)0x00008000) |
#define | GPIO_LCKR_LCKK ((uint32_t)0x00010000) |
#define | AFIO_EVCR_PIN ((uint8_t)0x0F) |
#define | AFIO_EVCR_PIN_0 ((uint8_t)0x01) |
#define | AFIO_EVCR_PIN_1 ((uint8_t)0x02) |
#define | AFIO_EVCR_PIN_2 ((uint8_t)0x04) |
#define | AFIO_EVCR_PIN_3 ((uint8_t)0x08) |
#define | AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) |
#define | AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) |
#define | AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) |
#define | AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) |
#define | AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) |
#define | AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) |
#define | AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) |
#define | AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) |
#define | AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) |
#define | AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) |
#define | AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) |
#define | AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) |
#define | AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) |
#define | AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) |
#define | AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) |
#define | AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) |
#define | AFIO_EVCR_PORT ((uint8_t)0x70) |
#define | AFIO_EVCR_PORT_0 ((uint8_t)0x10) |
#define | AFIO_EVCR_PORT_1 ((uint8_t)0x20) |
#define | AFIO_EVCR_PORT_2 ((uint8_t)0x40) |
#define | AFIO_EVCR_PORT_PA ((uint8_t)0x00) |
#define | AFIO_EVCR_PORT_PB ((uint8_t)0x10) |
#define | AFIO_EVCR_PORT_PC ((uint8_t)0x20) |
#define | AFIO_EVCR_PORT_PD ((uint8_t)0x30) |
#define | AFIO_EVCR_PORT_PE ((uint8_t)0x40) |
#define | AFIO_EVCR_EVOE ((uint8_t)0x80) |
#define | AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) |
#define | AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) |
#define | AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) |
#define | AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) |
#define | AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) |
#define | AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) |
#define | AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) |
#define | AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) |
#define | AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) |
#define | AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) |
#define | AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) |
#define | AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) |
#define | AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) |
#define | AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) |
#define | AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) |
#define | AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) |
#define | AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) |
#define | AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) |
#define | AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) |
#define | AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) |
#define | AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) |
#define | AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) |
#define | AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) |
#define | AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) |
#define | AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) |
#define | AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) |
#define | AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) |
#define | AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) |
#define | AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) |
#define | AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) |
#define | AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) |
#define | AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) |
#define | AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) |
#define | AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) |
#define | AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) |
#define | AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) |
#define | AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) |
#define | AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) |
#define | AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) |
#define | AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) |
#define | AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) |
#define | AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) |
#define | AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) |
#define | AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) |
#define | AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) |
#define | AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) |
#define | AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) |
#define | AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) |
#define | AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) |
#define | AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) |
#define | AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) |
#define | AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) |
#define | AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) |
#define | AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) |
#define | AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) |
#define | AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) |
#define | AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) |
#define | AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) |
#define | AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) |
#define | AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) |
#define | AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) |
#define | AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) |
#define | AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) |
#define | AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) |
#define | AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) |
#define | AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) |
#define | AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) |
#define | AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) |
#define | AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) |
#define | AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) |
#define | AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) |
#define | AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) |
#define | AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) |
#define | AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) |
#define | AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) |
#define | AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) |
#define | AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) |
#define | AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) |
#define | AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) |
#define | AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) |
#define | AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) |
#define | AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) |
#define | AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) |
#define | AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) |
#define | AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) |
#define | AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) |
#define | AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) |
#define | AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) |
#define | AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) |
#define | AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) |
#define | AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) |
#define | AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) |
#define | AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) |
#define | AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) |
#define | AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) |
#define | AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) |
#define | AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) |
#define | AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) |
#define | AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) |
#define | AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) |
#define | AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) |
#define | AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) |
#define | AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) |
#define | AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) |
#define | AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) |
#define | AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) |
#define | AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) |
#define | AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) |
#define | AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) |
#define | AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) |
#define | AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) |
#define | AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) |
#define | AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) |
#define | AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) |
#define | AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) |
#define | AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) |
#define | AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) |
#define | AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) |
#define | AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) |
#define | AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) |
#define | AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) |
#define | AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) |
#define | AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) |
#define | AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) |
#define | AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) |
#define | AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) |
#define | AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) |
#define | AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) |
#define | AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) |
#define | AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) |
#define | AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) |
#define | AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) |
#define | AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) |
#define | AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) |
#define | AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) |
#define | AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) |
#define | AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) |
#define | AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) |
#define | AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) |
#define | AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) |
#define | AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) |
#define | AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) |
#define | AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) |
#define | AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) |
#define | AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) |
#define | AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) |
#define | AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) |
#define | AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) |
#define | AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) |
#define | AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) |
#define | AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) |
#define | AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) |
#define | AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) |
#define | AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) |
#define | AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) |
#define | AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) |
#define | AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) |
#define | AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) |
#define | AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) |
#define | AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) |
#define | AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) |
#define | AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) |
#define | AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) |
#define | SysTick_CTRL_ENABLE ((uint32_t)0x00000001) |
#define | SysTick_CTRL_TICKINT ((uint32_t)0x00000002) |
#define | SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) |
#define | SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) |
#define | SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) |
#define | SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) |
#define | SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) |
#define | SysTick_CALIB_SKEW ((uint32_t)0x40000000) |
#define | SysTick_CALIB_NOREF ((uint32_t)0x80000000) |
#define | NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) |
#define | NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) |
#define | NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) |
#define | NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) |
#define | NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) |
#define | NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) |
#define | NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) |
#define | NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) |
#define | NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) |
#define | NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) |
#define | NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) |
#define | NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) |
#define | NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) |
#define | NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) |
#define | NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) |
#define | NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) |
#define | NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) |
#define | NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) |
#define | NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) |
#define | NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) |
#define | NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) |
#define | NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) |
#define | NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) |
#define | NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) |
#define | NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) |
#define | NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) |
#define | NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) |
#define | NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) |
#define | NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) |
#define | NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) |
#define | NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) |
#define | NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) |
#define | NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) |
#define | NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) |
#define | NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) |
#define | NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) |
#define | NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) |
#define | NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) |
#define | NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) |
#define | NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) |
#define | NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) |
#define | NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) |
#define | NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) |
#define | NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) |
#define | NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) |
#define | NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) |
#define | NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) |
#define | NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) |
#define | NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) |
#define | NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) |
#define | NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) |
#define | NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) |
#define | NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) |
#define | NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) |
#define | NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) |
#define | NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) |
#define | NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) |
#define | NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) |
#define | NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) |
#define | NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) |
#define | NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) |
#define | NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) |
#define | NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) |
#define | NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) |
#define | NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) |
#define | NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) |
#define | NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) |
#define | NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) |
#define | NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) |
#define | NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) |
#define | NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) |
#define | NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) |
#define | NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) |
#define | NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) |
#define | NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) |
#define | NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) |
#define | NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) |
#define | NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) |
#define | NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) |
#define | NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) |
#define | NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) |
#define | NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) |
#define | NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) |
#define | NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) |
#define | NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) |
#define | NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) |
#define | NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) |
#define | NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) |
#define | NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) |
#define | NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) |
#define | NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) |
#define | NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) |
#define | NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) |
#define | NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) |
#define | NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) |
#define | NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) |
#define | NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) |
#define | NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) |
#define | NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) |
#define | NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) |
#define | NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) |
#define | NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) |
#define | NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) |
#define | NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) |
#define | NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) |
#define | NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) |
#define | NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) |
#define | NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) |
#define | NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) |
#define | NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) |
#define | NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) |
#define | NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) |
#define | NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) |
#define | NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) |
#define | NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) |
#define | NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) |
#define | NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) |
#define | NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) |
#define | NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) |
#define | NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) |
#define | NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) |
#define | NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) |
#define | NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) |
#define | NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) |
#define | NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) |
#define | NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) |
#define | NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) |
#define | NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) |
#define | NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) |
#define | NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) |
#define | NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) |
#define | NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) |
#define | NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) |
#define | NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) |
#define | NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) |
#define | NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) |
#define | NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) |
#define | NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) |
#define | NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) |
#define | NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) |
#define | NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) |
#define | NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) |
#define | NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) |
#define | NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) |
#define | NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) |
#define | NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) |
#define | NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) |
#define | NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) |
#define | NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) |
#define | NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) |
#define | NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) |
#define | NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) |
#define | NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) |
#define | NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) |
#define | NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) |
#define | NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) |
#define | NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) |
#define | NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) |
#define | NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) |
#define | NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) |
#define | NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) |
#define | NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) |
#define | NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) |
#define | NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) |
#define | NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) |
#define | NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) |
#define | NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) |
#define | NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) |
#define | NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) |
#define | NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) |
#define | NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) |
#define | NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) |
#define | NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) |
#define | NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) |
#define | NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) |
#define | NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) |
#define | NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) |
#define | NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) |
#define | NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) |
#define | NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) |
#define | NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) |
#define | NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) |
#define | NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) |
#define | SCB_CPUID_REVISION ((uint32_t)0x0000000F) |
#define | SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) |
#define | SCB_CPUID_Constant ((uint32_t)0x000F0000) |
#define | SCB_CPUID_VARIANT ((uint32_t)0x00F00000) |
#define | SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) |
#define | SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) |
#define | SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) |
#define | SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) |
#define | SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) |
#define | SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) |
#define | SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) |
#define | SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) |
#define | SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) |
#define | SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) |
#define | SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) |
#define | SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) |
#define | SCB_VTOR_TBLBASE ((uint32_t)0x20000000) |
#define | SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) |
#define | SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) |
#define | SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) |
#define | SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) |
#define | SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) |
#define | SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) |
#define | SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) |
#define | SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) |
#define | SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) |
#define | SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) |
#define | SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) |
#define | SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) |
#define | SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) |
#define | SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) |
#define | SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) |
#define | SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) |
#define | SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) |
#define | SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) |
#define | SCB_SCR_SLEEPDEEP ((uint8_t)0x04) |
#define | SCB_SCR_SEVONPEND ((uint8_t)0x10) |
#define | SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) |
#define | SCB_CCR_USERSETMPEND ((uint16_t)0x0002) |
#define | SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) |
#define | SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) |
#define | SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) |
#define | SCB_CCR_STKALIGN ((uint16_t)0x0200) |
#define | SCB_SHPR_PRI_N ((uint32_t)0x000000FF) |
#define | SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) |
#define | SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) |
#define | SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) |
#define | SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) |
#define | SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) |
#define | SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) |
#define | SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) |
#define | SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) |
#define | SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) |
#define | SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) |
#define | SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) |
#define | SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) |
#define | SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) |
#define | SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) |
#define | SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) |
#define | SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) |
#define | SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) |
#define | SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) |
#define | SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) |
#define | SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) |
#define | SCB_CFSR_MSTKERR ((uint32_t)0x00000010) |
#define | SCB_CFSR_MMARVALID ((uint32_t)0x00000080) |
#define | SCB_CFSR_IBUSERR ((uint32_t)0x00000100) |
#define | SCB_CFSR_PRECISERR ((uint32_t)0x00000200) |
#define | SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) |
#define | SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) |
#define | SCB_CFSR_STKERR ((uint32_t)0x00001000) |
#define | SCB_CFSR_BFARVALID ((uint32_t)0x00008000) |
#define | SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) |
#define | SCB_CFSR_INVSTATE ((uint32_t)0x00020000) |
#define | SCB_CFSR_INVPC ((uint32_t)0x00040000) |
#define | SCB_CFSR_NOCP ((uint32_t)0x00080000) |
#define | SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) |
#define | SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) |
#define | SCB_HFSR_VECTTBL ((uint32_t)0x00000002) |
#define | SCB_HFSR_FORCED ((uint32_t)0x40000000) |
#define | SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) |
#define | SCB_DFSR_HALTED ((uint8_t)0x01) |
#define | SCB_DFSR_BKPT ((uint8_t)0x02) |
#define | SCB_DFSR_DWTTRAP ((uint8_t)0x04) |
#define | SCB_DFSR_VCATCH ((uint8_t)0x08) |
#define | SCB_DFSR_EXTERNAL ((uint8_t)0x10) |
#define | SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) |
#define | SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) |
#define | SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) |
#define | EXTI_IMR_MR0 ((uint32_t)0x00000001) |
#define | EXTI_IMR_MR1 ((uint32_t)0x00000002) |
#define | EXTI_IMR_MR2 ((uint32_t)0x00000004) |
#define | EXTI_IMR_MR3 ((uint32_t)0x00000008) |
#define | EXTI_IMR_MR4 ((uint32_t)0x00000010) |
#define | EXTI_IMR_MR5 ((uint32_t)0x00000020) |
#define | EXTI_IMR_MR6 ((uint32_t)0x00000040) |
#define | EXTI_IMR_MR7 ((uint32_t)0x00000080) |
#define | EXTI_IMR_MR8 ((uint32_t)0x00000100) |
#define | EXTI_IMR_MR9 ((uint32_t)0x00000200) |
#define | EXTI_IMR_MR10 ((uint32_t)0x00000400) |
#define | EXTI_IMR_MR11 ((uint32_t)0x00000800) |
#define | EXTI_IMR_MR12 ((uint32_t)0x00001000) |
#define | EXTI_IMR_MR13 ((uint32_t)0x00002000) |
#define | EXTI_IMR_MR14 ((uint32_t)0x00004000) |
#define | EXTI_IMR_MR15 ((uint32_t)0x00008000) |
#define | EXTI_IMR_MR16 ((uint32_t)0x00010000) |
#define | EXTI_IMR_MR17 ((uint32_t)0x00020000) |
#define | EXTI_IMR_MR18 ((uint32_t)0x00040000) |
#define | EXTI_IMR_MR19 ((uint32_t)0x00080000) |
#define | EXTI_EMR_MR0 ((uint32_t)0x00000001) |
#define | EXTI_EMR_MR1 ((uint32_t)0x00000002) |
#define | EXTI_EMR_MR2 ((uint32_t)0x00000004) |
#define | EXTI_EMR_MR3 ((uint32_t)0x00000008) |
#define | EXTI_EMR_MR4 ((uint32_t)0x00000010) |
#define | EXTI_EMR_MR5 ((uint32_t)0x00000020) |
#define | EXTI_EMR_MR6 ((uint32_t)0x00000040) |
#define | EXTI_EMR_MR7 ((uint32_t)0x00000080) |
#define | EXTI_EMR_MR8 ((uint32_t)0x00000100) |
#define | EXTI_EMR_MR9 ((uint32_t)0x00000200) |
#define | EXTI_EMR_MR10 ((uint32_t)0x00000400) |
#define | EXTI_EMR_MR11 ((uint32_t)0x00000800) |
#define | EXTI_EMR_MR12 ((uint32_t)0x00001000) |
#define | EXTI_EMR_MR13 ((uint32_t)0x00002000) |
#define | EXTI_EMR_MR14 ((uint32_t)0x00004000) |
#define | EXTI_EMR_MR15 ((uint32_t)0x00008000) |
#define | EXTI_EMR_MR16 ((uint32_t)0x00010000) |
#define | EXTI_EMR_MR17 ((uint32_t)0x00020000) |
#define | EXTI_EMR_MR18 ((uint32_t)0x00040000) |
#define | EXTI_EMR_MR19 ((uint32_t)0x00080000) |
#define | EXTI_RTSR_TR0 ((uint32_t)0x00000001) |
#define | EXTI_RTSR_TR1 ((uint32_t)0x00000002) |
#define | EXTI_RTSR_TR2 ((uint32_t)0x00000004) |
#define | EXTI_RTSR_TR3 ((uint32_t)0x00000008) |
#define | EXTI_RTSR_TR4 ((uint32_t)0x00000010) |
#define | EXTI_RTSR_TR5 ((uint32_t)0x00000020) |
#define | EXTI_RTSR_TR6 ((uint32_t)0x00000040) |
#define | EXTI_RTSR_TR7 ((uint32_t)0x00000080) |
#define | EXTI_RTSR_TR8 ((uint32_t)0x00000100) |
#define | EXTI_RTSR_TR9 ((uint32_t)0x00000200) |
#define | EXTI_RTSR_TR10 ((uint32_t)0x00000400) |
#define | EXTI_RTSR_TR11 ((uint32_t)0x00000800) |
#define | EXTI_RTSR_TR12 ((uint32_t)0x00001000) |
#define | EXTI_RTSR_TR13 ((uint32_t)0x00002000) |
#define | EXTI_RTSR_TR14 ((uint32_t)0x00004000) |
#define | EXTI_RTSR_TR15 ((uint32_t)0x00008000) |
#define | EXTI_RTSR_TR16 ((uint32_t)0x00010000) |
#define | EXTI_RTSR_TR17 ((uint32_t)0x00020000) |
#define | EXTI_RTSR_TR18 ((uint32_t)0x00040000) |
#define | EXTI_RTSR_TR19 ((uint32_t)0x00080000) |
#define | EXTI_FTSR_TR0 ((uint32_t)0x00000001) |
#define | EXTI_FTSR_TR1 ((uint32_t)0x00000002) |
#define | EXTI_FTSR_TR2 ((uint32_t)0x00000004) |
#define | EXTI_FTSR_TR3 ((uint32_t)0x00000008) |
#define | EXTI_FTSR_TR4 ((uint32_t)0x00000010) |
#define | EXTI_FTSR_TR5 ((uint32_t)0x00000020) |
#define | EXTI_FTSR_TR6 ((uint32_t)0x00000040) |
#define | EXTI_FTSR_TR7 ((uint32_t)0x00000080) |
#define | EXTI_FTSR_TR8 ((uint32_t)0x00000100) |
#define | EXTI_FTSR_TR9 ((uint32_t)0x00000200) |
#define | EXTI_FTSR_TR10 ((uint32_t)0x00000400) |
#define | EXTI_FTSR_TR11 ((uint32_t)0x00000800) |
#define | EXTI_FTSR_TR12 ((uint32_t)0x00001000) |
#define | EXTI_FTSR_TR13 ((uint32_t)0x00002000) |
#define | EXTI_FTSR_TR14 ((uint32_t)0x00004000) |
#define | EXTI_FTSR_TR15 ((uint32_t)0x00008000) |
#define | EXTI_FTSR_TR16 ((uint32_t)0x00010000) |
#define | EXTI_FTSR_TR17 ((uint32_t)0x00020000) |
#define | EXTI_FTSR_TR18 ((uint32_t)0x00040000) |
#define | EXTI_FTSR_TR19 ((uint32_t)0x00080000) |
#define | EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) |
#define | EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) |
#define | EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) |
#define | EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) |
#define | EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) |
#define | EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) |
#define | EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) |
#define | EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) |
#define | EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) |
#define | EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) |
#define | EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) |
#define | EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) |
#define | EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) |
#define | EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) |
#define | EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) |
#define | EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) |
#define | EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) |
#define | EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) |
#define | EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) |
#define | EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) |
#define | EXTI_PR_PR0 ((uint32_t)0x00000001) |
#define | EXTI_PR_PR1 ((uint32_t)0x00000002) |
#define | EXTI_PR_PR2 ((uint32_t)0x00000004) |
#define | EXTI_PR_PR3 ((uint32_t)0x00000008) |
#define | EXTI_PR_PR4 ((uint32_t)0x00000010) |
#define | EXTI_PR_PR5 ((uint32_t)0x00000020) |
#define | EXTI_PR_PR6 ((uint32_t)0x00000040) |
#define | EXTI_PR_PR7 ((uint32_t)0x00000080) |
#define | EXTI_PR_PR8 ((uint32_t)0x00000100) |
#define | EXTI_PR_PR9 ((uint32_t)0x00000200) |
#define | EXTI_PR_PR10 ((uint32_t)0x00000400) |
#define | EXTI_PR_PR11 ((uint32_t)0x00000800) |
#define | EXTI_PR_PR12 ((uint32_t)0x00001000) |
#define | EXTI_PR_PR13 ((uint32_t)0x00002000) |
#define | EXTI_PR_PR14 ((uint32_t)0x00004000) |
#define | EXTI_PR_PR15 ((uint32_t)0x00008000) |
#define | EXTI_PR_PR16 ((uint32_t)0x00010000) |
#define | EXTI_PR_PR17 ((uint32_t)0x00020000) |
#define | EXTI_PR_PR18 ((uint32_t)0x00040000) |
#define | EXTI_PR_PR19 ((uint32_t)0x00080000) |
#define | DMA_ISR_GIF1 ((uint32_t)0x00000001) |
#define | DMA_ISR_TCIF1 ((uint32_t)0x00000002) |
#define | DMA_ISR_HTIF1 ((uint32_t)0x00000004) |
#define | DMA_ISR_TEIF1 ((uint32_t)0x00000008) |
#define | DMA_ISR_GIF2 ((uint32_t)0x00000010) |
#define | DMA_ISR_TCIF2 ((uint32_t)0x00000020) |
#define | DMA_ISR_HTIF2 ((uint32_t)0x00000040) |
#define | DMA_ISR_TEIF2 ((uint32_t)0x00000080) |
#define | DMA_ISR_GIF3 ((uint32_t)0x00000100) |
#define | DMA_ISR_TCIF3 ((uint32_t)0x00000200) |
#define | DMA_ISR_HTIF3 ((uint32_t)0x00000400) |
#define | DMA_ISR_TEIF3 ((uint32_t)0x00000800) |
#define | DMA_ISR_GIF4 ((uint32_t)0x00001000) |
#define | DMA_ISR_TCIF4 ((uint32_t)0x00002000) |
#define | DMA_ISR_HTIF4 ((uint32_t)0x00004000) |
#define | DMA_ISR_TEIF4 ((uint32_t)0x00008000) |
#define | DMA_ISR_GIF5 ((uint32_t)0x00010000) |
#define | DMA_ISR_TCIF5 ((uint32_t)0x00020000) |
#define | DMA_ISR_HTIF5 ((uint32_t)0x00040000) |
#define | DMA_ISR_TEIF5 ((uint32_t)0x00080000) |
#define | DMA_ISR_GIF6 ((uint32_t)0x00100000) |
#define | DMA_ISR_TCIF6 ((uint32_t)0x00200000) |
#define | DMA_ISR_HTIF6 ((uint32_t)0x00400000) |
#define | DMA_ISR_TEIF6 ((uint32_t)0x00800000) |
#define | DMA_ISR_GIF7 ((uint32_t)0x01000000) |
#define | DMA_ISR_TCIF7 ((uint32_t)0x02000000) |
#define | DMA_ISR_HTIF7 ((uint32_t)0x04000000) |
#define | DMA_ISR_TEIF7 ((uint32_t)0x08000000) |
#define | DMA_IFCR_CGIF1 ((uint32_t)0x00000001) |
#define | DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) |
#define | DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) |
#define | DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) |
#define | DMA_IFCR_CGIF2 ((uint32_t)0x00000010) |
#define | DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) |
#define | DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) |
#define | DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) |
#define | DMA_IFCR_CGIF3 ((uint32_t)0x00000100) |
#define | DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) |
#define | DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) |
#define | DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) |
#define | DMA_IFCR_CGIF4 ((uint32_t)0x00001000) |
#define | DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) |
#define | DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) |
#define | DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) |
#define | DMA_IFCR_CGIF5 ((uint32_t)0x00010000) |
#define | DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) |
#define | DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) |
#define | DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) |
#define | DMA_IFCR_CGIF6 ((uint32_t)0x00100000) |
#define | DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) |
#define | DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) |
#define | DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) |
#define | DMA_IFCR_CGIF7 ((uint32_t)0x01000000) |
#define | DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) |
#define | DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) |
#define | DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) |
#define | DMA_CCR1_EN ((uint16_t)0x0001) |
#define | DMA_CCR1_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR1_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR1_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR1_DIR ((uint16_t)0x0010) |
#define | DMA_CCR1_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR1_PINC ((uint16_t)0x0040) |
#define | DMA_CCR1_MINC ((uint16_t)0x0080) |
#define | DMA_CCR1_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR1_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR1_PL ((uint16_t)0x3000) |
#define | DMA_CCR1_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR1_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR1_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR2_EN ((uint16_t)0x0001) |
#define | DMA_CCR2_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR2_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR2_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR2_DIR ((uint16_t)0x0010) |
#define | DMA_CCR2_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR2_PINC ((uint16_t)0x0040) |
#define | DMA_CCR2_MINC ((uint16_t)0x0080) |
#define | DMA_CCR2_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR2_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR2_PL ((uint16_t)0x3000) |
#define | DMA_CCR2_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR2_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR2_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR3_EN ((uint16_t)0x0001) |
#define | DMA_CCR3_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR3_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR3_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR3_DIR ((uint16_t)0x0010) |
#define | DMA_CCR3_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR3_PINC ((uint16_t)0x0040) |
#define | DMA_CCR3_MINC ((uint16_t)0x0080) |
#define | DMA_CCR3_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR3_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR3_PL ((uint16_t)0x3000) |
#define | DMA_CCR3_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR3_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR3_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR4_EN ((uint16_t)0x0001) |
#define | DMA_CCR4_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR4_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR4_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR4_DIR ((uint16_t)0x0010) |
#define | DMA_CCR4_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR4_PINC ((uint16_t)0x0040) |
#define | DMA_CCR4_MINC ((uint16_t)0x0080) |
#define | DMA_CCR4_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR4_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR4_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR4_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR4_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR4_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR4_PL ((uint16_t)0x3000) |
#define | DMA_CCR4_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR4_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR4_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR5_EN ((uint16_t)0x0001) |
#define | DMA_CCR5_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR5_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR5_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR5_DIR ((uint16_t)0x0010) |
#define | DMA_CCR5_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR5_PINC ((uint16_t)0x0040) |
#define | DMA_CCR5_MINC ((uint16_t)0x0080) |
#define | DMA_CCR5_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR5_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR5_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR5_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR5_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR5_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR5_PL ((uint16_t)0x3000) |
#define | DMA_CCR5_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR5_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR5_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR6_EN ((uint16_t)0x0001) |
#define | DMA_CCR6_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR6_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR6_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR6_DIR ((uint16_t)0x0010) |
#define | DMA_CCR6_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR6_PINC ((uint16_t)0x0040) |
#define | DMA_CCR6_MINC ((uint16_t)0x0080) |
#define | DMA_CCR6_PSIZE ((uint16_t)0x0300) |
#define | DMA_CCR6_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR6_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR6_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR6_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR6_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR6_PL ((uint16_t)0x3000) |
#define | DMA_CCR6_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR6_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR6_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CCR7_EN ((uint16_t)0x0001) |
#define | DMA_CCR7_TCIE ((uint16_t)0x0002) |
#define | DMA_CCR7_HTIE ((uint16_t)0x0004) |
#define | DMA_CCR7_TEIE ((uint16_t)0x0008) |
#define | DMA_CCR7_DIR ((uint16_t)0x0010) |
#define | DMA_CCR7_CIRC ((uint16_t)0x0020) |
#define | DMA_CCR7_PINC ((uint16_t)0x0040) |
#define | DMA_CCR7_MINC ((uint16_t)0x0080) |
#define | DMA_CCR7_PSIZE , ((uint16_t)0x0300) |
#define | DMA_CCR7_PSIZE_0 ((uint16_t)0x0100) |
#define | DMA_CCR7_PSIZE_1 ((uint16_t)0x0200) |
#define | DMA_CCR7_MSIZE ((uint16_t)0x0C00) |
#define | DMA_CCR7_MSIZE_0 ((uint16_t)0x0400) |
#define | DMA_CCR7_MSIZE_1 ((uint16_t)0x0800) |
#define | DMA_CCR7_PL ((uint16_t)0x3000) |
#define | DMA_CCR7_PL_0 ((uint16_t)0x1000) |
#define | DMA_CCR7_PL_1 ((uint16_t)0x2000) |
#define | DMA_CCR7_MEM2MEM ((uint16_t)0x4000) |
#define | DMA_CNDTR1_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR2_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR3_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR4_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR5_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR6_NDT ((uint16_t)0xFFFF) |
#define | DMA_CNDTR7_NDT ((uint16_t)0xFFFF) |
#define | DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF) |
#define | DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF) |
#define | ADC_SR_AWD ((uint8_t)0x01) |
#define | ADC_SR_EOC ((uint8_t)0x02) |
#define | ADC_SR_JEOC ((uint8_t)0x04) |
#define | ADC_SR_JSTRT ((uint8_t)0x08) |
#define | ADC_SR_STRT ((uint8_t)0x10) |
#define | ADC_CR1_AWDCH ((uint32_t)0x0000001F) |
#define | ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) |
#define | ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) |
#define | ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) |
#define | ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) |
#define | ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) |
#define | ADC_CR1_EOCIE ((uint32_t)0x00000020) |
#define | ADC_CR1_AWDIE ((uint32_t)0x00000040) |
#define | ADC_CR1_JEOCIE ((uint32_t)0x00000080) |
#define | ADC_CR1_SCAN ((uint32_t)0x00000100) |
#define | ADC_CR1_AWDSGL ((uint32_t)0x00000200) |
#define | ADC_CR1_JAUTO ((uint32_t)0x00000400) |
#define | ADC_CR1_DISCEN ((uint32_t)0x00000800) |
#define | ADC_CR1_JDISCEN ((uint32_t)0x00001000) |
#define | ADC_CR1_DISCNUM ((uint32_t)0x0000E000) |
#define | ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) |
#define | ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) |
#define | ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) |
#define | ADC_CR1_DUALMOD ((uint32_t)0x000F0000) |
#define | ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000) |
#define | ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000) |
#define | ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000) |
#define | ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000) |
#define | ADC_CR1_JAWDEN ((uint32_t)0x00400000) |
#define | ADC_CR1_AWDEN ((uint32_t)0x00800000) |
#define | ADC_CR2_ADON ((uint32_t)0x00000001) |
#define | ADC_CR2_CONT ((uint32_t)0x00000002) |
#define | ADC_CR2_CAL ((uint32_t)0x00000004) |
#define | ADC_CR2_RSTCAL ((uint32_t)0x00000008) |
#define | ADC_CR2_DMA ((uint32_t)0x00000100) |
#define | ADC_CR2_ALIGN ((uint32_t)0x00000800) |
#define | ADC_CR2_JEXTSEL ((uint32_t)0x00007000) |
#define | ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000) |
#define | ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000) |
#define | ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000) |
#define | ADC_CR2_JEXTTRIG ((uint32_t)0x00008000) |
#define | ADC_CR2_EXTSEL ((uint32_t)0x000E0000) |
#define | ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000) |
#define | ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000) |
#define | ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000) |
#define | ADC_CR2_EXTTRIG ((uint32_t)0x00100000) |
#define | ADC_CR2_JSWSTART ((uint32_t)0x00200000) |
#define | ADC_CR2_SWSTART ((uint32_t)0x00400000) |
#define | ADC_CR2_TSVREFE ((uint32_t)0x00800000) |
#define | ADC_SMPR1_SMP10 ((uint32_t)0x00000007) |
#define | ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) |
#define | ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) |
#define | ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) |
#define | ADC_SMPR1_SMP11 ((uint32_t)0x00000038) |
#define | ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) |
#define | ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) |
#define | ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) |
#define | ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) |
#define | ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) |
#define | ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) |
#define | ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) |
#define | ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) |
#define | ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) |
#define | ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) |
#define | ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) |
#define | ADC_SMPR1_SMP14 ((uint32_t)0x00007000) |
#define | ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) |
#define | ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) |
#define | ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) |
#define | ADC_SMPR1_SMP15 ((uint32_t)0x00038000) |
#define | ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) |
#define | ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) |
#define | ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) |
#define | ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) |
#define | ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) |
#define | ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) |
#define | ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) |
#define | ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) |
#define | ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) |
#define | ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) |
#define | ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) |
#define | ADC_SMPR2_SMP0 ((uint32_t)0x00000007) |
#define | ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) |
#define | ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) |
#define | ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) |
#define | ADC_SMPR2_SMP1 ((uint32_t)0x00000038) |
#define | ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) |
#define | ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) |
#define | ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) |
#define | ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) |
#define | ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) |
#define | ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) |
#define | ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) |
#define | ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) |
#define | ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) |
#define | ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) |
#define | ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) |
#define | ADC_SMPR2_SMP4 ((uint32_t)0x00007000) |
#define | ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) |
#define | ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) |
#define | ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) |
#define | ADC_SMPR2_SMP5 ((uint32_t)0x00038000) |
#define | ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) |
#define | ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) |
#define | ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) |
#define | ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) |
#define | ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) |
#define | ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) |
#define | ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) |
#define | ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) |
#define | ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) |
#define | ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) |
#define | ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) |
#define | ADC_SMPR2_SMP8 ((uint32_t)0x07000000) |
#define | ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) |
#define | ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) |
#define | ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) |
#define | ADC_SMPR2_SMP9 ((uint32_t)0x38000000) |
#define | ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) |
#define | ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) |
#define | ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) |
#define | ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) |
#define | ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) |
#define | ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) |
#define | ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) |
#define | ADC_HTR_HT ((uint16_t)0x0FFF) |
#define | ADC_LTR_LT ((uint16_t)0x0FFF) |
#define | ADC_SQR1_SQ13 ((uint32_t)0x0000001F) |
#define | ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) |
#define | ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) |
#define | ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) |
#define | ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) |
#define | ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) |
#define | ADC_SQR1_SQ14 ((uint32_t)0x000003E0) |
#define | ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) |
#define | ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) |
#define | ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) |
#define | ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) |
#define | ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) |
#define | ADC_SQR1_SQ15 ((uint32_t)0x00007C00) |
#define | ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) |
#define | ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) |
#define | ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) |
#define | ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) |
#define | ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) |
#define | ADC_SQR1_SQ16 ((uint32_t)0x000F8000) |
#define | ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) |
#define | ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) |
#define | ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) |
#define | ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) |
#define | ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) |
#define | ADC_SQR1_L ((uint32_t)0x00F00000) |
#define | ADC_SQR1_L_0 ((uint32_t)0x00100000) |
#define | ADC_SQR1_L_1 ((uint32_t)0x00200000) |
#define | ADC_SQR1_L_2 ((uint32_t)0x00400000) |
#define | ADC_SQR1_L_3 ((uint32_t)0x00800000) |
#define | ADC_SQR2_SQ7 ((uint32_t)0x0000001F) |
#define | ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) |
#define | ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) |
#define | ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) |
#define | ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) |
#define | ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) |
#define | ADC_SQR2_SQ8 ((uint32_t)0x000003E0) |
#define | ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) |
#define | ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) |
#define | ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) |
#define | ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) |
#define | ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) |
#define | ADC_SQR2_SQ9 ((uint32_t)0x00007C00) |
#define | ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) |
#define | ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) |
#define | ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) |
#define | ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) |
#define | ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) |
#define | ADC_SQR2_SQ10 ((uint32_t)0x000F8000) |
#define | ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) |
#define | ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) |
#define | ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) |
#define | ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) |
#define | ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) |
#define | ADC_SQR2_SQ11 ((uint32_t)0x01F00000) |
#define | ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) |
#define | ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) |
#define | ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) |
#define | ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) |
#define | ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) |
#define | ADC_SQR2_SQ12 ((uint32_t)0x3E000000) |
#define | ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) |
#define | ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) |
#define | ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) |
#define | ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) |
#define | ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) |
#define | ADC_SQR3_SQ1 ((uint32_t)0x0000001F) |
#define | ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) |
#define | ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) |
#define | ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) |
#define | ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) |
#define | ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) |
#define | ADC_SQR3_SQ2 ((uint32_t)0x000003E0) |
#define | ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) |
#define | ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) |
#define | ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) |
#define | ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) |
#define | ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) |
#define | ADC_SQR3_SQ3 ((uint32_t)0x00007C00) |
#define | ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) |
#define | ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) |
#define | ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) |
#define | ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) |
#define | ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) |
#define | ADC_SQR3_SQ4 ((uint32_t)0x000F8000) |
#define | ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) |
#define | ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) |
#define | ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) |
#define | ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) |
#define | ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) |
#define | ADC_SQR3_SQ5 ((uint32_t)0x01F00000) |
#define | ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) |
#define | ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) |
#define | ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) |
#define | ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) |
#define | ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) |
#define | ADC_SQR3_SQ6 ((uint32_t)0x3E000000) |
#define | ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) |
#define | ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) |
#define | ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) |
#define | ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) |
#define | ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) |
#define | ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) |
#define | ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) |
#define | ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) |
#define | ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) |
#define | ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) |
#define | ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) |
#define | ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) |
#define | ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) |
#define | ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) |
#define | ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) |
#define | ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) |
#define | ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) |
#define | ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) |
#define | ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) |
#define | ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) |
#define | ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) |
#define | ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) |
#define | ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) |
#define | ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) |
#define | ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) |
#define | ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) |
#define | ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) |
#define | ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) |
#define | ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) |
#define | ADC_JSQR_JL ((uint32_t)0x00300000) |
#define | ADC_JSQR_JL_0 ((uint32_t)0x00100000) |
#define | ADC_JSQR_JL_1 ((uint32_t)0x00200000) |
#define | ADC_JDR1_JDATA ((uint16_t)0xFFFF) |
#define | ADC_JDR2_JDATA ((uint16_t)0xFFFF) |
#define | ADC_JDR3_JDATA ((uint16_t)0xFFFF) |
#define | ADC_JDR4_JDATA ((uint16_t)0xFFFF) |
#define | ADC_DR_DATA ((uint32_t)0x0000FFFF) |
#define | ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) |
#define | DAC_CR_EN1 ((uint32_t)0x00000001) |
#define | DAC_CR_BOFF1 ((uint32_t)0x00000002) |
#define | DAC_CR_TEN1 ((uint32_t)0x00000004) |
#define | DAC_CR_TSEL1 ((uint32_t)0x00000038) |
#define | DAC_CR_TSEL1_0 ((uint32_t)0x00000008) |
#define | DAC_CR_TSEL1_1 ((uint32_t)0x00000010) |
#define | DAC_CR_TSEL1_2 ((uint32_t)0x00000020) |
#define | DAC_CR_WAVE1 ((uint32_t)0x000000C0) |
#define | DAC_CR_WAVE1_0 ((uint32_t)0x00000040) |
#define | DAC_CR_WAVE1_1 ((uint32_t)0x00000080) |
#define | DAC_CR_MAMP1 ((uint32_t)0x00000F00) |
#define | DAC_CR_MAMP1_0 ((uint32_t)0x00000100) |
#define | DAC_CR_MAMP1_1 ((uint32_t)0x00000200) |
#define | DAC_CR_MAMP1_2 ((uint32_t)0x00000400) |
#define | DAC_CR_MAMP1_3 ((uint32_t)0x00000800) |
#define | DAC_CR_DMAEN1 ((uint32_t)0x00001000) |
#define | DAC_CR_EN2 ((uint32_t)0x00010000) |
#define | DAC_CR_BOFF2 ((uint32_t)0x00020000) |
#define | DAC_CR_TEN2 ((uint32_t)0x00040000) |
#define | DAC_CR_TSEL2 ((uint32_t)0x00380000) |
#define | DAC_CR_TSEL2_0 ((uint32_t)0x00080000) |
#define | DAC_CR_TSEL2_1 ((uint32_t)0x00100000) |
#define | DAC_CR_TSEL2_2 ((uint32_t)0x00200000) |
#define | DAC_CR_WAVE2 ((uint32_t)0x00C00000) |
#define | DAC_CR_WAVE2_0 ((uint32_t)0x00400000) |
#define | DAC_CR_WAVE2_1 ((uint32_t)0x00800000) |
#define | DAC_CR_MAMP2 ((uint32_t)0x0F000000) |
#define | DAC_CR_MAMP2_0 ((uint32_t)0x01000000) |
#define | DAC_CR_MAMP2_1 ((uint32_t)0x02000000) |
#define | DAC_CR_MAMP2_2 ((uint32_t)0x04000000) |
#define | DAC_CR_MAMP2_3 ((uint32_t)0x08000000) |
#define | DAC_CR_DMAEN2 ((uint32_t)0x10000000) |
#define | DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) |
#define | DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) |
#define | DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) |
#define | DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) |
#define | DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) |
#define | DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) |
#define | DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) |
#define | DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) |
#define | DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) |
#define | DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) |
#define | DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) |
#define | DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) |
#define | DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) |
#define | DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) |
#define | DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) |
#define | DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) |
#define | DAC_SR_DMAUDR1 ((uint32_t)0x00002000) |
#define | DAC_SR_DMAUDR2 ((uint32_t)0x20000000) |
#define | CEC_CFGR_PE ((uint16_t)0x0001) |
#define | CEC_CFGR_IE ((uint16_t)0x0002) |
#define | CEC_CFGR_BTEM ((uint16_t)0x0004) |
#define | CEC_CFGR_BPEM ((uint16_t)0x0008) |
#define | CEC_OAR_OA ((uint16_t)0x000F) |
#define | CEC_OAR_OA_0 ((uint16_t)0x0001) |
#define | CEC_OAR_OA_1 ((uint16_t)0x0002) |
#define | CEC_OAR_OA_2 ((uint16_t)0x0004) |
#define | CEC_OAR_OA_3 ((uint16_t)0x0008) |
#define | CEC_PRES_PRES ((uint16_t)0x3FFF) |
#define | CEC_ESR_BTE ((uint16_t)0x0001) |
#define | CEC_ESR_BPE ((uint16_t)0x0002) |
#define | CEC_ESR_RBTFE ((uint16_t)0x0004) |
#define | CEC_ESR_SBE ((uint16_t)0x0008) |
#define | CEC_ESR_ACKE ((uint16_t)0x0010) |
#define | CEC_ESR_LINE ((uint16_t)0x0020) |
#define | CEC_ESR_TBTFE ((uint16_t)0x0040) |
#define | CEC_CSR_TSOM ((uint16_t)0x0001) |
#define | CEC_CSR_TEOM ((uint16_t)0x0002) |
#define | CEC_CSR_TERR ((uint16_t)0x0004) |
#define | CEC_CSR_TBTRF ((uint16_t)0x0008) |
#define | CEC_CSR_RSOM ((uint16_t)0x0010) |
#define | CEC_CSR_REOM ((uint16_t)0x0020) |
#define | CEC_CSR_RERR ((uint16_t)0x0040) |
#define | CEC_CSR_RBTF ((uint16_t)0x0080) |
#define | CEC_TXD_TXD ((uint16_t)0x00FF) |
#define | CEC_RXD_RXD ((uint16_t)0x00FF) |
#define | TIM_CR1_CEN ((uint16_t)0x0001) |
#define | TIM_CR1_UDIS ((uint16_t)0x0002) |
#define | TIM_CR1_URS ((uint16_t)0x0004) |
#define | TIM_CR1_OPM ((uint16_t)0x0008) |
#define | TIM_CR1_DIR ((uint16_t)0x0010) |
#define | TIM_CR1_CMS ((uint16_t)0x0060) |
#define | TIM_CR1_CMS_0 ((uint16_t)0x0020) |
#define | TIM_CR1_CMS_1 ((uint16_t)0x0040) |
#define | TIM_CR1_ARPE ((uint16_t)0x0080) |
#define | TIM_CR1_CKD ((uint16_t)0x0300) |
#define | TIM_CR1_CKD_0 ((uint16_t)0x0100) |
#define | TIM_CR1_CKD_1 ((uint16_t)0x0200) |
#define | TIM_CR2_CCPC ((uint16_t)0x0001) |
#define | TIM_CR2_CCUS ((uint16_t)0x0004) |
#define | TIM_CR2_CCDS ((uint16_t)0x0008) |
#define | TIM_CR2_MMS ((uint16_t)0x0070) |
#define | TIM_CR2_MMS_0 ((uint16_t)0x0010) |
#define | TIM_CR2_MMS_1 ((uint16_t)0x0020) |
#define | TIM_CR2_MMS_2 ((uint16_t)0x0040) |
#define | TIM_CR2_TI1S ((uint16_t)0x0080) |
#define | TIM_CR2_OIS1 ((uint16_t)0x0100) |
#define | TIM_CR2_OIS1N ((uint16_t)0x0200) |
#define | TIM_CR2_OIS2 ((uint16_t)0x0400) |
#define | TIM_CR2_OIS2N ((uint16_t)0x0800) |
#define | TIM_CR2_OIS3 ((uint16_t)0x1000) |
#define | TIM_CR2_OIS3N ((uint16_t)0x2000) |
#define | TIM_CR2_OIS4 ((uint16_t)0x4000) |
#define | TIM_SMCR_SMS ((uint16_t)0x0007) |
#define | TIM_SMCR_SMS_0 ((uint16_t)0x0001) |
#define | TIM_SMCR_SMS_1 ((uint16_t)0x0002) |
#define | TIM_SMCR_SMS_2 ((uint16_t)0x0004) |
#define | TIM_SMCR_TS ((uint16_t)0x0070) |
#define | TIM_SMCR_TS_0 ((uint16_t)0x0010) |
#define | TIM_SMCR_TS_1 ((uint16_t)0x0020) |
#define | TIM_SMCR_TS_2 ((uint16_t)0x0040) |
#define | TIM_SMCR_MSM ((uint16_t)0x0080) |
#define | TIM_SMCR_ETF ((uint16_t)0x0F00) |
#define | TIM_SMCR_ETF_0 ((uint16_t)0x0100) |
#define | TIM_SMCR_ETF_1 ((uint16_t)0x0200) |
#define | TIM_SMCR_ETF_2 ((uint16_t)0x0400) |
#define | TIM_SMCR_ETF_3 ((uint16_t)0x0800) |
#define | TIM_SMCR_ETPS ((uint16_t)0x3000) |
#define | TIM_SMCR_ETPS_0 ((uint16_t)0x1000) |
#define | TIM_SMCR_ETPS_1 ((uint16_t)0x2000) |
#define | TIM_SMCR_ECE ((uint16_t)0x4000) |
#define | TIM_SMCR_ETP ((uint16_t)0x8000) |
#define | TIM_DIER_UIE ((uint16_t)0x0001) |
#define | TIM_DIER_CC1IE ((uint16_t)0x0002) |
#define | TIM_DIER_CC2IE ((uint16_t)0x0004) |
#define | TIM_DIER_CC3IE ((uint16_t)0x0008) |
#define | TIM_DIER_CC4IE ((uint16_t)0x0010) |
#define | TIM_DIER_COMIE ((uint16_t)0x0020) |
#define | TIM_DIER_TIE ((uint16_t)0x0040) |
#define | TIM_DIER_BIE ((uint16_t)0x0080) |
#define | TIM_DIER_UDE ((uint16_t)0x0100) |
#define | TIM_DIER_CC1DE ((uint16_t)0x0200) |
#define | TIM_DIER_CC2DE ((uint16_t)0x0400) |
#define | TIM_DIER_CC3DE ((uint16_t)0x0800) |
#define | TIM_DIER_CC4DE ((uint16_t)0x1000) |
#define | TIM_DIER_COMDE ((uint16_t)0x2000) |
#define | TIM_DIER_TDE ((uint16_t)0x4000) |
#define | TIM_SR_UIF ((uint16_t)0x0001) |
#define | TIM_SR_CC1IF ((uint16_t)0x0002) |
#define | TIM_SR_CC2IF ((uint16_t)0x0004) |
#define | TIM_SR_CC3IF ((uint16_t)0x0008) |
#define | TIM_SR_CC4IF ((uint16_t)0x0010) |
#define | TIM_SR_COMIF ((uint16_t)0x0020) |
#define | TIM_SR_TIF ((uint16_t)0x0040) |
#define | TIM_SR_BIF ((uint16_t)0x0080) |
#define | TIM_SR_CC1OF ((uint16_t)0x0200) |
#define | TIM_SR_CC2OF ((uint16_t)0x0400) |
#define | TIM_SR_CC3OF ((uint16_t)0x0800) |
#define | TIM_SR_CC4OF ((uint16_t)0x1000) |
#define | TIM_EGR_UG ((uint8_t)0x01) |
#define | TIM_EGR_CC1G ((uint8_t)0x02) |
#define | TIM_EGR_CC2G ((uint8_t)0x04) |
#define | TIM_EGR_CC3G ((uint8_t)0x08) |
#define | TIM_EGR_CC4G ((uint8_t)0x10) |
#define | TIM_EGR_COMG ((uint8_t)0x20) |
#define | TIM_EGR_TG ((uint8_t)0x40) |
#define | TIM_EGR_BG ((uint8_t)0x80) |
#define | TIM_CCMR1_CC1S ((uint16_t)0x0003) |
#define | TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) |
#define | TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) |
#define | TIM_CCMR1_OC1FE ((uint16_t)0x0004) |
#define | TIM_CCMR1_OC1PE ((uint16_t)0x0008) |
#define | TIM_CCMR1_OC1M ((uint16_t)0x0070) |
#define | TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) |
#define | TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) |
#define | TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) |
#define | TIM_CCMR1_OC1CE ((uint16_t)0x0080) |
#define | TIM_CCMR1_CC2S ((uint16_t)0x0300) |
#define | TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) |
#define | TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) |
#define | TIM_CCMR1_OC2FE ((uint16_t)0x0400) |
#define | TIM_CCMR1_OC2PE ((uint16_t)0x0800) |
#define | TIM_CCMR1_OC2M ((uint16_t)0x7000) |
#define | TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) |
#define | TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) |
#define | TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) |
#define | TIM_CCMR1_OC2CE ((uint16_t)0x8000) |
#define | TIM_CCMR1_IC1PSC ((uint16_t)0x000C) |
#define | TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) |
#define | TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) |
#define | TIM_CCMR1_IC1F ((uint16_t)0x00F0) |
#define | TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) |
#define | TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) |
#define | TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) |
#define | TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) |
#define | TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) |
#define | TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) |
#define | TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) |
#define | TIM_CCMR1_IC2F ((uint16_t)0xF000) |
#define | TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) |
#define | TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) |
#define | TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) |
#define | TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) |
#define | TIM_CCMR2_CC3S ((uint16_t)0x0003) |
#define | TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) |
#define | TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) |
#define | TIM_CCMR2_OC3FE ((uint16_t)0x0004) |
#define | TIM_CCMR2_OC3PE ((uint16_t)0x0008) |
#define | TIM_CCMR2_OC3M ((uint16_t)0x0070) |
#define | TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) |
#define | TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) |
#define | TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) |
#define | TIM_CCMR2_OC3CE ((uint16_t)0x0080) |
#define | TIM_CCMR2_CC4S ((uint16_t)0x0300) |
#define | TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) |
#define | TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) |
#define | TIM_CCMR2_OC4FE ((uint16_t)0x0400) |
#define | TIM_CCMR2_OC4PE ((uint16_t)0x0800) |
#define | TIM_CCMR2_OC4M ((uint16_t)0x7000) |
#define | TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) |
#define | TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) |
#define | TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) |
#define | TIM_CCMR2_OC4CE ((uint16_t)0x8000) |
#define | TIM_CCMR2_IC3PSC ((uint16_t)0x000C) |
#define | TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) |
#define | TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) |
#define | TIM_CCMR2_IC3F ((uint16_t)0x00F0) |
#define | TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) |
#define | TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) |
#define | TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) |
#define | TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) |
#define | TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) |
#define | TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) |
#define | TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) |
#define | TIM_CCMR2_IC4F ((uint16_t)0xF000) |
#define | TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) |
#define | TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) |
#define | TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) |
#define | TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) |
#define | TIM_CCER_CC1E ((uint16_t)0x0001) |
#define | TIM_CCER_CC1P ((uint16_t)0x0002) |
#define | TIM_CCER_CC1NE ((uint16_t)0x0004) |
#define | TIM_CCER_CC1NP ((uint16_t)0x0008) |
#define | TIM_CCER_CC2E ((uint16_t)0x0010) |
#define | TIM_CCER_CC2P ((uint16_t)0x0020) |
#define | TIM_CCER_CC2NE ((uint16_t)0x0040) |
#define | TIM_CCER_CC2NP ((uint16_t)0x0080) |
#define | TIM_CCER_CC3E ((uint16_t)0x0100) |
#define | TIM_CCER_CC3P ((uint16_t)0x0200) |
#define | TIM_CCER_CC3NE ((uint16_t)0x0400) |
#define | TIM_CCER_CC3NP ((uint16_t)0x0800) |
#define | TIM_CCER_CC4E ((uint16_t)0x1000) |
#define | TIM_CCER_CC4P ((uint16_t)0x2000) |
#define | TIM_CCER_CC4NP ((uint16_t)0x8000) |
#define | TIM_CNT_CNT ((uint16_t)0xFFFF) |
#define | TIM_PSC_PSC ((uint16_t)0xFFFF) |
#define | TIM_ARR_ARR ((uint16_t)0xFFFF) |
#define | TIM_RCR_REP ((uint8_t)0xFF) |
#define | TIM_CCR1_CCR1 ((uint16_t)0xFFFF) |
#define | TIM_CCR2_CCR2 ((uint16_t)0xFFFF) |
#define | TIM_CCR3_CCR3 ((uint16_t)0xFFFF) |
#define | TIM_CCR4_CCR4 ((uint16_t)0xFFFF) |
#define | TIM_BDTR_DTG ((uint16_t)0x00FF) |
#define | TIM_BDTR_DTG_0 ((uint16_t)0x0001) |
#define | TIM_BDTR_DTG_1 ((uint16_t)0x0002) |
#define | TIM_BDTR_DTG_2 ((uint16_t)0x0004) |
#define | TIM_BDTR_DTG_3 ((uint16_t)0x0008) |
#define | TIM_BDTR_DTG_4 ((uint16_t)0x0010) |
#define | TIM_BDTR_DTG_5 ((uint16_t)0x0020) |
#define | TIM_BDTR_DTG_6 ((uint16_t)0x0040) |
#define | TIM_BDTR_DTG_7 ((uint16_t)0x0080) |
#define | TIM_BDTR_LOCK ((uint16_t)0x0300) |
#define | TIM_BDTR_LOCK_0 ((uint16_t)0x0100) |
#define | TIM_BDTR_LOCK_1 ((uint16_t)0x0200) |
#define | TIM_BDTR_OSSI ((uint16_t)0x0400) |
#define | TIM_BDTR_OSSR ((uint16_t)0x0800) |
#define | TIM_BDTR_BKE ((uint16_t)0x1000) |
#define | TIM_BDTR_BKP ((uint16_t)0x2000) |
#define | TIM_BDTR_AOE ((uint16_t)0x4000) |
#define | TIM_BDTR_MOE ((uint16_t)0x8000) |
#define | TIM_DCR_DBA ((uint16_t)0x001F) |
#define | TIM_DCR_DBA_0 ((uint16_t)0x0001) |
#define | TIM_DCR_DBA_1 ((uint16_t)0x0002) |
#define | TIM_DCR_DBA_2 ((uint16_t)0x0004) |
#define | TIM_DCR_DBA_3 ((uint16_t)0x0008) |
#define | TIM_DCR_DBA_4 ((uint16_t)0x0010) |
#define | TIM_DCR_DBL ((uint16_t)0x1F00) |
#define | TIM_DCR_DBL_0 ((uint16_t)0x0100) |
#define | TIM_DCR_DBL_1 ((uint16_t)0x0200) |
#define | TIM_DCR_DBL_2 ((uint16_t)0x0400) |
#define | TIM_DCR_DBL_3 ((uint16_t)0x0800) |
#define | TIM_DCR_DBL_4 ((uint16_t)0x1000) |
#define | TIM_DMAR_DMAB ((uint16_t)0xFFFF) |
#define | RTC_CRH_SECIE ((uint8_t)0x01) |
#define | RTC_CRH_ALRIE ((uint8_t)0x02) |
#define | RTC_CRH_OWIE ((uint8_t)0x04) |
#define | RTC_CRL_SECF ((uint8_t)0x01) |
#define | RTC_CRL_ALRF ((uint8_t)0x02) |
#define | RTC_CRL_OWF ((uint8_t)0x04) |
#define | RTC_CRL_RSF ((uint8_t)0x08) |
#define | RTC_CRL_CNF ((uint8_t)0x10) |
#define | RTC_CRL_RTOFF ((uint8_t)0x20) |
#define | RTC_PRLH_PRL ((uint16_t)0x000F) |
#define | RTC_PRLL_PRL ((uint16_t)0xFFFF) |
#define | RTC_DIVH_RTC_DIV ((uint16_t)0x000F) |
#define | RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) |
#define | RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) |
#define | RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) |
#define | RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF) |
#define | RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF) |
#define | IWDG_KR_KEY ((uint16_t)0xFFFF) |
#define | IWDG_PR_PR ((uint8_t)0x07) |
#define | IWDG_PR_PR_0 ((uint8_t)0x01) |
#define | IWDG_PR_PR_1 ((uint8_t)0x02) |
#define | IWDG_PR_PR_2 ((uint8_t)0x04) |
#define | IWDG_RLR_RL ((uint16_t)0x0FFF) |
#define | IWDG_SR_PVU ((uint8_t)0x01) |
#define | IWDG_SR_RVU ((uint8_t)0x02) |
#define | WWDG_CR_T ((uint8_t)0x7F) |
#define | WWDG_CR_T0 ((uint8_t)0x01) |
#define | WWDG_CR_T1 ((uint8_t)0x02) |
#define | WWDG_CR_T2 ((uint8_t)0x04) |
#define | WWDG_CR_T3 ((uint8_t)0x08) |
#define | WWDG_CR_T4 ((uint8_t)0x10) |
#define | WWDG_CR_T5 ((uint8_t)0x20) |
#define | WWDG_CR_T6 ((uint8_t)0x40) |
#define | WWDG_CR_WDGA ((uint8_t)0x80) |
#define | WWDG_CFR_W ((uint16_t)0x007F) |
#define | WWDG_CFR_W0 ((uint16_t)0x0001) |
#define | WWDG_CFR_W1 ((uint16_t)0x0002) |
#define | WWDG_CFR_W2 ((uint16_t)0x0004) |
#define | WWDG_CFR_W3 ((uint16_t)0x0008) |
#define | WWDG_CFR_W4 ((uint16_t)0x0010) |
#define | WWDG_CFR_W5 ((uint16_t)0x0020) |
#define | WWDG_CFR_W6 ((uint16_t)0x0040) |
#define | WWDG_CFR_WDGTB ((uint16_t)0x0180) |
#define | WWDG_CFR_WDGTB0 ((uint16_t)0x0080) |
#define | WWDG_CFR_WDGTB1 ((uint16_t)0x0100) |
#define | WWDG_CFR_EWI ((uint16_t)0x0200) |
#define | WWDG_SR_EWIF ((uint8_t)0x01) |
#define | FSMC_BCR1_MBKEN ((uint32_t)0x00000001) |
#define | FSMC_BCR1_MUXEN ((uint32_t)0x00000002) |
#define | FSMC_BCR1_MTYP ((uint32_t)0x0000000C) |
#define | FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) |
#define | FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) |
#define | FSMC_BCR1_MWID ((uint32_t)0x00000030) |
#define | FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) |
#define | FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) |
#define | FSMC_BCR1_FACCEN ((uint32_t)0x00000040) |
#define | FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) |
#define | FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) |
#define | FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) |
#define | FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) |
#define | FSMC_BCR1_WREN ((uint32_t)0x00001000) |
#define | FSMC_BCR1_WAITEN ((uint32_t)0x00002000) |
#define | FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) |
#define | FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) |
#define | FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) |
#define | FSMC_BCR2_MBKEN ((uint32_t)0x00000001) |
#define | FSMC_BCR2_MUXEN ((uint32_t)0x00000002) |
#define | FSMC_BCR2_MTYP ((uint32_t)0x0000000C) |
#define | FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) |
#define | FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) |
#define | FSMC_BCR2_MWID ((uint32_t)0x00000030) |
#define | FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) |
#define | FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) |
#define | FSMC_BCR2_FACCEN ((uint32_t)0x00000040) |
#define | FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) |
#define | FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) |
#define | FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) |
#define | FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) |
#define | FSMC_BCR2_WREN ((uint32_t)0x00001000) |
#define | FSMC_BCR2_WAITEN ((uint32_t)0x00002000) |
#define | FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) |
#define | FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) |
#define | FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) |
#define | FSMC_BCR3_MBKEN ((uint32_t)0x00000001) |
#define | FSMC_BCR3_MUXEN ((uint32_t)0x00000002) |
#define | FSMC_BCR3_MTYP ((uint32_t)0x0000000C) |
#define | FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) |
#define | FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) |
#define | FSMC_BCR3_MWID ((uint32_t)0x00000030) |
#define | FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) |
#define | FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) |
#define | FSMC_BCR3_FACCEN ((uint32_t)0x00000040) |
#define | FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) |
#define | FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) |
#define | FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) |
#define | FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) |
#define | FSMC_BCR3_WREN ((uint32_t)0x00001000) |
#define | FSMC_BCR3_WAITEN ((uint32_t)0x00002000) |
#define | FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) |
#define | FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) |
#define | FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) |
#define | FSMC_BCR4_MBKEN ((uint32_t)0x00000001) |
#define | FSMC_BCR4_MUXEN ((uint32_t)0x00000002) |
#define | FSMC_BCR4_MTYP ((uint32_t)0x0000000C) |
#define | FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) |
#define | FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) |
#define | FSMC_BCR4_MWID ((uint32_t)0x00000030) |
#define | FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) |
#define | FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) |
#define | FSMC_BCR4_FACCEN ((uint32_t)0x00000040) |
#define | FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) |
#define | FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) |
#define | FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) |
#define | FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) |
#define | FSMC_BCR4_WREN ((uint32_t)0x00001000) |
#define | FSMC_BCR4_WAITEN ((uint32_t)0x00002000) |
#define | FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) |
#define | FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) |
#define | FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) |
#define | FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) |
#define | FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) |
#define | FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) |
#define | FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) |
#define | FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) |
#define | FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) |
#define | FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) |
#define | FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) |
#define | FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) |
#define | FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) |
#define | FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) |
#define | FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) |
#define | FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) |
#define | FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) |
#define | FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) |
#define | FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) |
#define | FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) |
#define | FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) |
#define | FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) |
#define | FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) |
#define | FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) |
#define | FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) |
#define | FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) |
#define | FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) |
#define | FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) |
#define | FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) |
#define | FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) |
#define | FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) |
#define | FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) |
#define | FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) |
#define | FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) |
#define | FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) |
#define | FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) |
#define | FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) |
#define | FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) |
#define | FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000) |
#define | FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000) |
#define | FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000) |
#define | FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000) |
#define | FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000) |
#define | FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000) |
#define | FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000) |
#define | FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000) |
#define | FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000) |
#define | FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000) |
#define | FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) |
#define | FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) |
#define | FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) |
#define | FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) |
#define | FSMC_PCR2_PBKEN ((uint32_t)0x00000004) |
#define | FSMC_PCR2_PTYP ((uint32_t)0x00000008) |
#define | FSMC_PCR2_PWID ((uint32_t)0x00000030) |
#define | FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) |
#define | FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) |
#define | FSMC_PCR2_ECCEN ((uint32_t)0x00000040) |
#define | FSMC_PCR2_TCLR ((uint32_t)0x00001E00) |
#define | FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) |
#define | FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) |
#define | FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) |
#define | FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) |
#define | FSMC_PCR2_TAR ((uint32_t)0x0001E000) |
#define | FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) |
#define | FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) |
#define | FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) |
#define | FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) |
#define | FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) |
#define | FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) |
#define | FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) |
#define | FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) |
#define | FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) |
#define | FSMC_PCR3_PBKEN ((uint32_t)0x00000004) |
#define | FSMC_PCR3_PTYP ((uint32_t)0x00000008) |
#define | FSMC_PCR3_PWID ((uint32_t)0x00000030) |
#define | FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) |
#define | FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) |
#define | FSMC_PCR3_ECCEN ((uint32_t)0x00000040) |
#define | FSMC_PCR3_TCLR ((uint32_t)0x00001E00) |
#define | FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) |
#define | FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) |
#define | FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) |
#define | FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) |
#define | FSMC_PCR3_TAR ((uint32_t)0x0001E000) |
#define | FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) |
#define | FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) |
#define | FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) |
#define | FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) |
#define | FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) |
#define | FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) |
#define | FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) |
#define | FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) |
#define | FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) |
#define | FSMC_PCR4_PBKEN ((uint32_t)0x00000004) |
#define | FSMC_PCR4_PTYP ((uint32_t)0x00000008) |
#define | FSMC_PCR4_PWID ((uint32_t)0x00000030) |
#define | FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) |
#define | FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) |
#define | FSMC_PCR4_ECCEN ((uint32_t)0x00000040) |
#define | FSMC_PCR4_TCLR ((uint32_t)0x00001E00) |
#define | FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) |
#define | FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) |
#define | FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) |
#define | FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) |
#define | FSMC_PCR4_TAR ((uint32_t)0x0001E000) |
#define | FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) |
#define | FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) |
#define | FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) |
#define | FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) |
#define | FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) |
#define | FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) |
#define | FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) |
#define | FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) |
#define | FSMC_SR2_IRS ((uint8_t)0x01) |
#define | FSMC_SR2_ILS ((uint8_t)0x02) |
#define | FSMC_SR2_IFS ((uint8_t)0x04) |
#define | FSMC_SR2_IREN ((uint8_t)0x08) |
#define | FSMC_SR2_ILEN ((uint8_t)0x10) |
#define | FSMC_SR2_IFEN ((uint8_t)0x20) |
#define | FSMC_SR2_FEMPT ((uint8_t)0x40) |
#define | FSMC_SR3_IRS ((uint8_t)0x01) |
#define | FSMC_SR3_ILS ((uint8_t)0x02) |
#define | FSMC_SR3_IFS ((uint8_t)0x04) |
#define | FSMC_SR3_IREN ((uint8_t)0x08) |
#define | FSMC_SR3_ILEN ((uint8_t)0x10) |
#define | FSMC_SR3_IFEN ((uint8_t)0x20) |
#define | FSMC_SR3_FEMPT ((uint8_t)0x40) |
#define | FSMC_SR4_IRS ((uint8_t)0x01) |
#define | FSMC_SR4_ILS ((uint8_t)0x02) |
#define | FSMC_SR4_IFS ((uint8_t)0x04) |
#define | FSMC_SR4_IREN ((uint8_t)0x08) |
#define | FSMC_SR4_ILEN ((uint8_t)0x10) |
#define | FSMC_SR4_IFEN ((uint8_t)0x20) |
#define | FSMC_SR4_FEMPT ((uint8_t)0x40) |
#define | FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) |
#define | FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) |
#define | FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) |
#define | FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) |
#define | FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) |
#define | FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) |
#define | FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) |
#define | FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) |
#define | FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) |
#define | FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) |
#define | FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) |
#define | FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) |
#define | FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) |
#define | FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) |
#define | FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) |
#define | FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) |
#define | FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) |
#define | FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) |
#define | FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) |
#define | FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) |
#define | FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) |
#define | FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) |
#define | FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) |
#define | FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) |
#define | FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) |
#define | FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) |
#define | FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) |
#define | FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) |
#define | FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) |
#define | FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) |
#define | FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) |
#define | FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) |
#define | FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) |
#define | FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) |
#define | FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) |
#define | FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) |
#define | FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) |
#define | FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) |
#define | FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) |
#define | FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) |
#define | FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) |
#define | FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) |
#define | FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) |
#define | FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) |
#define | FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) |
#define | FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) |
#define | FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) |
#define | FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) |
#define | FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) |
#define | FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) |
#define | FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) |
#define | FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) |
#define | FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) |
#define | FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) |
#define | FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) |
#define | FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) |
#define | FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) |
#define | FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) |
#define | FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) |
#define | FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) |
#define | FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) |
#define | FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) |
#define | FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) |
#define | FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) |
#define | FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) |
#define | FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) |
#define | FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) |
#define | FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) |
#define | FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) |
#define | FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) |
#define | FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) |
#define | FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) |
#define | FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) |
#define | FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) |
#define | FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) |
#define | FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) |
#define | FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) |
#define | FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) |
#define | FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) |
#define | FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) |
#define | FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) |
#define | FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) |
#define | FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) |
#define | FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) |
#define | FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) |
#define | FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) |
#define | FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) |
#define | FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) |
#define | FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) |
#define | FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) |
#define | FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) |
#define | FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) |
#define | FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) |
#define | FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) |
#define | FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) |
#define | FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) |
#define | FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) |
#define | FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) |
#define | FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) |
#define | FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) |
#define | FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) |
#define | FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) |
#define | FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) |
#define | FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) |
#define | FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) |
#define | FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) |
#define | FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) |
#define | FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) |
#define | FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) |
#define | FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) |
#define | FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) |
#define | FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) |
#define | FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) |
#define | FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) |
#define | FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) |
#define | FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) |
#define | FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) |
#define | FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) |
#define | FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) |
#define | FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) |
#define | FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) |
#define | FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) |
#define | FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) |
#define | FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) |
#define | FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) |
#define | FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) |
#define | FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) |
#define | FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) |
#define | FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) |
#define | FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) |
#define | FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) |
#define | FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) |
#define | FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) |
#define | FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) |
#define | FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) |
#define | FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) |
#define | FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) |
#define | FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) |
#define | FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) |
#define | FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) |
#define | FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) |
#define | FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) |
#define | FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) |
#define | FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) |
#define | FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) |
#define | FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) |
#define | FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) |
#define | FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) |
#define | FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) |
#define | FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) |
#define | FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) |
#define | FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) |
#define | FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) |
#define | FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) |
#define | FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) |
#define | FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) |
#define | FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) |
#define | FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) |
#define | FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) |
#define | FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) |
#define | FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) |
#define | FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) |
#define | FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) |
#define | FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) |
#define | FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) |
#define | FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) |
#define | FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) |
#define | FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) |
#define | FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) |
#define | FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) |
#define | FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) |
#define | FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) |
#define | FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) |
#define | FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) |
#define | FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) |
#define | FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) |
#define | FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) |
#define | FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) |
#define | FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) |
#define | FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) |
#define | FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) |
#define | FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) |
#define | FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) |
#define | FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) |
#define | FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) |
#define | FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) |
#define | FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) |
#define | FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) |
#define | FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) |
#define | FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) |
#define | FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) |
#define | FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) |
#define | FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) |
#define | FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) |
#define | FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) |
#define | FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) |
#define | FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) |
#define | FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) |
#define | FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) |
#define | FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) |
#define | FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) |
#define | FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) |
#define | FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) |
#define | FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) |
#define | FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) |
#define | FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) |
#define | FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) |
#define | FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) |
#define | FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) |
#define | FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) |
#define | FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) |
#define | FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) |
#define | FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) |
#define | FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) |
#define | FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) |
#define | FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) |
#define | FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) |
#define | FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) |
#define | FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) |
#define | FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) |
#define | FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) |
#define | FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) |
#define | FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) |
#define | FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) |
#define | FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) |
#define | FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) |
#define | FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) |
#define | FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) |
#define | FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) |
#define | FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) |
#define | FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) |
#define | FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) |
#define | FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) |
#define | FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) |
#define | FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) |
#define | FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) |
#define | FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) |
#define | FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) |
#define | FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) |
#define | FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) |
#define | FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) |
#define | FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) |
#define | FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) |
#define | FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) |
#define | FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) |
#define | FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) |
#define | FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) |
#define | FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) |
#define | FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) |
#define | FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) |
#define | FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) |
#define | FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) |
#define | FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) |
#define | FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_POWER_PWRCTRL ((uint8_t)0x03) |
#define | SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) |
#define | SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) |
#define | SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) |
#define | SDIO_CLKCR_CLKEN ((uint16_t)0x0100) |
#define | SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) |
#define | SDIO_CLKCR_BYPASS ((uint16_t)0x0400) |
#define | SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) |
#define | SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) |
#define | SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) |
#define | SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) |
#define | SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) |
#define | SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) |
#define | SDIO_CMD_CMDINDEX ((uint16_t)0x003F) |
#define | SDIO_CMD_WAITRESP ((uint16_t)0x00C0) |
#define | SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) |
#define | SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) |
#define | SDIO_CMD_WAITINT ((uint16_t)0x0100) |
#define | SDIO_CMD_WAITPEND ((uint16_t)0x0200) |
#define | SDIO_CMD_CPSMEN ((uint16_t)0x0400) |
#define | SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) |
#define | SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) |
#define | SDIO_CMD_NIEN ((uint16_t)0x2000) |
#define | SDIO_CMD_CEATACMD ((uint16_t)0x4000) |
#define | SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) |
#define | SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) |
#define | SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) |
#define | SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) |
#define | SDIO_DCTRL_DTEN ((uint16_t)0x0001) |
#define | SDIO_DCTRL_DTDIR ((uint16_t)0x0002) |
#define | SDIO_DCTRL_DTMODE ((uint16_t)0x0004) |
#define | SDIO_DCTRL_DMAEN ((uint16_t)0x0008) |
#define | SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) |
#define | SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) |
#define | SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) |
#define | SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) |
#define | SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) |
#define | SDIO_DCTRL_RWSTART ((uint16_t)0x0100) |
#define | SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) |
#define | SDIO_DCTRL_RWMOD ((uint16_t)0x0400) |
#define | SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) |
#define | SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) |
#define | SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) |
#define | SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) |
#define | SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) |
#define | SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) |
#define | SDIO_STA_TXUNDERR ((uint32_t)0x00000010) |
#define | SDIO_STA_RXOVERR ((uint32_t)0x00000020) |
#define | SDIO_STA_CMDREND ((uint32_t)0x00000040) |
#define | SDIO_STA_CMDSENT ((uint32_t)0x00000080) |
#define | SDIO_STA_DATAEND ((uint32_t)0x00000100) |
#define | SDIO_STA_STBITERR ((uint32_t)0x00000200) |
#define | SDIO_STA_DBCKEND ((uint32_t)0x00000400) |
#define | SDIO_STA_CMDACT ((uint32_t)0x00000800) |
#define | SDIO_STA_TXACT ((uint32_t)0x00001000) |
#define | SDIO_STA_RXACT ((uint32_t)0x00002000) |
#define | SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) |
#define | SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) |
#define | SDIO_STA_TXFIFOF ((uint32_t)0x00010000) |
#define | SDIO_STA_RXFIFOF ((uint32_t)0x00020000) |
#define | SDIO_STA_TXFIFOE ((uint32_t)0x00040000) |
#define | SDIO_STA_RXFIFOE ((uint32_t)0x00080000) |
#define | SDIO_STA_TXDAVL ((uint32_t)0x00100000) |
#define | SDIO_STA_RXDAVL ((uint32_t)0x00200000) |
#define | SDIO_STA_SDIOIT ((uint32_t)0x00400000) |
#define | SDIO_STA_CEATAEND ((uint32_t)0x00800000) |
#define | SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) |
#define | SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) |
#define | SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) |
#define | SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) |
#define | SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) |
#define | SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) |
#define | SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) |
#define | SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) |
#define | SDIO_ICR_DATAENDC ((uint32_t)0x00000100) |
#define | SDIO_ICR_STBITERRC ((uint32_t)0x00000200) |
#define | SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) |
#define | SDIO_ICR_SDIOITC ((uint32_t)0x00400000) |
#define | SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) |
#define | SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) |
#define | SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) |
#define | SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) |
#define | SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) |
#define | SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) |
#define | SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) |
#define | SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) |
#define | SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) |
#define | SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) |
#define | SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) |
#define | SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) |
#define | SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) |
#define | SDIO_MASK_TXACTIE ((uint32_t)0x00001000) |
#define | SDIO_MASK_RXACTIE ((uint32_t)0x00002000) |
#define | SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) |
#define | SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) |
#define | SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) |
#define | SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) |
#define | SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) |
#define | SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) |
#define | SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) |
#define | SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) |
#define | SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) |
#define | SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) |
#define | SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) |
#define | SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) |
#define | USB_EP0R_EA ((uint16_t)0x000F) |
#define | USB_EP0R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP0R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP0R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP0R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP0R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP0R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP0R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP0R_SETUP ((uint16_t)0x0800) |
#define | USB_EP0R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP0R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP0R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP0R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP0R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP1R_EA ((uint16_t)0x000F) |
#define | USB_EP1R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP1R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP1R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP1R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP1R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP1R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP1R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP1R_SETUP ((uint16_t)0x0800) |
#define | USB_EP1R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP1R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP1R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP1R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP1R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP2R_EA ((uint16_t)0x000F) |
#define | USB_EP2R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP2R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP2R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP2R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP2R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP2R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP2R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP2R_SETUP ((uint16_t)0x0800) |
#define | USB_EP2R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP2R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP2R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP2R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP2R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP3R_EA ((uint16_t)0x000F) |
#define | USB_EP3R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP3R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP3R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP3R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP3R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP3R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP3R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP3R_SETUP ((uint16_t)0x0800) |
#define | USB_EP3R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP3R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP3R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP3R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP3R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP4R_EA ((uint16_t)0x000F) |
#define | USB_EP4R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP4R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP4R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP4R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP4R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP4R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP4R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP4R_SETUP ((uint16_t)0x0800) |
#define | USB_EP4R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP4R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP4R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP4R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP4R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP5R_EA ((uint16_t)0x000F) |
#define | USB_EP5R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP5R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP5R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP5R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP5R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP5R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP5R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP5R_SETUP ((uint16_t)0x0800) |
#define | USB_EP5R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP5R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP5R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP5R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP5R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP6R_EA ((uint16_t)0x000F) |
#define | USB_EP6R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP6R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP6R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP6R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP6R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP6R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP6R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP6R_SETUP ((uint16_t)0x0800) |
#define | USB_EP6R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP6R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP6R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP6R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP6R_CTR_RX ((uint16_t)0x8000) |
#define | USB_EP7R_EA ((uint16_t)0x000F) |
#define | USB_EP7R_STAT_TX ((uint16_t)0x0030) |
#define | USB_EP7R_STAT_TX_0 ((uint16_t)0x0010) |
#define | USB_EP7R_STAT_TX_1 ((uint16_t)0x0020) |
#define | USB_EP7R_DTOG_TX ((uint16_t)0x0040) |
#define | USB_EP7R_CTR_TX ((uint16_t)0x0080) |
#define | USB_EP7R_EP_KIND ((uint16_t)0x0100) |
#define | USB_EP7R_EP_TYPE ((uint16_t)0x0600) |
#define | USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200) |
#define | USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400) |
#define | USB_EP7R_SETUP ((uint16_t)0x0800) |
#define | USB_EP7R_STAT_RX ((uint16_t)0x3000) |
#define | USB_EP7R_STAT_RX_0 ((uint16_t)0x1000) |
#define | USB_EP7R_STAT_RX_1 ((uint16_t)0x2000) |
#define | USB_EP7R_DTOG_RX ((uint16_t)0x4000) |
#define | USB_EP7R_CTR_RX ((uint16_t)0x8000) |
#define | USB_CNTR_FRES ((uint16_t)0x0001) |
#define | USB_CNTR_PDWN ((uint16_t)0x0002) |
#define | USB_CNTR_LP_MODE ((uint16_t)0x0004) |
#define | USB_CNTR_FSUSP ((uint16_t)0x0008) |
#define | USB_CNTR_RESUME ((uint16_t)0x0010) |
#define | USB_CNTR_ESOFM ((uint16_t)0x0100) |
#define | USB_CNTR_SOFM ((uint16_t)0x0200) |
#define | USB_CNTR_RESETM ((uint16_t)0x0400) |
#define | USB_CNTR_SUSPM ((uint16_t)0x0800) |
#define | USB_CNTR_WKUPM ((uint16_t)0x1000) |
#define | USB_CNTR_ERRM ((uint16_t)0x2000) |
#define | USB_CNTR_PMAOVRM ((uint16_t)0x4000) |
#define | USB_CNTR_CTRM ((uint16_t)0x8000) |
#define | USB_ISTR_EP_ID ((uint16_t)0x000F) |
#define | USB_ISTR_DIR ((uint16_t)0x0010) |
#define | USB_ISTR_ESOF ((uint16_t)0x0100) |
#define | USB_ISTR_SOF ((uint16_t)0x0200) |
#define | USB_ISTR_RESET ((uint16_t)0x0400) |
#define | USB_ISTR_SUSP ((uint16_t)0x0800) |
#define | USB_ISTR_WKUP ((uint16_t)0x1000) |
#define | USB_ISTR_ERR ((uint16_t)0x2000) |
#define | USB_ISTR_PMAOVR ((uint16_t)0x4000) |
#define | USB_ISTR_CTR ((uint16_t)0x8000) |
#define | USB_FNR_FN ((uint16_t)0x07FF) |
#define | USB_FNR_LSOF ((uint16_t)0x1800) |
#define | USB_FNR_LCK ((uint16_t)0x2000) |
#define | USB_FNR_RXDM ((uint16_t)0x4000) |
#define | USB_FNR_RXDP ((uint16_t)0x8000) |
#define | USB_DADDR_ADD ((uint8_t)0x7F) |
#define | USB_DADDR_ADD0 ((uint8_t)0x01) |
#define | USB_DADDR_ADD1 ((uint8_t)0x02) |
#define | USB_DADDR_ADD2 ((uint8_t)0x04) |
#define | USB_DADDR_ADD3 ((uint8_t)0x08) |
#define | USB_DADDR_ADD4 ((uint8_t)0x10) |
#define | USB_DADDR_ADD5 ((uint8_t)0x20) |
#define | USB_DADDR_ADD6 ((uint8_t)0x40) |
#define | USB_DADDR_EF ((uint8_t)0x80) |
#define | USB_BTABLE_BTABLE ((uint16_t)0xFFF8) |
#define | USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE) |
#define | USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE) |
#define | USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF) |
#define | USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF) |
#define | USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF) |
#define | USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF) |
#define | USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF) |
#define | USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF) |
#define | USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF) |
#define | USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF) |
#define | USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF) |
#define | USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000) |
#define | USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000) |
#define | USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE) |
#define | USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE) |
#define | USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF) |
#define | USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF) |
#define | USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF) |
#define | USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF) |
#define | USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF) |
#define | USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF) |
#define | USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF) |
#define | USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF) |
#define | USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00) |
#define | USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
#define | USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
#define | USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
#define | USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
#define | USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
#define | USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000) |
#define | USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
#define | USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
#define | USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
#define | USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
#define | USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
#define | USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
#define | CAN_MCR_INRQ ((uint16_t)0x0001) |
#define | CAN_MCR_SLEEP ((uint16_t)0x0002) |
#define | CAN_MCR_TXFP ((uint16_t)0x0004) |
#define | CAN_MCR_RFLM ((uint16_t)0x0008) |
#define | CAN_MCR_NART ((uint16_t)0x0010) |
#define | CAN_MCR_AWUM ((uint16_t)0x0020) |
#define | CAN_MCR_ABOM ((uint16_t)0x0040) |
#define | CAN_MCR_TTCM ((uint16_t)0x0080) |
#define | CAN_MCR_RESET ((uint16_t)0x8000) |
#define | CAN_MSR_INAK ((uint16_t)0x0001) |
#define | CAN_MSR_SLAK ((uint16_t)0x0002) |
#define | CAN_MSR_ERRI ((uint16_t)0x0004) |
#define | CAN_MSR_WKUI ((uint16_t)0x0008) |
#define | CAN_MSR_SLAKI ((uint16_t)0x0010) |
#define | CAN_MSR_TXM ((uint16_t)0x0100) |
#define | CAN_MSR_RXM ((uint16_t)0x0200) |
#define | CAN_MSR_SAMP ((uint16_t)0x0400) |
#define | CAN_MSR_RX ((uint16_t)0x0800) |
#define | CAN_TSR_RQCP0 ((uint32_t)0x00000001) |
#define | CAN_TSR_TXOK0 ((uint32_t)0x00000002) |
#define | CAN_TSR_ALST0 ((uint32_t)0x00000004) |
#define | CAN_TSR_TERR0 ((uint32_t)0x00000008) |
#define | CAN_TSR_ABRQ0 ((uint32_t)0x00000080) |
#define | CAN_TSR_RQCP1 ((uint32_t)0x00000100) |
#define | CAN_TSR_TXOK1 ((uint32_t)0x00000200) |
#define | CAN_TSR_ALST1 ((uint32_t)0x00000400) |
#define | CAN_TSR_TERR1 ((uint32_t)0x00000800) |
#define | CAN_TSR_ABRQ1 ((uint32_t)0x00008000) |
#define | CAN_TSR_RQCP2 ((uint32_t)0x00010000) |
#define | CAN_TSR_TXOK2 ((uint32_t)0x00020000) |
#define | CAN_TSR_ALST2 ((uint32_t)0x00040000) |
#define | CAN_TSR_TERR2 ((uint32_t)0x00080000) |
#define | CAN_TSR_ABRQ2 ((uint32_t)0x00800000) |
#define | CAN_TSR_CODE ((uint32_t)0x03000000) |
#define | CAN_TSR_TME ((uint32_t)0x1C000000) |
#define | CAN_TSR_TME0 ((uint32_t)0x04000000) |
#define | CAN_TSR_TME1 ((uint32_t)0x08000000) |
#define | CAN_TSR_TME2 ((uint32_t)0x10000000) |
#define | CAN_TSR_LOW ((uint32_t)0xE0000000) |
#define | CAN_TSR_LOW0 ((uint32_t)0x20000000) |
#define | CAN_TSR_LOW1 ((uint32_t)0x40000000) |
#define | CAN_TSR_LOW2 ((uint32_t)0x80000000) |
#define | CAN_RF0R_FMP0 ((uint8_t)0x03) |
#define | CAN_RF0R_FULL0 ((uint8_t)0x08) |
#define | CAN_RF0R_FOVR0 ((uint8_t)0x10) |
#define | CAN_RF0R_RFOM0 ((uint8_t)0x20) |
#define | CAN_RF1R_FMP1 ((uint8_t)0x03) |
#define | CAN_RF1R_FULL1 ((uint8_t)0x08) |
#define | CAN_RF1R_FOVR1 ((uint8_t)0x10) |
#define | CAN_RF1R_RFOM1 ((uint8_t)0x20) |
#define | CAN_IER_TMEIE ((uint32_t)0x00000001) |
#define | CAN_IER_FMPIE0 ((uint32_t)0x00000002) |
#define | CAN_IER_FFIE0 ((uint32_t)0x00000004) |
#define | CAN_IER_FOVIE0 ((uint32_t)0x00000008) |
#define | CAN_IER_FMPIE1 ((uint32_t)0x00000010) |
#define | CAN_IER_FFIE1 ((uint32_t)0x00000020) |
#define | CAN_IER_FOVIE1 ((uint32_t)0x00000040) |
#define | CAN_IER_EWGIE ((uint32_t)0x00000100) |
#define | CAN_IER_EPVIE ((uint32_t)0x00000200) |
#define | CAN_IER_BOFIE ((uint32_t)0x00000400) |
#define | CAN_IER_LECIE ((uint32_t)0x00000800) |
#define | CAN_IER_ERRIE ((uint32_t)0x00008000) |
#define | CAN_IER_WKUIE ((uint32_t)0x00010000) |
#define | CAN_IER_SLKIE ((uint32_t)0x00020000) |
#define | CAN_ESR_EWGF ((uint32_t)0x00000001) |
#define | CAN_ESR_EPVF ((uint32_t)0x00000002) |
#define | CAN_ESR_BOFF ((uint32_t)0x00000004) |
#define | CAN_ESR_LEC ((uint32_t)0x00000070) |
#define | CAN_ESR_LEC_0 ((uint32_t)0x00000010) |
#define | CAN_ESR_LEC_1 ((uint32_t)0x00000020) |
#define | CAN_ESR_LEC_2 ((uint32_t)0x00000040) |
#define | CAN_ESR_TEC ((uint32_t)0x00FF0000) |
#define | CAN_ESR_REC ((uint32_t)0xFF000000) |
#define | CAN_BTR_BRP ((uint32_t)0x000003FF) |
#define | CAN_BTR_TS1 ((uint32_t)0x000F0000) |
#define | CAN_BTR_TS2 ((uint32_t)0x00700000) |
#define | CAN_BTR_SJW ((uint32_t)0x03000000) |
#define | CAN_BTR_LBKM ((uint32_t)0x40000000) |
#define | CAN_BTR_SILM ((uint32_t)0x80000000) |
#define | CAN_TI0R_TXRQ ((uint32_t)0x00000001) |
#define | CAN_TI0R_RTR ((uint32_t)0x00000002) |
#define | CAN_TI0R_IDE ((uint32_t)0x00000004) |
#define | CAN_TI0R_EXID ((uint32_t)0x001FFFF8) |
#define | CAN_TI0R_STID ((uint32_t)0xFFE00000) |
#define | CAN_TDT0R_DLC ((uint32_t)0x0000000F) |
#define | CAN_TDT0R_TGT ((uint32_t)0x00000100) |
#define | CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) |
#define | CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) |
#define | CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) |
#define | CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) |
#define | CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) |
#define | CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) |
#define | CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) |
#define | CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) |
#define | CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) |
#define | CAN_TI1R_TXRQ ((uint32_t)0x00000001) |
#define | CAN_TI1R_RTR ((uint32_t)0x00000002) |
#define | CAN_TI1R_IDE ((uint32_t)0x00000004) |
#define | CAN_TI1R_EXID ((uint32_t)0x001FFFF8) |
#define | CAN_TI1R_STID ((uint32_t)0xFFE00000) |
#define | CAN_TDT1R_DLC ((uint32_t)0x0000000F) |
#define | CAN_TDT1R_TGT ((uint32_t)0x00000100) |
#define | CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) |
#define | CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) |
#define | CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) |
#define | CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) |
#define | CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) |
#define | CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) |
#define | CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) |
#define | CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) |
#define | CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) |
#define | CAN_TI2R_TXRQ ((uint32_t)0x00000001) |
#define | CAN_TI2R_RTR ((uint32_t)0x00000002) |
#define | CAN_TI2R_IDE ((uint32_t)0x00000004) |
#define | CAN_TI2R_EXID ((uint32_t)0x001FFFF8) |
#define | CAN_TI2R_STID ((uint32_t)0xFFE00000) |
#define | CAN_TDT2R_DLC ((uint32_t)0x0000000F) |
#define | CAN_TDT2R_TGT ((uint32_t)0x00000100) |
#define | CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) |
#define | CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) |
#define | CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) |
#define | CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) |
#define | CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) |
#define | CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) |
#define | CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) |
#define | CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) |
#define | CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) |
#define | CAN_RI0R_RTR ((uint32_t)0x00000002) |
#define | CAN_RI0R_IDE ((uint32_t)0x00000004) |
#define | CAN_RI0R_EXID ((uint32_t)0x001FFFF8) |
#define | CAN_RI0R_STID ((uint32_t)0xFFE00000) |
#define | CAN_RDT0R_DLC ((uint32_t)0x0000000F) |
#define | CAN_RDT0R_FMI ((uint32_t)0x0000FF00) |
#define | CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) |
#define | CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) |
#define | CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) |
#define | CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) |
#define | CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) |
#define | CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) |
#define | CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) |
#define | CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) |
#define | CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) |
#define | CAN_RI1R_RTR ((uint32_t)0x00000002) |
#define | CAN_RI1R_IDE ((uint32_t)0x00000004) |
#define | CAN_RI1R_EXID ((uint32_t)0x001FFFF8) |
#define | CAN_RI1R_STID ((uint32_t)0xFFE00000) |
#define | CAN_RDT1R_DLC ((uint32_t)0x0000000F) |
#define | CAN_RDT1R_FMI ((uint32_t)0x0000FF00) |
#define | CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) |
#define | CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) |
#define | CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) |
#define | CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) |
#define | CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) |
#define | CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) |
#define | CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) |
#define | CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) |
#define | CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) |
#define | CAN_FMR_FINIT ((uint8_t)0x01) |
#define | CAN_FM1R_FBM ((uint16_t)0x3FFF) |
#define | CAN_FM1R_FBM0 ((uint16_t)0x0001) |
#define | CAN_FM1R_FBM1 ((uint16_t)0x0002) |
#define | CAN_FM1R_FBM2 ((uint16_t)0x0004) |
#define | CAN_FM1R_FBM3 ((uint16_t)0x0008) |
#define | CAN_FM1R_FBM4 ((uint16_t)0x0010) |
#define | CAN_FM1R_FBM5 ((uint16_t)0x0020) |
#define | CAN_FM1R_FBM6 ((uint16_t)0x0040) |
#define | CAN_FM1R_FBM7 ((uint16_t)0x0080) |
#define | CAN_FM1R_FBM8 ((uint16_t)0x0100) |
#define | CAN_FM1R_FBM9 ((uint16_t)0x0200) |
#define | CAN_FM1R_FBM10 ((uint16_t)0x0400) |
#define | CAN_FM1R_FBM11 ((uint16_t)0x0800) |
#define | CAN_FM1R_FBM12 ((uint16_t)0x1000) |
#define | CAN_FM1R_FBM13 ((uint16_t)0x2000) |
#define | CAN_FS1R_FSC ((uint16_t)0x3FFF) |
#define | CAN_FS1R_FSC0 ((uint16_t)0x0001) |
#define | CAN_FS1R_FSC1 ((uint16_t)0x0002) |
#define | CAN_FS1R_FSC2 ((uint16_t)0x0004) |
#define | CAN_FS1R_FSC3 ((uint16_t)0x0008) |
#define | CAN_FS1R_FSC4 ((uint16_t)0x0010) |
#define | CAN_FS1R_FSC5 ((uint16_t)0x0020) |
#define | CAN_FS1R_FSC6 ((uint16_t)0x0040) |
#define | CAN_FS1R_FSC7 ((uint16_t)0x0080) |
#define | CAN_FS1R_FSC8 ((uint16_t)0x0100) |
#define | CAN_FS1R_FSC9 ((uint16_t)0x0200) |
#define | CAN_FS1R_FSC10 ((uint16_t)0x0400) |
#define | CAN_FS1R_FSC11 ((uint16_t)0x0800) |
#define | CAN_FS1R_FSC12 ((uint16_t)0x1000) |
#define | CAN_FS1R_FSC13 ((uint16_t)0x2000) |
#define | CAN_FFA1R_FFA ((uint16_t)0x3FFF) |
#define | CAN_FFA1R_FFA0 ((uint16_t)0x0001) |
#define | CAN_FFA1R_FFA1 ((uint16_t)0x0002) |
#define | CAN_FFA1R_FFA2 ((uint16_t)0x0004) |
#define | CAN_FFA1R_FFA3 ((uint16_t)0x0008) |
#define | CAN_FFA1R_FFA4 ((uint16_t)0x0010) |
#define | CAN_FFA1R_FFA5 ((uint16_t)0x0020) |
#define | CAN_FFA1R_FFA6 ((uint16_t)0x0040) |
#define | CAN_FFA1R_FFA7 ((uint16_t)0x0080) |
#define | CAN_FFA1R_FFA8 ((uint16_t)0x0100) |
#define | CAN_FFA1R_FFA9 ((uint16_t)0x0200) |
#define | CAN_FFA1R_FFA10 ((uint16_t)0x0400) |
#define | CAN_FFA1R_FFA11 ((uint16_t)0x0800) |
#define | CAN_FFA1R_FFA12 ((uint16_t)0x1000) |
#define | CAN_FFA1R_FFA13 ((uint16_t)0x2000) |
#define | CAN_FA1R_FACT ((uint16_t)0x3FFF) |
#define | CAN_FA1R_FACT0 ((uint16_t)0x0001) |
#define | CAN_FA1R_FACT1 ((uint16_t)0x0002) |
#define | CAN_FA1R_FACT2 ((uint16_t)0x0004) |
#define | CAN_FA1R_FACT3 ((uint16_t)0x0008) |
#define | CAN_FA1R_FACT4 ((uint16_t)0x0010) |
#define | CAN_FA1R_FACT5 ((uint16_t)0x0020) |
#define | CAN_FA1R_FACT6 ((uint16_t)0x0040) |
#define | CAN_FA1R_FACT7 ((uint16_t)0x0080) |
#define | CAN_FA1R_FACT8 ((uint16_t)0x0100) |
#define | CAN_FA1R_FACT9 ((uint16_t)0x0200) |
#define | CAN_FA1R_FACT10 ((uint16_t)0x0400) |
#define | CAN_FA1R_FACT11 ((uint16_t)0x0800) |
#define | CAN_FA1R_FACT12 ((uint16_t)0x1000) |
#define | CAN_FA1R_FACT13 ((uint16_t)0x2000) |
#define | CAN_F0R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F0R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F0R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F0R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F0R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F0R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F0R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F0R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F0R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F0R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F0R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F0R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F0R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F0R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F0R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F0R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F0R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F0R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F0R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F0R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F0R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F0R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F0R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F0R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F0R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F0R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F0R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F0R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F0R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F0R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F0R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F0R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F1R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F1R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F1R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F1R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F1R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F1R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F1R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F1R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F1R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F1R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F1R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F1R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F1R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F1R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F1R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F1R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F1R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F1R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F1R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F1R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F1R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F1R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F1R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F1R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F1R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F1R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F1R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F1R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F1R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F1R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F1R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F1R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F2R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F2R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F2R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F2R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F2R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F2R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F2R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F2R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F2R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F2R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F2R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F2R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F2R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F2R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F2R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F2R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F2R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F2R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F2R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F2R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F2R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F2R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F2R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F2R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F2R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F2R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F2R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F2R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F2R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F2R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F2R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F2R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F3R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F3R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F3R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F3R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F3R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F3R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F3R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F3R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F3R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F3R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F3R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F3R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F3R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F3R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F3R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F3R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F3R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F3R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F3R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F3R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F3R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F3R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F3R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F3R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F3R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F3R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F3R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F3R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F3R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F3R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F3R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F3R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F4R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F4R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F4R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F4R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F4R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F4R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F4R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F4R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F4R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F4R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F4R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F4R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F4R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F4R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F4R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F4R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F4R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F4R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F4R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F4R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F4R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F4R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F4R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F4R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F4R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F4R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F4R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F4R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F4R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F4R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F4R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F4R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F5R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F5R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F5R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F5R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F5R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F5R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F5R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F5R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F5R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F5R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F5R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F5R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F5R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F5R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F5R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F5R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F5R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F5R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F5R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F5R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F5R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F5R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F5R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F5R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F5R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F5R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F5R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F5R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F5R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F5R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F5R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F5R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F6R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F6R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F6R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F6R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F6R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F6R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F6R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F6R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F6R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F6R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F6R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F6R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F6R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F6R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F6R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F6R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F6R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F6R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F6R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F6R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F6R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F6R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F6R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F6R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F6R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F6R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F6R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F6R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F6R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F6R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F6R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F6R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F7R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F7R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F7R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F7R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F7R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F7R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F7R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F7R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F7R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F7R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F7R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F7R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F7R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F7R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F7R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F7R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F7R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F7R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F7R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F7R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F7R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F7R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F7R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F7R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F7R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F7R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F7R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F7R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F7R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F7R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F7R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F7R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F8R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F8R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F8R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F8R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F8R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F8R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F8R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F8R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F8R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F8R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F8R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F8R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F8R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F8R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F8R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F8R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F8R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F8R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F8R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F8R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F8R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F8R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F8R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F8R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F8R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F8R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F8R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F8R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F8R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F8R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F8R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F8R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F9R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F9R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F9R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F9R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F9R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F9R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F9R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F9R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F9R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F9R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F9R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F9R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F9R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F9R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F9R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F9R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F9R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F9R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F9R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F9R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F9R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F9R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F9R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F9R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F9R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F9R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F9R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F9R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F9R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F9R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F9R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F9R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F10R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F10R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F10R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F10R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F10R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F10R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F10R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F10R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F10R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F10R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F10R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F10R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F10R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F10R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F10R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F10R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F10R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F10R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F10R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F10R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F10R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F10R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F10R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F10R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F10R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F10R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F10R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F10R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F10R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F10R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F10R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F10R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F11R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F11R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F11R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F11R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F11R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F11R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F11R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F11R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F11R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F11R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F11R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F11R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F11R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F11R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F11R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F11R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F11R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F11R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F11R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F11R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F11R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F11R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F11R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F11R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F11R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F11R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F11R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F11R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F11R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F11R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F11R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F11R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F12R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F12R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F12R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F12R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F12R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F12R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F12R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F12R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F12R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F12R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F12R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F12R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F12R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F12R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F12R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F12R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F12R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F12R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F12R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F12R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F12R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F12R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F12R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F12R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F12R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F12R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F12R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F12R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F12R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F12R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F12R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F12R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F13R1_FB0 ((uint32_t)0x00000001) |
#define | CAN_F13R1_FB1 ((uint32_t)0x00000002) |
#define | CAN_F13R1_FB2 ((uint32_t)0x00000004) |
#define | CAN_F13R1_FB3 ((uint32_t)0x00000008) |
#define | CAN_F13R1_FB4 ((uint32_t)0x00000010) |
#define | CAN_F13R1_FB5 ((uint32_t)0x00000020) |
#define | CAN_F13R1_FB6 ((uint32_t)0x00000040) |
#define | CAN_F13R1_FB7 ((uint32_t)0x00000080) |
#define | CAN_F13R1_FB8 ((uint32_t)0x00000100) |
#define | CAN_F13R1_FB9 ((uint32_t)0x00000200) |
#define | CAN_F13R1_FB10 ((uint32_t)0x00000400) |
#define | CAN_F13R1_FB11 ((uint32_t)0x00000800) |
#define | CAN_F13R1_FB12 ((uint32_t)0x00001000) |
#define | CAN_F13R1_FB13 ((uint32_t)0x00002000) |
#define | CAN_F13R1_FB14 ((uint32_t)0x00004000) |
#define | CAN_F13R1_FB15 ((uint32_t)0x00008000) |
#define | CAN_F13R1_FB16 ((uint32_t)0x00010000) |
#define | CAN_F13R1_FB17 ((uint32_t)0x00020000) |
#define | CAN_F13R1_FB18 ((uint32_t)0x00040000) |
#define | CAN_F13R1_FB19 ((uint32_t)0x00080000) |
#define | CAN_F13R1_FB20 ((uint32_t)0x00100000) |
#define | CAN_F13R1_FB21 ((uint32_t)0x00200000) |
#define | CAN_F13R1_FB22 ((uint32_t)0x00400000) |
#define | CAN_F13R1_FB23 ((uint32_t)0x00800000) |
#define | CAN_F13R1_FB24 ((uint32_t)0x01000000) |
#define | CAN_F13R1_FB25 ((uint32_t)0x02000000) |
#define | CAN_F13R1_FB26 ((uint32_t)0x04000000) |
#define | CAN_F13R1_FB27 ((uint32_t)0x08000000) |
#define | CAN_F13R1_FB28 ((uint32_t)0x10000000) |
#define | CAN_F13R1_FB29 ((uint32_t)0x20000000) |
#define | CAN_F13R1_FB30 ((uint32_t)0x40000000) |
#define | CAN_F13R1_FB31 ((uint32_t)0x80000000) |
#define | CAN_F0R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F0R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F0R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F0R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F0R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F0R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F0R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F0R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F0R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F0R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F0R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F0R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F0R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F0R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F0R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F0R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F0R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F0R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F0R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F0R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F0R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F0R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F0R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F0R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F0R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F0R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F0R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F0R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F0R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F0R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F0R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F0R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F1R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F1R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F1R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F1R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F1R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F1R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F1R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F1R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F1R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F1R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F1R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F1R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F1R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F1R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F1R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F1R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F1R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F1R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F1R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F1R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F1R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F1R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F1R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F1R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F1R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F1R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F1R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F1R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F1R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F1R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F1R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F1R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F2R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F2R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F2R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F2R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F2R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F2R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F2R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F2R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F2R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F2R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F2R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F2R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F2R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F2R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F2R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F2R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F2R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F2R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F2R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F2R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F2R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F2R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F2R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F2R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F2R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F2R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F2R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F2R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F2R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F2R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F2R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F2R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F3R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F3R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F3R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F3R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F3R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F3R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F3R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F3R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F3R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F3R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F3R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F3R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F3R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F3R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F3R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F3R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F3R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F3R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F3R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F3R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F3R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F3R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F3R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F3R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F3R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F3R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F3R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F3R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F3R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F3R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F3R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F3R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F4R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F4R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F4R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F4R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F4R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F4R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F4R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F4R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F4R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F4R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F4R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F4R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F4R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F4R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F4R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F4R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F4R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F4R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F4R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F4R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F4R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F4R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F4R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F4R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F4R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F4R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F4R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F4R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F4R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F4R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F4R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F4R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F5R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F5R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F5R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F5R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F5R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F5R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F5R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F5R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F5R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F5R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F5R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F5R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F5R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F5R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F5R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F5R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F5R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F5R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F5R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F5R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F5R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F5R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F5R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F5R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F5R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F5R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F5R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F5R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F5R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F5R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F5R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F5R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F6R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F6R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F6R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F6R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F6R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F6R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F6R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F6R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F6R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F6R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F6R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F6R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F6R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F6R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F6R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F6R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F6R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F6R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F6R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F6R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F6R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F6R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F6R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F6R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F6R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F6R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F6R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F6R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F6R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F6R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F6R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F6R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F7R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F7R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F7R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F7R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F7R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F7R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F7R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F7R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F7R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F7R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F7R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F7R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F7R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F7R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F7R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F7R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F7R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F7R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F7R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F7R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F7R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F7R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F7R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F7R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F7R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F7R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F7R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F7R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F7R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F7R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F7R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F7R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F8R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F8R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F8R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F8R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F8R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F8R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F8R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F8R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F8R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F8R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F8R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F8R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F8R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F8R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F8R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F8R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F8R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F8R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F8R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F8R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F8R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F8R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F8R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F8R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F8R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F8R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F8R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F8R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F8R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F8R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F8R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F8R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F9R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F9R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F9R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F9R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F9R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F9R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F9R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F9R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F9R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F9R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F9R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F9R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F9R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F9R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F9R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F9R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F9R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F9R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F9R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F9R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F9R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F9R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F9R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F9R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F9R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F9R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F9R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F9R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F9R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F9R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F9R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F9R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F10R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F10R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F10R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F10R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F10R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F10R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F10R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F10R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F10R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F10R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F10R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F10R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F10R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F10R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F10R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F10R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F10R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F10R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F10R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F10R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F10R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F10R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F10R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F10R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F10R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F10R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F10R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F10R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F10R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F10R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F10R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F10R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F11R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F11R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F11R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F11R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F11R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F11R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F11R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F11R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F11R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F11R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F11R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F11R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F11R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F11R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F11R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F11R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F11R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F11R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F11R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F11R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F11R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F11R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F11R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F11R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F11R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F11R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F11R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F11R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F11R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F11R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F11R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F11R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F12R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F12R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F12R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F12R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F12R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F12R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F12R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F12R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F12R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F12R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F12R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F12R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F12R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F12R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F12R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F12R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F12R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F12R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F12R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F12R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F12R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F12R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F12R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F12R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F12R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F12R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F12R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F12R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F12R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F12R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F12R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F12R2_FB31 ((uint32_t)0x80000000) |
#define | CAN_F13R2_FB0 ((uint32_t)0x00000001) |
#define | CAN_F13R2_FB1 ((uint32_t)0x00000002) |
#define | CAN_F13R2_FB2 ((uint32_t)0x00000004) |
#define | CAN_F13R2_FB3 ((uint32_t)0x00000008) |
#define | CAN_F13R2_FB4 ((uint32_t)0x00000010) |
#define | CAN_F13R2_FB5 ((uint32_t)0x00000020) |
#define | CAN_F13R2_FB6 ((uint32_t)0x00000040) |
#define | CAN_F13R2_FB7 ((uint32_t)0x00000080) |
#define | CAN_F13R2_FB8 ((uint32_t)0x00000100) |
#define | CAN_F13R2_FB9 ((uint32_t)0x00000200) |
#define | CAN_F13R2_FB10 ((uint32_t)0x00000400) |
#define | CAN_F13R2_FB11 ((uint32_t)0x00000800) |
#define | CAN_F13R2_FB12 ((uint32_t)0x00001000) |
#define | CAN_F13R2_FB13 ((uint32_t)0x00002000) |
#define | CAN_F13R2_FB14 ((uint32_t)0x00004000) |
#define | CAN_F13R2_FB15 ((uint32_t)0x00008000) |
#define | CAN_F13R2_FB16 ((uint32_t)0x00010000) |
#define | CAN_F13R2_FB17 ((uint32_t)0x00020000) |
#define | CAN_F13R2_FB18 ((uint32_t)0x00040000) |
#define | CAN_F13R2_FB19 ((uint32_t)0x00080000) |
#define | CAN_F13R2_FB20 ((uint32_t)0x00100000) |
#define | CAN_F13R2_FB21 ((uint32_t)0x00200000) |
#define | CAN_F13R2_FB22 ((uint32_t)0x00400000) |
#define | CAN_F13R2_FB23 ((uint32_t)0x00800000) |
#define | CAN_F13R2_FB24 ((uint32_t)0x01000000) |
#define | CAN_F13R2_FB25 ((uint32_t)0x02000000) |
#define | CAN_F13R2_FB26 ((uint32_t)0x04000000) |
#define | CAN_F13R2_FB27 ((uint32_t)0x08000000) |
#define | CAN_F13R2_FB28 ((uint32_t)0x10000000) |
#define | CAN_F13R2_FB29 ((uint32_t)0x20000000) |
#define | CAN_F13R2_FB30 ((uint32_t)0x40000000) |
#define | CAN_F13R2_FB31 ((uint32_t)0x80000000) |
#define | SPI_CR1_CPHA ((uint16_t)0x0001) |
#define | SPI_CR1_CPOL ((uint16_t)0x0002) |
#define | SPI_CR1_MSTR ((uint16_t)0x0004) |
#define | SPI_CR1_BR ((uint16_t)0x0038) |
#define | SPI_CR1_BR_0 ((uint16_t)0x0008) |
#define | SPI_CR1_BR_1 ((uint16_t)0x0010) |
#define | SPI_CR1_BR_2 ((uint16_t)0x0020) |
#define | SPI_CR1_SPE ((uint16_t)0x0040) |
#define | SPI_CR1_LSBFIRST ((uint16_t)0x0080) |
#define | SPI_CR1_SSI ((uint16_t)0x0100) |
#define | SPI_CR1_SSM ((uint16_t)0x0200) |
#define | SPI_CR1_RXONLY ((uint16_t)0x0400) |
#define | SPI_CR1_DFF ((uint16_t)0x0800) |
#define | SPI_CR1_CRCNEXT ((uint16_t)0x1000) |
#define | SPI_CR1_CRCEN ((uint16_t)0x2000) |
#define | SPI_CR1_BIDIOE ((uint16_t)0x4000) |
#define | SPI_CR1_BIDIMODE ((uint16_t)0x8000) |
#define | SPI_CR2_RXDMAEN ((uint8_t)0x01) |
#define | SPI_CR2_TXDMAEN ((uint8_t)0x02) |
#define | SPI_CR2_SSOE ((uint8_t)0x04) |
#define | SPI_CR2_ERRIE ((uint8_t)0x20) |
#define | SPI_CR2_RXNEIE ((uint8_t)0x40) |
#define | SPI_CR2_TXEIE ((uint8_t)0x80) |
#define | SPI_SR_RXNE ((uint8_t)0x01) |
#define | SPI_SR_TXE ((uint8_t)0x02) |
#define | SPI_SR_CHSIDE ((uint8_t)0x04) |
#define | SPI_SR_UDR ((uint8_t)0x08) |
#define | SPI_SR_CRCERR ((uint8_t)0x10) |
#define | SPI_SR_MODF ((uint8_t)0x20) |
#define | SPI_SR_OVR ((uint8_t)0x40) |
#define | SPI_SR_BSY ((uint8_t)0x80) |
#define | SPI_DR_DR ((uint16_t)0xFFFF) |
#define | SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) |
#define | SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) |
#define | SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) |
#define | SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) |
#define | SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) |
#define | SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) |
#define | SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) |
#define | SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) |
#define | SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) |
#define | SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) |
#define | SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) |
#define | SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) |
#define | SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) |
#define | SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) |
#define | SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) |
#define | SPI_I2SCFGR_I2SE ((uint16_t)0x0400) |
#define | SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) |
#define | SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) |
#define | SPI_I2SPR_ODD ((uint16_t)0x0100) |
#define | SPI_I2SPR_MCKOE ((uint16_t)0x0200) |
#define | I2C_CR1_PE ((uint16_t)0x0001) |
#define | I2C_CR1_SMBUS ((uint16_t)0x0002) |
#define | I2C_CR1_SMBTYPE ((uint16_t)0x0008) |
#define | I2C_CR1_ENARP ((uint16_t)0x0010) |
#define | I2C_CR1_ENPEC ((uint16_t)0x0020) |
#define | I2C_CR1_ENGC ((uint16_t)0x0040) |
#define | I2C_CR1_NOSTRETCH ((uint16_t)0x0080) |
#define | I2C_CR1_START ((uint16_t)0x0100) |
#define | I2C_CR1_STOP ((uint16_t)0x0200) |
#define | I2C_CR1_ACK ((uint16_t)0x0400) |
#define | I2C_CR1_POS ((uint16_t)0x0800) |
#define | I2C_CR1_PEC ((uint16_t)0x1000) |
#define | I2C_CR1_ALERT ((uint16_t)0x2000) |
#define | I2C_CR1_SWRST ((uint16_t)0x8000) |
#define | I2C_CR2_FREQ ((uint16_t)0x003F) |
#define | I2C_CR2_FREQ_0 ((uint16_t)0x0001) |
#define | I2C_CR2_FREQ_1 ((uint16_t)0x0002) |
#define | I2C_CR2_FREQ_2 ((uint16_t)0x0004) |
#define | I2C_CR2_FREQ_3 ((uint16_t)0x0008) |
#define | I2C_CR2_FREQ_4 ((uint16_t)0x0010) |
#define | I2C_CR2_FREQ_5 ((uint16_t)0x0020) |
#define | I2C_CR2_ITERREN ((uint16_t)0x0100) |
#define | I2C_CR2_ITEVTEN ((uint16_t)0x0200) |
#define | I2C_CR2_ITBUFEN ((uint16_t)0x0400) |
#define | I2C_CR2_DMAEN ((uint16_t)0x0800) |
#define | I2C_CR2_LAST ((uint16_t)0x1000) |
#define | I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) |
#define | I2C_OAR1_ADD8_9 ((uint16_t)0x0300) |
#define | I2C_OAR1_ADD0 ((uint16_t)0x0001) |
#define | I2C_OAR1_ADD1 ((uint16_t)0x0002) |
#define | I2C_OAR1_ADD2 ((uint16_t)0x0004) |
#define | I2C_OAR1_ADD3 ((uint16_t)0x0008) |
#define | I2C_OAR1_ADD4 ((uint16_t)0x0010) |
#define | I2C_OAR1_ADD5 ((uint16_t)0x0020) |
#define | I2C_OAR1_ADD6 ((uint16_t)0x0040) |
#define | I2C_OAR1_ADD7 ((uint16_t)0x0080) |
#define | I2C_OAR1_ADD8 ((uint16_t)0x0100) |
#define | I2C_OAR1_ADD9 ((uint16_t)0x0200) |
#define | I2C_OAR1_ADDMODE ((uint16_t)0x8000) |
#define | I2C_OAR2_ENDUAL ((uint8_t)0x01) |
#define | I2C_OAR2_ADD2 ((uint8_t)0xFE) |
#define | I2C_DR_DR ((uint8_t)0xFF) |
#define | I2C_SR1_SB ((uint16_t)0x0001) |
#define | I2C_SR1_ADDR ((uint16_t)0x0002) |
#define | I2C_SR1_BTF ((uint16_t)0x0004) |
#define | I2C_SR1_ADD10 ((uint16_t)0x0008) |
#define | I2C_SR1_STOPF ((uint16_t)0x0010) |
#define | I2C_SR1_RXNE ((uint16_t)0x0040) |
#define | I2C_SR1_TXE ((uint16_t)0x0080) |
#define | I2C_SR1_BERR ((uint16_t)0x0100) |
#define | I2C_SR1_ARLO ((uint16_t)0x0200) |
#define | I2C_SR1_AF ((uint16_t)0x0400) |
#define | I2C_SR1_OVR ((uint16_t)0x0800) |
#define | I2C_SR1_PECERR ((uint16_t)0x1000) |
#define | I2C_SR1_TIMEOUT ((uint16_t)0x4000) |
#define | I2C_SR1_SMBALERT ((uint16_t)0x8000) |
#define | I2C_SR2_MSL ((uint16_t)0x0001) |
#define | I2C_SR2_BUSY ((uint16_t)0x0002) |
#define | I2C_SR2_TRA ((uint16_t)0x0004) |
#define | I2C_SR2_GENCALL ((uint16_t)0x0010) |
#define | I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) |
#define | I2C_SR2_SMBHOST ((uint16_t)0x0040) |
#define | I2C_SR2_DUALF ((uint16_t)0x0080) |
#define | I2C_SR2_PEC ((uint16_t)0xFF00) |
#define | I2C_CCR_CCR ((uint16_t)0x0FFF) |
#define | I2C_CCR_DUTY ((uint16_t)0x4000) |
#define | I2C_CCR_FS ((uint16_t)0x8000) |
#define | I2C_TRISE_TRISE ((uint8_t)0x3F) |
#define | USART_SR_PE ((uint16_t)0x0001) |
#define | USART_SR_FE ((uint16_t)0x0002) |
#define | USART_SR_NE ((uint16_t)0x0004) |
#define | USART_SR_ORE ((uint16_t)0x0008) |
#define | USART_SR_IDLE ((uint16_t)0x0010) |
#define | USART_SR_RXNE ((uint16_t)0x0020) |
#define | USART_SR_TC ((uint16_t)0x0040) |
#define | USART_SR_TXE ((uint16_t)0x0080) |
#define | USART_SR_LBD ((uint16_t)0x0100) |
#define | USART_SR_CTS ((uint16_t)0x0200) |
#define | USART_DR_DR ((uint16_t)0x01FF) |
#define | USART_BRR_DIV_Fraction ((uint16_t)0x000F) |
#define | USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) |
#define | USART_CR1_SBK ((uint16_t)0x0001) |
#define | USART_CR1_RWU ((uint16_t)0x0002) |
#define | USART_CR1_RE ((uint16_t)0x0004) |
#define | USART_CR1_TE ((uint16_t)0x0008) |
#define | USART_CR1_IDLEIE ((uint16_t)0x0010) |
#define | USART_CR1_RXNEIE ((uint16_t)0x0020) |
#define | USART_CR1_TCIE ((uint16_t)0x0040) |
#define | USART_CR1_TXEIE ((uint16_t)0x0080) |
#define | USART_CR1_PEIE ((uint16_t)0x0100) |
#define | USART_CR1_PS ((uint16_t)0x0200) |
#define | USART_CR1_PCE ((uint16_t)0x0400) |
#define | USART_CR1_WAKE ((uint16_t)0x0800) |
#define | USART_CR1_M ((uint16_t)0x1000) |
#define | USART_CR1_UE ((uint16_t)0x2000) |
#define | USART_CR1_OVER8 ((uint16_t)0x8000) |
#define | USART_CR2_ADD ((uint16_t)0x000F) |
#define | USART_CR2_LBDL ((uint16_t)0x0020) |
#define | USART_CR2_LBDIE ((uint16_t)0x0040) |
#define | USART_CR2_LBCL ((uint16_t)0x0100) |
#define | USART_CR2_CPHA ((uint16_t)0x0200) |
#define | USART_CR2_CPOL ((uint16_t)0x0400) |
#define | USART_CR2_CLKEN ((uint16_t)0x0800) |
#define | USART_CR2_STOP ((uint16_t)0x3000) |
#define | USART_CR2_STOP_0 ((uint16_t)0x1000) |
#define | USART_CR2_STOP_1 ((uint16_t)0x2000) |
#define | USART_CR2_LINEN ((uint16_t)0x4000) |
#define | USART_CR3_EIE ((uint16_t)0x0001) |
#define | USART_CR3_IREN ((uint16_t)0x0002) |
#define | USART_CR3_IRLP ((uint16_t)0x0004) |
#define | USART_CR3_HDSEL ((uint16_t)0x0008) |
#define | USART_CR3_NACK ((uint16_t)0x0010) |
#define | USART_CR3_SCEN ((uint16_t)0x0020) |
#define | USART_CR3_DMAR ((uint16_t)0x0040) |
#define | USART_CR3_DMAT ((uint16_t)0x0080) |
#define | USART_CR3_RTSE ((uint16_t)0x0100) |
#define | USART_CR3_CTSE ((uint16_t)0x0200) |
#define | USART_CR3_CTSIE ((uint16_t)0x0400) |
#define | USART_CR3_ONEBIT ((uint16_t)0x0800) |
#define | USART_GTPR_PSC ((uint16_t)0x00FF) |
#define | USART_GTPR_PSC_0 ((uint16_t)0x0001) |
#define | USART_GTPR_PSC_1 ((uint16_t)0x0002) |
#define | USART_GTPR_PSC_2 ((uint16_t)0x0004) |
#define | USART_GTPR_PSC_3 ((uint16_t)0x0008) |
#define | USART_GTPR_PSC_4 ((uint16_t)0x0010) |
#define | USART_GTPR_PSC_5 ((uint16_t)0x0020) |
#define | USART_GTPR_PSC_6 ((uint16_t)0x0040) |
#define | USART_GTPR_PSC_7 ((uint16_t)0x0080) |
#define | USART_GTPR_GT ((uint16_t)0xFF00) |
#define | DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) |
#define | DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) |
#define | DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000) |
#define | DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000) |
#define | DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000) |
#define | DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000) |
#define | DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000) |
#define | DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000) |
#define | DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000) |
#define | DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000) |
#define | DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000) |
#define | DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000) |
#define | DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000) |
#define | DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000) |
#define | DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000) |
#define | DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000) |
#define | DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000) |
#define | DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000) |
#define | DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) |
#define | DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) |
#define | DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) |
#define | DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) |
#define | DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) |
#define | DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) |
#define | DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) |
#define | DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100) |
#define | DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200) |
#define | DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400) |
#define | DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800) |
#define | DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000) |
#define | DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000) |
#define | DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000) |
#define | DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) |
#define | DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) |
#define | DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000) |
#define | DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000) |
#define | DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000) |
#define | DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000) |
#define | DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000) |
#define | DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000) |
#define | DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000) |
#define | DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000) |
#define | DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000) |
#define | DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000) |
#define | DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000) |
#define | DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000) |
#define | DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000) |
#define | DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000) |
#define | FLASH_ACR_LATENCY ((uint8_t)0x03) |
#define | FLASH_ACR_LATENCY_0 ((uint8_t)0x00) |
#define | FLASH_ACR_LATENCY_1 ((uint8_t)0x01) |
#define | FLASH_ACR_LATENCY_2 ((uint8_t)0x02) |
#define | FLASH_ACR_HLFCYA ((uint8_t)0x08) |
#define | FLASH_ACR_PRFTBE ((uint8_t)0x10) |
#define | FLASH_ACR_PRFTBS ((uint8_t)0x20) |
#define | FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) |
#define | FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF) |
#define | FLASH_SR_BSY ((uint8_t)0x01) |
#define | FLASH_SR_PGERR ((uint8_t)0x04) |
#define | FLASH_SR_WRPRTERR ((uint8_t)0x10) |
#define | FLASH_SR_EOP ((uint8_t)0x20) |
#define | FLASH_CR_PG ((uint16_t)0x0001) |
#define | FLASH_CR_PER ((uint16_t)0x0002) |
#define | FLASH_CR_MER ((uint16_t)0x0004) |
#define | FLASH_CR_OPTPG ((uint16_t)0x0010) |
#define | FLASH_CR_OPTER ((uint16_t)0x0020) |
#define | FLASH_CR_STRT ((uint16_t)0x0040) |
#define | FLASH_CR_LOCK ((uint16_t)0x0080) |
#define | FLASH_CR_OPTWRE ((uint16_t)0x0200) |
#define | FLASH_CR_ERRIE ((uint16_t)0x0400) |
#define | FLASH_CR_EOPIE ((uint16_t)0x1000) |
#define | FLASH_AR_FAR ((uint32_t)0xFFFFFFFF) |
#define | FLASH_OBR_OPTERR ((uint16_t)0x0001) |
#define | FLASH_OBR_RDPRT ((uint16_t)0x0002) |
#define | FLASH_OBR_USER ((uint16_t)0x03FC) |
#define | FLASH_OBR_WDG_SW ((uint16_t)0x0004) |
#define | FLASH_OBR_nRST_STOP ((uint16_t)0x0008) |
#define | FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) |
#define | FLASH_OBR_BFB2 ((uint16_t)0x0020) |
#define | FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF) |
#define | FLASH_RDP_RDP ((uint32_t)0x000000FF) |
#define | FLASH_RDP_nRDP ((uint32_t)0x0000FF00) |
#define | FLASH_USER_USER ((uint32_t)0x00FF0000) |
#define | FLASH_USER_nUSER ((uint32_t)0xFF000000) |
#define | FLASH_Data0_Data0 ((uint32_t)0x000000FF) |
#define | FLASH_Data0_nData0 ((uint32_t)0x0000FF00) |
#define | FLASH_Data1_Data1 ((uint32_t)0x00FF0000) |
#define | FLASH_Data1_nData1 ((uint32_t)0xFF000000) |
#define | FLASH_WRP0_WRP0 ((uint32_t)0x000000FF) |
#define | FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00) |
#define | FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000) |
#define | FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000) |
#define | FLASH_WRP2_WRP2 ((uint32_t)0x000000FF) |
#define | FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00) |
#define | FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000) |
#define | FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000) |
#define ADC_CR1_AWDCH ((uint32_t)0x0000001F) |
AWDCH[4:0] bits (Analog watchdog channel select bits)
Definition at line 3710 of file stm32f10x.h.
#define ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3711 of file stm32f10x.h.
#define ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3712 of file stm32f10x.h.
#define ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3713 of file stm32f10x.h.
#define ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 3714 of file stm32f10x.h.
#define ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 3715 of file stm32f10x.h.
#define ADC_CR1_AWDEN ((uint32_t)0x00800000) |
Analog watchdog enable on regular channels
Definition at line 3738 of file stm32f10x.h.
#define ADC_CR1_AWDIE ((uint32_t)0x00000040) |
Analog Watchdog interrupt enable
Definition at line 3718 of file stm32f10x.h.
#define ADC_CR1_AWDSGL ((uint32_t)0x00000200) |
Enable the watchdog on a single channel in scan mode
Definition at line 3721 of file stm32f10x.h.
#define ADC_CR1_DISCEN ((uint32_t)0x00000800) |
Discontinuous mode on regular channels
Definition at line 3723 of file stm32f10x.h.
#define ADC_CR1_DISCNUM ((uint32_t)0x0000E000) |
DISCNUM[2:0] bits (Discontinuous mode channel count)
Definition at line 3726 of file stm32f10x.h.
#define ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) |
Bit 0
Definition at line 3727 of file stm32f10x.h.
#define ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) |
Bit 1
Definition at line 3728 of file stm32f10x.h.
#define ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) |
Bit 2
Definition at line 3729 of file stm32f10x.h.
#define ADC_CR1_DUALMOD ((uint32_t)0x000F0000) |
DUALMOD[3:0] bits (Dual mode selection)
Definition at line 3731 of file stm32f10x.h.
#define ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 3732 of file stm32f10x.h.
#define ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 3733 of file stm32f10x.h.
#define ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 3734 of file stm32f10x.h.
#define ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 3735 of file stm32f10x.h.
#define ADC_CR1_EOCIE ((uint32_t)0x00000020) |
Interrupt enable for EOC
Definition at line 3717 of file stm32f10x.h.
#define ADC_CR1_JAUTO ((uint32_t)0x00000400) |
Automatic injected group conversion
Definition at line 3722 of file stm32f10x.h.
#define ADC_CR1_JAWDEN ((uint32_t)0x00400000) |
Analog watchdog enable on injected channels
Definition at line 3737 of file stm32f10x.h.
#define ADC_CR1_JDISCEN ((uint32_t)0x00001000) |
Discontinuous mode on injected channels
Definition at line 3724 of file stm32f10x.h.
#define ADC_CR1_JEOCIE ((uint32_t)0x00000080) |
Interrupt enable for injected channels
Definition at line 3719 of file stm32f10x.h.
#define ADC_CR1_SCAN ((uint32_t)0x00000100) |
Scan mode
Definition at line 3720 of file stm32f10x.h.
#define ADC_CR2_ADON ((uint32_t)0x00000001) |
A/D Converter ON / OFF
Definition at line 3742 of file stm32f10x.h.
#define ADC_CR2_ALIGN ((uint32_t)0x00000800) |
Data Alignment
Definition at line 3747 of file stm32f10x.h.
#define ADC_CR2_CAL ((uint32_t)0x00000004) |
A/D Calibration
Definition at line 3744 of file stm32f10x.h.
#define ADC_CR2_CONT ((uint32_t)0x00000002) |
Continuous Conversion
Definition at line 3743 of file stm32f10x.h.
#define ADC_CR2_DMA ((uint32_t)0x00000100) |
Direct Memory access mode
Definition at line 3746 of file stm32f10x.h.
#define ADC_CR2_EXTSEL ((uint32_t)0x000E0000) |
EXTSEL[2:0] bits (External Event Select for regular group)
Definition at line 3756 of file stm32f10x.h.
#define ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000) |
Bit 0
Definition at line 3757 of file stm32f10x.h.
#define ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000) |
Bit 1
Definition at line 3758 of file stm32f10x.h.
#define ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000) |
Bit 2
Definition at line 3759 of file stm32f10x.h.
#define ADC_CR2_EXTTRIG ((uint32_t)0x00100000) |
External Trigger Conversion mode for regular channels
Definition at line 3761 of file stm32f10x.h.
#define ADC_CR2_JEXTSEL ((uint32_t)0x00007000) |
JEXTSEL[2:0] bits (External event select for injected group)
Definition at line 3749 of file stm32f10x.h.
#define ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000) |
Bit 0
Definition at line 3750 of file stm32f10x.h.
#define ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000) |
Bit 1
Definition at line 3751 of file stm32f10x.h.
#define ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000) |
Bit 2
Definition at line 3752 of file stm32f10x.h.
#define ADC_CR2_JEXTTRIG ((uint32_t)0x00008000) |
External Trigger Conversion mode for injected channels
Definition at line 3754 of file stm32f10x.h.
#define ADC_CR2_JSWSTART ((uint32_t)0x00200000) |
Start Conversion of injected channels
Definition at line 3762 of file stm32f10x.h.
#define ADC_CR2_RSTCAL ((uint32_t)0x00000008) |
Reset Calibration
Definition at line 3745 of file stm32f10x.h.
#define ADC_CR2_SWSTART ((uint32_t)0x00400000) |
Start Conversion of regular channels
Definition at line 3763 of file stm32f10x.h.
#define ADC_CR2_TSVREFE ((uint32_t)0x00800000) |
Temperature Sensor and VREFINT Enable
Definition at line 3764 of file stm32f10x.h.
#define ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) |
ADC2 data
Definition at line 4044 of file stm32f10x.h.
#define ADC_DR_DATA ((uint32_t)0x0000FFFF) |
Regular data
Definition at line 4043 of file stm32f10x.h.
#define ADC_HTR_HT ((uint16_t)0x0FFF) |
Analog watchdog high threshold
Definition at line 3871 of file stm32f10x.h.
#define ADC_JDR1_JDATA ((uint16_t)0xFFFF) |
Injected data
Definition at line 4031 of file stm32f10x.h.
#define ADC_JDR2_JDATA ((uint16_t)0xFFFF) |
Injected data
Definition at line 4034 of file stm32f10x.h.
#define ADC_JDR3_JDATA ((uint16_t)0xFFFF) |
Injected data
Definition at line 4037 of file stm32f10x.h.
#define ADC_JDR4_JDATA ((uint16_t)0xFFFF) |
Injected data
Definition at line 4040 of file stm32f10x.h.
#define ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) |
Data offset for injected channel 1
Definition at line 3859 of file stm32f10x.h.
#define ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) |
Data offset for injected channel 2
Definition at line 3862 of file stm32f10x.h.
#define ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) |
Data offset for injected channel 3
Definition at line 3865 of file stm32f10x.h.
#define ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) |
Data offset for injected channel 4
Definition at line 3868 of file stm32f10x.h.
#define ADC_JSQR_JL ((uint32_t)0x00300000) |
JL[1:0] bits (Injected Sequence length)
Definition at line 4026 of file stm32f10x.h.
#define ADC_JSQR_JL_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4027 of file stm32f10x.h.
#define ADC_JSQR_JL_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4028 of file stm32f10x.h.
#define ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) |
JSQ1[4:0] bits (1st conversion in injected sequence)
Definition at line 3998 of file stm32f10x.h.
#define ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3999 of file stm32f10x.h.
#define ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4000 of file stm32f10x.h.
#define ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4001 of file stm32f10x.h.
#define ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4002 of file stm32f10x.h.
#define ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 4003 of file stm32f10x.h.
#define ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) |
JSQ2[4:0] bits (2nd conversion in injected sequence)
Definition at line 4005 of file stm32f10x.h.
#define ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) |
Bit 0
Definition at line 4006 of file stm32f10x.h.
#define ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) |
Bit 1
Definition at line 4007 of file stm32f10x.h.
#define ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) |
Bit 2
Definition at line 4008 of file stm32f10x.h.
#define ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) |
Bit 3
Definition at line 4009 of file stm32f10x.h.
#define ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) |
Bit 4
Definition at line 4010 of file stm32f10x.h.
#define ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) |
JSQ3[4:0] bits (3rd conversion in injected sequence)
Definition at line 4012 of file stm32f10x.h.
#define ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 4013 of file stm32f10x.h.
#define ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 4014 of file stm32f10x.h.
#define ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 4015 of file stm32f10x.h.
#define ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 4016 of file stm32f10x.h.
#define ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 4017 of file stm32f10x.h.
#define ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) |
JSQ4[4:0] bits (4th conversion in injected sequence)
Definition at line 4019 of file stm32f10x.h.
#define ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 4020 of file stm32f10x.h.
#define ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 4021 of file stm32f10x.h.
#define ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 4022 of file stm32f10x.h.
#define ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) |
Bit 3
Definition at line 4023 of file stm32f10x.h.
#define ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) |
Bit 4
Definition at line 4024 of file stm32f10x.h.
#define ADC_LTR_LT ((uint16_t)0x0FFF) |
Analog watchdog low threshold
Definition at line 3874 of file stm32f10x.h.
#define ADC_SMPR1_SMP10 ((uint32_t)0x00000007) |
SMP10[2:0] bits (Channel 10 Sample time selection)
Definition at line 3767 of file stm32f10x.h.
#define ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3768 of file stm32f10x.h.
#define ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3769 of file stm32f10x.h.
#define ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3770 of file stm32f10x.h.
#define ADC_SMPR1_SMP11 ((uint32_t)0x00000038) |
SMP11[2:0] bits (Channel 11 Sample time selection)
Definition at line 3772 of file stm32f10x.h.
#define ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) |
Bit 0
Definition at line 3773 of file stm32f10x.h.
#define ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) |
Bit 1
Definition at line 3774 of file stm32f10x.h.
#define ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) |
Bit 2
Definition at line 3775 of file stm32f10x.h.
#define ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) |
SMP12[2:0] bits (Channel 12 Sample time selection)
Definition at line 3777 of file stm32f10x.h.
#define ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 3778 of file stm32f10x.h.
#define ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 3779 of file stm32f10x.h.
#define ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) |
Bit 2
Definition at line 3780 of file stm32f10x.h.
#define ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) |
SMP13[2:0] bits (Channel 13 Sample time selection)
Definition at line 3782 of file stm32f10x.h.
#define ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) |
Bit 0
Definition at line 3783 of file stm32f10x.h.
#define ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) |
Bit 1
Definition at line 3784 of file stm32f10x.h.
#define ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) |
Bit 2
Definition at line 3785 of file stm32f10x.h.
#define ADC_SMPR1_SMP14 ((uint32_t)0x00007000) |
SMP14[2:0] bits (Channel 14 Sample time selection)
Definition at line 3787 of file stm32f10x.h.
#define ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) |
Bit 0
Definition at line 3788 of file stm32f10x.h.
#define ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) |
Bit 1
Definition at line 3789 of file stm32f10x.h.
#define ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) |
Bit 2
Definition at line 3790 of file stm32f10x.h.
#define ADC_SMPR1_SMP15 ((uint32_t)0x00038000) |
SMP15[2:0] bits (Channel 15 Sample time selection)
Definition at line 3792 of file stm32f10x.h.
#define ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 3793 of file stm32f10x.h.
#define ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 3794 of file stm32f10x.h.
#define ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 3795 of file stm32f10x.h.
#define ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) |
SMP16[2:0] bits (Channel 16 Sample time selection)
Definition at line 3797 of file stm32f10x.h.
#define ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) |
Bit 0
Definition at line 3798 of file stm32f10x.h.
#define ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) |
Bit 1
Definition at line 3799 of file stm32f10x.h.
#define ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) |
Bit 2
Definition at line 3800 of file stm32f10x.h.
#define ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) |
SMP17[2:0] bits (Channel 17 Sample time selection)
Definition at line 3802 of file stm32f10x.h.
#define ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) |
Bit 0
Definition at line 3803 of file stm32f10x.h.
#define ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) |
Bit 1
Definition at line 3804 of file stm32f10x.h.
#define ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) |
Bit 2
Definition at line 3805 of file stm32f10x.h.
#define ADC_SMPR2_SMP0 ((uint32_t)0x00000007) |
SMP0[2:0] bits (Channel 0 Sample time selection)
Definition at line 3808 of file stm32f10x.h.
#define ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3809 of file stm32f10x.h.
#define ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3810 of file stm32f10x.h.
#define ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3811 of file stm32f10x.h.
#define ADC_SMPR2_SMP1 ((uint32_t)0x00000038) |
SMP1[2:0] bits (Channel 1 Sample time selection)
Definition at line 3813 of file stm32f10x.h.
#define ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) |
Bit 0
Definition at line 3814 of file stm32f10x.h.
#define ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) |
Bit 1
Definition at line 3815 of file stm32f10x.h.
#define ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) |
Bit 2
Definition at line 3816 of file stm32f10x.h.
#define ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) |
SMP2[2:0] bits (Channel 2 Sample time selection)
Definition at line 3818 of file stm32f10x.h.
#define ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 3819 of file stm32f10x.h.
#define ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 3820 of file stm32f10x.h.
#define ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) |
Bit 2
Definition at line 3821 of file stm32f10x.h.
#define ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) |
SMP3[2:0] bits (Channel 3 Sample time selection)
Definition at line 3823 of file stm32f10x.h.
#define ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) |
Bit 0
Definition at line 3824 of file stm32f10x.h.
#define ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) |
Bit 1
Definition at line 3825 of file stm32f10x.h.
#define ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) |
Bit 2
Definition at line 3826 of file stm32f10x.h.
#define ADC_SMPR2_SMP4 ((uint32_t)0x00007000) |
SMP4[2:0] bits (Channel 4 Sample time selection)
Definition at line 3828 of file stm32f10x.h.
#define ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) |
Bit 0
Definition at line 3829 of file stm32f10x.h.
#define ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) |
Bit 1
Definition at line 3830 of file stm32f10x.h.
#define ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) |
Bit 2
Definition at line 3831 of file stm32f10x.h.
#define ADC_SMPR2_SMP5 ((uint32_t)0x00038000) |
SMP5[2:0] bits (Channel 5 Sample time selection)
Definition at line 3833 of file stm32f10x.h.
#define ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 3834 of file stm32f10x.h.
#define ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 3835 of file stm32f10x.h.
#define ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 3836 of file stm32f10x.h.
#define ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) |
SMP6[2:0] bits (Channel 6 Sample time selection)
Definition at line 3838 of file stm32f10x.h.
#define ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) |
Bit 0
Definition at line 3839 of file stm32f10x.h.
#define ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) |
Bit 1
Definition at line 3840 of file stm32f10x.h.
#define ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) |
Bit 2
Definition at line 3841 of file stm32f10x.h.
#define ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) |
SMP7[2:0] bits (Channel 7 Sample time selection)
Definition at line 3843 of file stm32f10x.h.
#define ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) |
Bit 0
Definition at line 3844 of file stm32f10x.h.
#define ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) |
Bit 1
Definition at line 3845 of file stm32f10x.h.
#define ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) |
Bit 2
Definition at line 3846 of file stm32f10x.h.
#define ADC_SMPR2_SMP8 ((uint32_t)0x07000000) |
SMP8[2:0] bits (Channel 8 Sample time selection)
Definition at line 3848 of file stm32f10x.h.
#define ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 3849 of file stm32f10x.h.
#define ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 3850 of file stm32f10x.h.
#define ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 3851 of file stm32f10x.h.
#define ADC_SMPR2_SMP9 ((uint32_t)0x38000000) |
SMP9[2:0] bits (Channel 9 Sample time selection)
Definition at line 3853 of file stm32f10x.h.
#define ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) |
Bit 0
Definition at line 3854 of file stm32f10x.h.
#define ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) |
Bit 1
Definition at line 3855 of file stm32f10x.h.
#define ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) |
Bit 2
Definition at line 3856 of file stm32f10x.h.
#define ADC_SQR1_L ((uint32_t)0x00F00000) |
L[3:0] bits (Regular channel sequence length)
Definition at line 3905 of file stm32f10x.h.
#define ADC_SQR1_L_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 3906 of file stm32f10x.h.
#define ADC_SQR1_L_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 3907 of file stm32f10x.h.
#define ADC_SQR1_L_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 3908 of file stm32f10x.h.
#define ADC_SQR1_L_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 3909 of file stm32f10x.h.
#define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) |
SQ13[4:0] bits (13th conversion in regular sequence)
Definition at line 3877 of file stm32f10x.h.
#define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3878 of file stm32f10x.h.
#define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3879 of file stm32f10x.h.
#define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3880 of file stm32f10x.h.
#define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 3881 of file stm32f10x.h.
#define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 3882 of file stm32f10x.h.
#define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) |
SQ14[4:0] bits (14th conversion in regular sequence)
Definition at line 3884 of file stm32f10x.h.
#define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) |
Bit 0
Definition at line 3885 of file stm32f10x.h.
#define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) |
Bit 1
Definition at line 3886 of file stm32f10x.h.
#define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) |
Bit 2
Definition at line 3887 of file stm32f10x.h.
#define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) |
Bit 3
Definition at line 3888 of file stm32f10x.h.
#define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) |
Bit 4
Definition at line 3889 of file stm32f10x.h.
#define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) |
SQ15[4:0] bits (15th conversion in regular sequence)
Definition at line 3891 of file stm32f10x.h.
#define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 3892 of file stm32f10x.h.
#define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 3893 of file stm32f10x.h.
#define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 3894 of file stm32f10x.h.
#define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 3895 of file stm32f10x.h.
#define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 3896 of file stm32f10x.h.
#define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) |
SQ16[4:0] bits (16th conversion in regular sequence)
Definition at line 3898 of file stm32f10x.h.
#define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 3899 of file stm32f10x.h.
#define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 3900 of file stm32f10x.h.
#define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 3901 of file stm32f10x.h.
#define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) |
Bit 3
Definition at line 3902 of file stm32f10x.h.
#define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) |
Bit 4
Definition at line 3903 of file stm32f10x.h.
#define ADC_SQR2_SQ10 ((uint32_t)0x000F8000) |
SQ10[4:0] bits (10th conversion in regular sequence)
Definition at line 3933 of file stm32f10x.h.
#define ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 3934 of file stm32f10x.h.
#define ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 3935 of file stm32f10x.h.
#define ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 3936 of file stm32f10x.h.
#define ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) |
Bit 3
Definition at line 3937 of file stm32f10x.h.
#define ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) |
Bit 4
Definition at line 3938 of file stm32f10x.h.
#define ADC_SQR2_SQ11 ((uint32_t)0x01F00000) |
SQ11[4:0] bits (11th conversion in regular sequence)
Definition at line 3940 of file stm32f10x.h.
#define ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 3941 of file stm32f10x.h.
#define ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 3942 of file stm32f10x.h.
#define ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 3943 of file stm32f10x.h.
#define ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 3944 of file stm32f10x.h.
#define ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) |
Bit 4
Definition at line 3945 of file stm32f10x.h.
#define ADC_SQR2_SQ12 ((uint32_t)0x3E000000) |
SQ12[4:0] bits (12th conversion in regular sequence)
Definition at line 3947 of file stm32f10x.h.
#define ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) |
Bit 0
Definition at line 3948 of file stm32f10x.h.
#define ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) |
Bit 1
Definition at line 3949 of file stm32f10x.h.
#define ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) |
Bit 2
Definition at line 3950 of file stm32f10x.h.
#define ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) |
Bit 3
Definition at line 3951 of file stm32f10x.h.
#define ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) |
Bit 4
Definition at line 3952 of file stm32f10x.h.
#define ADC_SQR2_SQ7 ((uint32_t)0x0000001F) |
SQ7[4:0] bits (7th conversion in regular sequence)
Definition at line 3912 of file stm32f10x.h.
#define ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3913 of file stm32f10x.h.
#define ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3914 of file stm32f10x.h.
#define ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3915 of file stm32f10x.h.
#define ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 3916 of file stm32f10x.h.
#define ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 3917 of file stm32f10x.h.
#define ADC_SQR2_SQ8 ((uint32_t)0x000003E0) |
SQ8[4:0] bits (8th conversion in regular sequence)
Definition at line 3919 of file stm32f10x.h.
#define ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) |
Bit 0
Definition at line 3920 of file stm32f10x.h.
#define ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) |
Bit 1
Definition at line 3921 of file stm32f10x.h.
#define ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) |
Bit 2
Definition at line 3922 of file stm32f10x.h.
#define ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) |
Bit 3
Definition at line 3923 of file stm32f10x.h.
#define ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) |
Bit 4
Definition at line 3924 of file stm32f10x.h.
#define ADC_SQR2_SQ9 ((uint32_t)0x00007C00) |
SQ9[4:0] bits (9th conversion in regular sequence)
Definition at line 3926 of file stm32f10x.h.
#define ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 3927 of file stm32f10x.h.
#define ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 3928 of file stm32f10x.h.
#define ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 3929 of file stm32f10x.h.
#define ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 3930 of file stm32f10x.h.
#define ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 3931 of file stm32f10x.h.
#define ADC_SQR3_SQ1 ((uint32_t)0x0000001F) |
SQ1[4:0] bits (1st conversion in regular sequence)
Definition at line 3955 of file stm32f10x.h.
#define ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 3956 of file stm32f10x.h.
#define ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 3957 of file stm32f10x.h.
#define ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 3958 of file stm32f10x.h.
#define ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 3959 of file stm32f10x.h.
#define ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 3960 of file stm32f10x.h.
#define ADC_SQR3_SQ2 ((uint32_t)0x000003E0) |
SQ2[4:0] bits (2nd conversion in regular sequence)
Definition at line 3962 of file stm32f10x.h.
#define ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) |
Bit 0
Definition at line 3963 of file stm32f10x.h.
#define ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) |
Bit 1
Definition at line 3964 of file stm32f10x.h.
#define ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) |
Bit 2
Definition at line 3965 of file stm32f10x.h.
#define ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) |
Bit 3
Definition at line 3966 of file stm32f10x.h.
#define ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) |
Bit 4
Definition at line 3967 of file stm32f10x.h.
#define ADC_SQR3_SQ3 ((uint32_t)0x00007C00) |
SQ3[4:0] bits (3rd conversion in regular sequence)
Definition at line 3969 of file stm32f10x.h.
#define ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 3970 of file stm32f10x.h.
#define ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 3971 of file stm32f10x.h.
#define ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 3972 of file stm32f10x.h.
#define ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 3973 of file stm32f10x.h.
#define ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 3974 of file stm32f10x.h.
#define ADC_SQR3_SQ4 ((uint32_t)0x000F8000) |
SQ4[4:0] bits (4th conversion in regular sequence)
Definition at line 3976 of file stm32f10x.h.
#define ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) |
Bit 0
Definition at line 3977 of file stm32f10x.h.
#define ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) |
Bit 1
Definition at line 3978 of file stm32f10x.h.
#define ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) |
Bit 2
Definition at line 3979 of file stm32f10x.h.
#define ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) |
Bit 3
Definition at line 3980 of file stm32f10x.h.
#define ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) |
Bit 4
Definition at line 3981 of file stm32f10x.h.
#define ADC_SQR3_SQ5 ((uint32_t)0x01F00000) |
SQ5[4:0] bits (5th conversion in regular sequence)
Definition at line 3983 of file stm32f10x.h.
#define ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 3984 of file stm32f10x.h.
#define ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 3985 of file stm32f10x.h.
#define ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 3986 of file stm32f10x.h.
#define ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 3987 of file stm32f10x.h.
#define ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) |
Bit 4
Definition at line 3988 of file stm32f10x.h.
#define ADC_SQR3_SQ6 ((uint32_t)0x3E000000) |
SQ6[4:0] bits (6th conversion in regular sequence)
Definition at line 3990 of file stm32f10x.h.
#define ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) |
Bit 0
Definition at line 3991 of file stm32f10x.h.
#define ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) |
Bit 1
Definition at line 3992 of file stm32f10x.h.
#define ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) |
Bit 2
Definition at line 3993 of file stm32f10x.h.
#define ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) |
Bit 3
Definition at line 3994 of file stm32f10x.h.
#define ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) |
Bit 4
Definition at line 3995 of file stm32f10x.h.
#define ADC_SR_AWD ((uint8_t)0x01) |
Analog watchdog flag
Definition at line 3703 of file stm32f10x.h.
#define ADC_SR_EOC ((uint8_t)0x02) |
End of conversion
Definition at line 3704 of file stm32f10x.h.
#define ADC_SR_JEOC ((uint8_t)0x04) |
Injected channel end of conversion
Definition at line 3705 of file stm32f10x.h.
#define ADC_SR_JSTRT ((uint8_t)0x08) |
Injected channel Start flag
Definition at line 3706 of file stm32f10x.h.
#define ADC_SR_STRT ((uint8_t)0x10) |
Regular channel Start flag
Definition at line 3707 of file stm32f10x.h.
#define AFIO_EVCR_EVOE ((uint8_t)0x80) |
Event Output Enable
Definition at line 2592 of file stm32f10x.h.
#define AFIO_EVCR_PIN ((uint8_t)0x0F) |
PIN[3:0] bits (Pin selection)
Definition at line 2556 of file stm32f10x.h.
#define AFIO_EVCR_PIN_0 ((uint8_t)0x01) |
Bit 0
Definition at line 2557 of file stm32f10x.h.
#define AFIO_EVCR_PIN_1 ((uint8_t)0x02) |
Bit 1
Definition at line 2558 of file stm32f10x.h.
#define AFIO_EVCR_PIN_2 ((uint8_t)0x04) |
Bit 2
Definition at line 2559 of file stm32f10x.h.
#define AFIO_EVCR_PIN_3 ((uint8_t)0x08) |
Bit 3 PIN configuration
Definition at line 2560 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) |
Pin 0 selected
Definition at line 2563 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) |
Pin 1 selected
Definition at line 2564 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) |
Pin 10 selected
Definition at line 2573 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) |
Pin 11 selected
Definition at line 2574 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) |
Pin 12 selected
Definition at line 2575 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) |
Pin 13 selected
Definition at line 2576 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) |
Pin 14 selected
Definition at line 2577 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) |
Pin 15 selected
Definition at line 2578 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) |
Pin 2 selected
Definition at line 2565 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) |
Pin 3 selected
Definition at line 2566 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) |
Pin 4 selected
Definition at line 2567 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) |
Pin 5 selected
Definition at line 2568 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) |
Pin 6 selected
Definition at line 2569 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) |
Pin 7 selected
Definition at line 2570 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) |
Pin 8 selected
Definition at line 2571 of file stm32f10x.h.
#define AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) |
Pin 9 selected
Definition at line 2572 of file stm32f10x.h.
#define AFIO_EVCR_PORT ((uint8_t)0x70) |
PORT[2:0] bits (Port selection)
Definition at line 2580 of file stm32f10x.h.
#define AFIO_EVCR_PORT_0 ((uint8_t)0x10) |
Bit 0
Definition at line 2581 of file stm32f10x.h.
#define AFIO_EVCR_PORT_1 ((uint8_t)0x20) |
Bit 1
Definition at line 2582 of file stm32f10x.h.
#define AFIO_EVCR_PORT_2 ((uint8_t)0x40) |
Bit 2 PORT configuration
Definition at line 2583 of file stm32f10x.h.
#define AFIO_EVCR_PORT_PA ((uint8_t)0x00) |
Port A selected
Definition at line 2586 of file stm32f10x.h.
#define AFIO_EVCR_PORT_PB ((uint8_t)0x10) |
Port B selected
Definition at line 2587 of file stm32f10x.h.
#define AFIO_EVCR_PORT_PC ((uint8_t)0x20) |
Port C selected
Definition at line 2588 of file stm32f10x.h.
#define AFIO_EVCR_PORT_PD ((uint8_t)0x30) |
Port D selected
Definition at line 2589 of file stm32f10x.h.
#define AFIO_EVCR_PORT_PE ((uint8_t)0x40) |
Port E selected
Definition at line 2590 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) |
EXTI 0 configuration
Definition at line 2687 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) |
PA[0] pin
Definition at line 2693 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) |
PB[0] pin
Definition at line 2694 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) |
PC[0] pin
Definition at line 2695 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) |
PD[0] pin
Definition at line 2696 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) |
PE[0] pin
Definition at line 2697 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) |
PF[0] pin
Definition at line 2698 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) |
PG[0] pin EXTI1 configuration
Definition at line 2699 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) |
EXTI 1 configuration
Definition at line 2688 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) |
PA[1] pin
Definition at line 2702 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) |
PB[1] pin
Definition at line 2703 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) |
PC[1] pin
Definition at line 2704 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) |
PD[1] pin
Definition at line 2705 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) |
PE[1] pin
Definition at line 2706 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) |
PF[1] pin
Definition at line 2707 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) |
PG[1] pin EXTI2 configuration
Definition at line 2708 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) |
EXTI 2 configuration
Definition at line 2689 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) |
PA[2] pin
Definition at line 2711 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) |
PB[2] pin
Definition at line 2712 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) |
PC[2] pin
Definition at line 2713 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) |
PD[2] pin
Definition at line 2714 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) |
PE[2] pin
Definition at line 2715 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) |
PF[2] pin
Definition at line 2716 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) |
PG[2] pin EXTI3 configuration
Definition at line 2717 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) |
EXTI 3 configuration EXTI0 configuration
Definition at line 2690 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) |
PA[3] pin
Definition at line 2720 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) |
PB[3] pin
Definition at line 2721 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) |
PC[3] pin
Definition at line 2722 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) |
PD[3] pin
Definition at line 2723 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) |
PE[3] pin
Definition at line 2724 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) |
PF[3] pin
Definition at line 2725 of file stm32f10x.h.
#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) |
PG[3] pin
Definition at line 2726 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) |
EXTI 4 configuration
Definition at line 2729 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) |
PA[4] pin
Definition at line 2735 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) |
PB[4] pin
Definition at line 2736 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) |
PC[4] pin
Definition at line 2737 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) |
PD[4] pin
Definition at line 2738 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) |
PE[4] pin
Definition at line 2739 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) |
PF[4] pin
Definition at line 2740 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) |
PG[4] pin
Definition at line 2741 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) |
EXTI 5 configuration
Definition at line 2730 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) |
PA[5] pin
Definition at line 2744 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) |
PB[5] pin
Definition at line 2745 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) |
PC[5] pin
Definition at line 2746 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) |
PD[5] pin
Definition at line 2747 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) |
PE[5] pin
Definition at line 2748 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) |
PF[5] pin
Definition at line 2749 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) |
PG[5] pin EXTI6 configuration
Definition at line 2750 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) |
EXTI 6 configuration
Definition at line 2731 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) |
PA[6] pin
Definition at line 2753 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) |
PB[6] pin
Definition at line 2754 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) |
PC[6] pin
Definition at line 2755 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) |
PD[6] pin
Definition at line 2756 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) |
PE[6] pin
Definition at line 2757 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) |
PF[6] pin
Definition at line 2758 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) |
PG[6] pin EXTI7 configuration
Definition at line 2759 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) |
EXTI 7 configuration EXTI4 configuration
Definition at line 2732 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) |
PA[7] pin
Definition at line 2762 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) |
PB[7] pin
Definition at line 2763 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) |
PC[7] pin
Definition at line 2764 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) |
PD[7] pin
Definition at line 2765 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) |
PE[7] pin
Definition at line 2766 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) |
PF[7] pin
Definition at line 2767 of file stm32f10x.h.
#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) |
PG[7] pin
Definition at line 2768 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) |
EXTI 10 configuration
Definition at line 2773 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) |
PA[10] pin
Definition at line 2795 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) |
PB[10] pin
Definition at line 2796 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) |
PC[10] pin
Definition at line 2797 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) |
PD[10] pin
Definition at line 2798 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) |
PE[10] pin
Definition at line 2799 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) |
PF[10] pin
Definition at line 2800 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) |
PG[10] pin EXTI11 configuration
Definition at line 2801 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) |
EXTI 11 configuration EXTI8 configuration
Definition at line 2774 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) |
PA[11] pin
Definition at line 2804 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) |
PB[11] pin
Definition at line 2805 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) |
PC[11] pin
Definition at line 2806 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) |
PD[11] pin
Definition at line 2807 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) |
PE[11] pin
Definition at line 2808 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) |
PF[11] pin
Definition at line 2809 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) |
PG[11] pin
Definition at line 2810 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) |
EXTI 8 configuration
Definition at line 2771 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) |
PA[8] pin
Definition at line 2777 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) |
PB[8] pin
Definition at line 2778 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) |
PC[8] pin
Definition at line 2779 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) |
PD[8] pin
Definition at line 2780 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) |
PE[8] pin
Definition at line 2781 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) |
PF[8] pin
Definition at line 2782 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) |
PG[8] pin EXTI9 configuration
Definition at line 2783 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) |
EXTI 9 configuration
Definition at line 2772 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) |
PA[9] pin
Definition at line 2786 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) |
PB[9] pin
Definition at line 2787 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) |
PC[9] pin
Definition at line 2788 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) |
PD[9] pin
Definition at line 2789 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) |
PE[9] pin
Definition at line 2790 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) |
PF[9] pin
Definition at line 2791 of file stm32f10x.h.
#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) |
PG[9] pin EXTI10 configuration
Definition at line 2792 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) |
EXTI 12 configuration
Definition at line 2813 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) |
PA[12] pin
Definition at line 2819 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) |
PB[12] pin
Definition at line 2820 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) |
PC[12] pin
Definition at line 2821 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) |
PD[12] pin
Definition at line 2822 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) |
PE[12] pin
Definition at line 2823 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) |
PF[12] pin
Definition at line 2824 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) |
PG[12] pin
Definition at line 2825 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) |
EXTI 13 configuration
Definition at line 2814 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) |
PA[13] pin
Definition at line 2828 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) |
PB[13] pin
Definition at line 2829 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) |
PC[13] pin
Definition at line 2830 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) |
PD[13] pin
Definition at line 2831 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) |
PE[13] pin
Definition at line 2832 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) |
PF[13] pin
Definition at line 2833 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) |
PG[13] pin EXTI14 configuration
Definition at line 2834 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) |
EXTI 14 configuration
Definition at line 2815 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) |
PA[14] pin
Definition at line 2837 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) |
PB[14] pin
Definition at line 2838 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) |
PC[14] pin
Definition at line 2839 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) |
PD[14] pin
Definition at line 2840 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) |
PE[14] pin
Definition at line 2841 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) |
PF[14] pin
Definition at line 2842 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) |
PG[14] pin EXTI15 configuration
Definition at line 2843 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) |
EXTI 15 configuration
Definition at line 2816 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) |
PA[15] pin
Definition at line 2846 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) |
PB[15] pin
Definition at line 2847 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) |
PC[15] pin
Definition at line 2848 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) |
PD[15] pin
Definition at line 2849 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) |
PE[15] pin
Definition at line 2850 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) |
PF[15] pin
Definition at line 2851 of file stm32f10x.h.
#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) |
PG[15] pin
Definition at line 2852 of file stm32f10x.h.
#define AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) |
ADC 1 External Trigger Injected Conversion remapping
Definition at line 2650 of file stm32f10x.h.
#define AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) |
ADC 1 External Trigger Regular Conversion remapping
Definition at line 2651 of file stm32f10x.h.
#define AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) |
ADC 2 External Trigger Injected Conversion remapping
Definition at line 2652 of file stm32f10x.h.
#define AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) |
ADC 2 External Trigger Regular Conversion remapping SWJ_CFG configuration
Definition at line 2653 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) |
CAN_REMAP[1:0] bits (CAN Alternate function remapping)
Definition at line 2639 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) |
Bit 0
Definition at line 2640 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) |
Bit 1 CAN_REMAP configuration
Definition at line 2641 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) |
CANRX mapped to PA11, CANTX mapped to PA12
Definition at line 2644 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) |
CANRX mapped to PB8, CANTX mapped to PB9
Definition at line 2645 of file stm32f10x.h.
#define AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) |
CANRX mapped to PD0, CANTX mapped to PD1
Definition at line 2646 of file stm32f10x.h.
#define AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) |
I2C1 remapping
Definition at line 2596 of file stm32f10x.h.
#define AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) |
Port D0/Port D1 mapping on OSC_IN/OSC_OUT
Definition at line 2648 of file stm32f10x.h.
#define AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) |
SPI1 remapping
Definition at line 2595 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) |
SWJ_CFG[2:0] bits (Serial Wire JTAG configuration)
Definition at line 2656 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 2657 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 2658 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 2659 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) |
JTAG-DP Disabled and SW-DP Disabled
Definition at line 2664 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) |
JTAG-DP Disabled and SW-DP Enabled
Definition at line 2663 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) |
Full SWJ (JTAG-DP + SW-DP) but without JNTRST
Definition at line 2662 of file stm32f10x.h.
#define AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) |
Full SWJ (JTAG-DP + SW-DP) : Reset State
Definition at line 2661 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) |
TIM1_REMAP[1:0] bits (TIM1 remapping)
Definition at line 2609 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 2610 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) |
Bit 1 TIM1_REMAP configuration
Definition at line 2611 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) |
Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12)
Definition at line 2616 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) |
No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15)
Definition at line 2614 of file stm32f10x.h.
#define AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) |
Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1)
Definition at line 2615 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) |
TIM2_REMAP[1:0] bits (TIM2 remapping)
Definition at line 2618 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 2619 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) |
Bit 1 TIM2_REMAP configuration
Definition at line 2620 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) |
Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11)
Definition at line 2626 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) |
No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3)
Definition at line 2623 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) |
Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3)
Definition at line 2624 of file stm32f10x.h.
#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) |
Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11)
Definition at line 2625 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) |
TIM3_REMAP[1:0] bits (TIM3 remapping)
Definition at line 2628 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 2629 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) |
Bit 1 TIM3_REMAP configuration
Definition at line 2630 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) |
Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9)
Definition at line 2635 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) |
No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1)
Definition at line 2633 of file stm32f10x.h.
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) |
Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1)
Definition at line 2634 of file stm32f10x.h.
#define AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) |
TIM4_REMAP bit (TIM4 remapping)
Definition at line 2637 of file stm32f10x.h.
#define AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) |
TIM5 Channel4 Internal Remap
Definition at line 2649 of file stm32f10x.h.
#define AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) |
USART1 remapping
Definition at line 2597 of file stm32f10x.h.
#define AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) |
USART2 remapping
Definition at line 2598 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) |
USART3_REMAP[1:0] bits (USART3 remapping)
Definition at line 2600 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 2601 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 2602 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) |
Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12)
Definition at line 2607 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) |
No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14)
Definition at line 2605 of file stm32f10x.h.
#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) |
Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14)
Definition at line 2606 of file stm32f10x.h.
#define BKP_CR_TPAL ((uint8_t)0x02) |
TAMPER pin active level
Definition at line 1665 of file stm32f10x.h.
#define BKP_CR_TPE ((uint8_t)0x01) |
TAMPER pin enable
Definition at line 1664 of file stm32f10x.h.
#define BKP_CSR_CTE ((uint16_t)0x0001) |
Clear Tamper event
Definition at line 1668 of file stm32f10x.h.
#define BKP_CSR_CTI ((uint16_t)0x0002) |
Clear Tamper Interrupt
Definition at line 1669 of file stm32f10x.h.
#define BKP_CSR_TEF ((uint16_t)0x0100) |
Tamper Event Flag
Definition at line 1671 of file stm32f10x.h.
#define BKP_CSR_TIF ((uint16_t)0x0200) |
Tamper Interrupt Flag
Definition at line 1672 of file stm32f10x.h.
#define BKP_CSR_TPIE ((uint16_t)0x0004) |
TAMPER Pin interrupt enable
Definition at line 1670 of file stm32f10x.h.
#define BKP_DR10_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1559 of file stm32f10x.h.
#define BKP_DR11_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1562 of file stm32f10x.h.
#define BKP_DR12_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1565 of file stm32f10x.h.
#define BKP_DR13_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1568 of file stm32f10x.h.
#define BKP_DR14_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1571 of file stm32f10x.h.
#define BKP_DR15_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1574 of file stm32f10x.h.
#define BKP_DR16_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1577 of file stm32f10x.h.
#define BKP_DR17_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1580 of file stm32f10x.h.
#define BKP_DR18_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1583 of file stm32f10x.h.
#define BKP_DR19_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1586 of file stm32f10x.h.
#define BKP_DR1_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1532 of file stm32f10x.h.
#define BKP_DR20_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1589 of file stm32f10x.h.
#define BKP_DR21_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1592 of file stm32f10x.h.
#define BKP_DR22_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1595 of file stm32f10x.h.
#define BKP_DR23_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1598 of file stm32f10x.h.
#define BKP_DR24_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1601 of file stm32f10x.h.
#define BKP_DR25_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1604 of file stm32f10x.h.
#define BKP_DR26_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1607 of file stm32f10x.h.
#define BKP_DR27_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1610 of file stm32f10x.h.
#define BKP_DR28_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1613 of file stm32f10x.h.
#define BKP_DR29_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1616 of file stm32f10x.h.
#define BKP_DR2_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1535 of file stm32f10x.h.
#define BKP_DR30_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1619 of file stm32f10x.h.
#define BKP_DR31_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1622 of file stm32f10x.h.
#define BKP_DR32_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1625 of file stm32f10x.h.
#define BKP_DR33_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1628 of file stm32f10x.h.
#define BKP_DR34_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1631 of file stm32f10x.h.
#define BKP_DR35_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1634 of file stm32f10x.h.
#define BKP_DR36_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1637 of file stm32f10x.h.
#define BKP_DR37_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1640 of file stm32f10x.h.
#define BKP_DR38_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1643 of file stm32f10x.h.
#define BKP_DR39_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1646 of file stm32f10x.h.
#define BKP_DR3_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1538 of file stm32f10x.h.
#define BKP_DR40_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1649 of file stm32f10x.h.
#define BKP_DR41_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1652 of file stm32f10x.h.
#define BKP_DR42_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1655 of file stm32f10x.h.
#define BKP_DR4_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1541 of file stm32f10x.h.
#define BKP_DR5_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1544 of file stm32f10x.h.
#define BKP_DR6_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1547 of file stm32f10x.h.
#define BKP_DR7_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1550 of file stm32f10x.h.
#define BKP_DR8_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1553 of file stm32f10x.h.
#define BKP_DR9_D ((uint16_t)0xFFFF) |
Backup data
Definition at line 1556 of file stm32f10x.h.
#define BKP_RTCCR_ASOE ((uint16_t)0x0100) |
Alarm or Second Output Enable
Definition at line 1660 of file stm32f10x.h.
#define BKP_RTCCR_ASOS ((uint16_t)0x0200) |
Alarm or Second Output Selection
Definition at line 1661 of file stm32f10x.h.
#define BKP_RTCCR_CAL ((uint16_t)0x007F) |
Calibration value
Definition at line 1658 of file stm32f10x.h.
#define BKP_RTCCR_CCO ((uint16_t)0x0080) |
Calibration Clock Output
Definition at line 1659 of file stm32f10x.h.
#define CAN_BTR_BRP ((uint32_t)0x000003FF) |
Baud Rate Prescaler
Definition at line 6310 of file stm32f10x.h.
#define CAN_BTR_LBKM ((uint32_t)0x40000000) |
Loop Back Mode (Debug)
Definition at line 6314 of file stm32f10x.h.
#define CAN_BTR_SILM ((uint32_t)0x80000000) |
Silent Mode Mailbox registers
Definition at line 6315 of file stm32f10x.h.
#define CAN_BTR_SJW ((uint32_t)0x03000000) |
Resynchronization Jump Width
Definition at line 6313 of file stm32f10x.h.
#define CAN_BTR_TS1 ((uint32_t)0x000F0000) |
Time Segment 1
Definition at line 6311 of file stm32f10x.h.
#define CAN_BTR_TS2 ((uint32_t)0x00700000) |
Time Segment 2
Definition at line 6312 of file stm32f10x.h.
#define CAN_ESR_BOFF ((uint32_t)0x00000004) |
Bus-Off Flag
Definition at line 6299 of file stm32f10x.h.
#define CAN_ESR_EPVF ((uint32_t)0x00000002) |
Error Passive Flag
Definition at line 6298 of file stm32f10x.h.
#define CAN_ESR_EWGF ((uint32_t)0x00000001) |
Error Warning Flag
Definition at line 6297 of file stm32f10x.h.
#define CAN_ESR_LEC ((uint32_t)0x00000070) |
LEC[2:0] bits (Last Error Code)
Definition at line 6301 of file stm32f10x.h.
#define CAN_ESR_LEC_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 6302 of file stm32f10x.h.
#define CAN_ESR_LEC_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 6303 of file stm32f10x.h.
#define CAN_ESR_LEC_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 6304 of file stm32f10x.h.
#define CAN_ESR_REC ((uint32_t)0xFF000000) |
Receive Error Counter
Definition at line 6307 of file stm32f10x.h.
#define CAN_ESR_TEC ((uint32_t)0x00FF0000) |
Least significant byte of the 9-bit Transmit Error Counter
Definition at line 6306 of file stm32f10x.h.
#define CAN_F0R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6509 of file stm32f10x.h.
#define CAN_F0R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6510 of file stm32f10x.h.
#define CAN_F0R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6519 of file stm32f10x.h.
#define CAN_F0R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6520 of file stm32f10x.h.
#define CAN_F0R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6521 of file stm32f10x.h.
#define CAN_F0R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6522 of file stm32f10x.h.
#define CAN_F0R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6523 of file stm32f10x.h.
#define CAN_F0R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6524 of file stm32f10x.h.
#define CAN_F0R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6525 of file stm32f10x.h.
#define CAN_F0R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6526 of file stm32f10x.h.
#define CAN_F0R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6527 of file stm32f10x.h.
#define CAN_F0R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6528 of file stm32f10x.h.
#define CAN_F0R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6511 of file stm32f10x.h.
#define CAN_F0R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6529 of file stm32f10x.h.
#define CAN_F0R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6530 of file stm32f10x.h.
#define CAN_F0R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6531 of file stm32f10x.h.
#define CAN_F0R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6532 of file stm32f10x.h.
#define CAN_F0R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6533 of file stm32f10x.h.
#define CAN_F0R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6534 of file stm32f10x.h.
#define CAN_F0R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6535 of file stm32f10x.h.
#define CAN_F0R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6536 of file stm32f10x.h.
#define CAN_F0R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6537 of file stm32f10x.h.
#define CAN_F0R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6538 of file stm32f10x.h.
#define CAN_F0R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6512 of file stm32f10x.h.
#define CAN_F0R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6539 of file stm32f10x.h.
#define CAN_F0R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6540 of file stm32f10x.h.
#define CAN_F0R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6513 of file stm32f10x.h.
#define CAN_F0R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6514 of file stm32f10x.h.
#define CAN_F0R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6515 of file stm32f10x.h.
#define CAN_F0R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6516 of file stm32f10x.h.
#define CAN_F0R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6517 of file stm32f10x.h.
#define CAN_F0R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6518 of file stm32f10x.h.
#define CAN_F0R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6985 of file stm32f10x.h.
#define CAN_F0R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6986 of file stm32f10x.h.
#define CAN_F0R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6995 of file stm32f10x.h.
#define CAN_F0R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6996 of file stm32f10x.h.
#define CAN_F0R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6997 of file stm32f10x.h.
#define CAN_F0R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6998 of file stm32f10x.h.
#define CAN_F0R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6999 of file stm32f10x.h.
#define CAN_F0R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7000 of file stm32f10x.h.
#define CAN_F0R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7001 of file stm32f10x.h.
#define CAN_F0R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7002 of file stm32f10x.h.
#define CAN_F0R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7003 of file stm32f10x.h.
#define CAN_F0R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7004 of file stm32f10x.h.
#define CAN_F0R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6987 of file stm32f10x.h.
#define CAN_F0R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7005 of file stm32f10x.h.
#define CAN_F0R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7006 of file stm32f10x.h.
#define CAN_F0R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7007 of file stm32f10x.h.
#define CAN_F0R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7008 of file stm32f10x.h.
#define CAN_F0R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7009 of file stm32f10x.h.
#define CAN_F0R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7010 of file stm32f10x.h.
#define CAN_F0R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7011 of file stm32f10x.h.
#define CAN_F0R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7012 of file stm32f10x.h.
#define CAN_F0R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7013 of file stm32f10x.h.
#define CAN_F0R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7014 of file stm32f10x.h.
#define CAN_F0R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6988 of file stm32f10x.h.
#define CAN_F0R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7015 of file stm32f10x.h.
#define CAN_F0R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7016 of file stm32f10x.h.
#define CAN_F0R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6989 of file stm32f10x.h.
#define CAN_F0R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6990 of file stm32f10x.h.
#define CAN_F0R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6991 of file stm32f10x.h.
#define CAN_F0R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6992 of file stm32f10x.h.
#define CAN_F0R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6993 of file stm32f10x.h.
#define CAN_F0R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6994 of file stm32f10x.h.
#define CAN_F10R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6849 of file stm32f10x.h.
#define CAN_F10R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6850 of file stm32f10x.h.
#define CAN_F10R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6859 of file stm32f10x.h.
#define CAN_F10R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6860 of file stm32f10x.h.
#define CAN_F10R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6861 of file stm32f10x.h.
#define CAN_F10R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6862 of file stm32f10x.h.
#define CAN_F10R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6863 of file stm32f10x.h.
#define CAN_F10R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6864 of file stm32f10x.h.
#define CAN_F10R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6865 of file stm32f10x.h.
#define CAN_F10R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6866 of file stm32f10x.h.
#define CAN_F10R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6867 of file stm32f10x.h.
#define CAN_F10R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6868 of file stm32f10x.h.
#define CAN_F10R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6851 of file stm32f10x.h.
#define CAN_F10R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6869 of file stm32f10x.h.
#define CAN_F10R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6870 of file stm32f10x.h.
#define CAN_F10R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6871 of file stm32f10x.h.
#define CAN_F10R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6872 of file stm32f10x.h.
#define CAN_F10R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6873 of file stm32f10x.h.
#define CAN_F10R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6874 of file stm32f10x.h.
#define CAN_F10R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6875 of file stm32f10x.h.
#define CAN_F10R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6876 of file stm32f10x.h.
#define CAN_F10R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6877 of file stm32f10x.h.
#define CAN_F10R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6878 of file stm32f10x.h.
#define CAN_F10R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6852 of file stm32f10x.h.
#define CAN_F10R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6879 of file stm32f10x.h.
#define CAN_F10R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6880 of file stm32f10x.h.
#define CAN_F10R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6853 of file stm32f10x.h.
#define CAN_F10R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6854 of file stm32f10x.h.
#define CAN_F10R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6855 of file stm32f10x.h.
#define CAN_F10R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6856 of file stm32f10x.h.
#define CAN_F10R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6857 of file stm32f10x.h.
#define CAN_F10R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6858 of file stm32f10x.h.
#define CAN_F10R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7325 of file stm32f10x.h.
#define CAN_F10R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7326 of file stm32f10x.h.
#define CAN_F10R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7335 of file stm32f10x.h.
#define CAN_F10R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7336 of file stm32f10x.h.
#define CAN_F10R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7337 of file stm32f10x.h.
#define CAN_F10R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7338 of file stm32f10x.h.
#define CAN_F10R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7339 of file stm32f10x.h.
#define CAN_F10R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7340 of file stm32f10x.h.
#define CAN_F10R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7341 of file stm32f10x.h.
#define CAN_F10R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7342 of file stm32f10x.h.
#define CAN_F10R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7343 of file stm32f10x.h.
#define CAN_F10R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7344 of file stm32f10x.h.
#define CAN_F10R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7327 of file stm32f10x.h.
#define CAN_F10R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7345 of file stm32f10x.h.
#define CAN_F10R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7346 of file stm32f10x.h.
#define CAN_F10R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7347 of file stm32f10x.h.
#define CAN_F10R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7348 of file stm32f10x.h.
#define CAN_F10R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7349 of file stm32f10x.h.
#define CAN_F10R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7350 of file stm32f10x.h.
#define CAN_F10R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7351 of file stm32f10x.h.
#define CAN_F10R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7352 of file stm32f10x.h.
#define CAN_F10R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7353 of file stm32f10x.h.
#define CAN_F10R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7354 of file stm32f10x.h.
#define CAN_F10R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7328 of file stm32f10x.h.
#define CAN_F10R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7355 of file stm32f10x.h.
#define CAN_F10R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7356 of file stm32f10x.h.
#define CAN_F10R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7329 of file stm32f10x.h.
#define CAN_F10R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7330 of file stm32f10x.h.
#define CAN_F10R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7331 of file stm32f10x.h.
#define CAN_F10R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7332 of file stm32f10x.h.
#define CAN_F10R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7333 of file stm32f10x.h.
#define CAN_F10R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7334 of file stm32f10x.h.
#define CAN_F11R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6883 of file stm32f10x.h.
#define CAN_F11R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6884 of file stm32f10x.h.
#define CAN_F11R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6893 of file stm32f10x.h.
#define CAN_F11R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6894 of file stm32f10x.h.
#define CAN_F11R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6895 of file stm32f10x.h.
#define CAN_F11R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6896 of file stm32f10x.h.
#define CAN_F11R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6897 of file stm32f10x.h.
#define CAN_F11R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6898 of file stm32f10x.h.
#define CAN_F11R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6899 of file stm32f10x.h.
#define CAN_F11R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6900 of file stm32f10x.h.
#define CAN_F11R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6901 of file stm32f10x.h.
#define CAN_F11R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6902 of file stm32f10x.h.
#define CAN_F11R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6885 of file stm32f10x.h.
#define CAN_F11R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6903 of file stm32f10x.h.
#define CAN_F11R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6904 of file stm32f10x.h.
#define CAN_F11R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6905 of file stm32f10x.h.
#define CAN_F11R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6906 of file stm32f10x.h.
#define CAN_F11R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6907 of file stm32f10x.h.
#define CAN_F11R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6908 of file stm32f10x.h.
#define CAN_F11R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6909 of file stm32f10x.h.
#define CAN_F11R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6910 of file stm32f10x.h.
#define CAN_F11R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6911 of file stm32f10x.h.
#define CAN_F11R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6912 of file stm32f10x.h.
#define CAN_F11R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6886 of file stm32f10x.h.
#define CAN_F11R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6913 of file stm32f10x.h.
#define CAN_F11R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6914 of file stm32f10x.h.
#define CAN_F11R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6887 of file stm32f10x.h.
#define CAN_F11R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6888 of file stm32f10x.h.
#define CAN_F11R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6889 of file stm32f10x.h.
#define CAN_F11R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6890 of file stm32f10x.h.
#define CAN_F11R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6891 of file stm32f10x.h.
#define CAN_F11R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6892 of file stm32f10x.h.
#define CAN_F11R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7359 of file stm32f10x.h.
#define CAN_F11R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7360 of file stm32f10x.h.
#define CAN_F11R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7369 of file stm32f10x.h.
#define CAN_F11R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7370 of file stm32f10x.h.
#define CAN_F11R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7371 of file stm32f10x.h.
#define CAN_F11R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7372 of file stm32f10x.h.
#define CAN_F11R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7373 of file stm32f10x.h.
#define CAN_F11R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7374 of file stm32f10x.h.
#define CAN_F11R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7375 of file stm32f10x.h.
#define CAN_F11R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7376 of file stm32f10x.h.
#define CAN_F11R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7377 of file stm32f10x.h.
#define CAN_F11R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7378 of file stm32f10x.h.
#define CAN_F11R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7361 of file stm32f10x.h.
#define CAN_F11R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7379 of file stm32f10x.h.
#define CAN_F11R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7380 of file stm32f10x.h.
#define CAN_F11R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7381 of file stm32f10x.h.
#define CAN_F11R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7382 of file stm32f10x.h.
#define CAN_F11R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7383 of file stm32f10x.h.
#define CAN_F11R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7384 of file stm32f10x.h.
#define CAN_F11R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7385 of file stm32f10x.h.
#define CAN_F11R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7386 of file stm32f10x.h.
#define CAN_F11R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7387 of file stm32f10x.h.
#define CAN_F11R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7388 of file stm32f10x.h.
#define CAN_F11R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7362 of file stm32f10x.h.
#define CAN_F11R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7389 of file stm32f10x.h.
#define CAN_F11R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7390 of file stm32f10x.h.
#define CAN_F11R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7363 of file stm32f10x.h.
#define CAN_F11R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7364 of file stm32f10x.h.
#define CAN_F11R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7365 of file stm32f10x.h.
#define CAN_F11R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7366 of file stm32f10x.h.
#define CAN_F11R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7367 of file stm32f10x.h.
#define CAN_F11R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7368 of file stm32f10x.h.
#define CAN_F12R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6917 of file stm32f10x.h.
#define CAN_F12R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6918 of file stm32f10x.h.
#define CAN_F12R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6927 of file stm32f10x.h.
#define CAN_F12R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6928 of file stm32f10x.h.
#define CAN_F12R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6929 of file stm32f10x.h.
#define CAN_F12R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6930 of file stm32f10x.h.
#define CAN_F12R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6931 of file stm32f10x.h.
#define CAN_F12R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6932 of file stm32f10x.h.
#define CAN_F12R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6933 of file stm32f10x.h.
#define CAN_F12R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6934 of file stm32f10x.h.
#define CAN_F12R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6935 of file stm32f10x.h.
#define CAN_F12R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6936 of file stm32f10x.h.
#define CAN_F12R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6919 of file stm32f10x.h.
#define CAN_F12R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6937 of file stm32f10x.h.
#define CAN_F12R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6938 of file stm32f10x.h.
#define CAN_F12R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6939 of file stm32f10x.h.
#define CAN_F12R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6940 of file stm32f10x.h.
#define CAN_F12R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6941 of file stm32f10x.h.
#define CAN_F12R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6942 of file stm32f10x.h.
#define CAN_F12R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6943 of file stm32f10x.h.
#define CAN_F12R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6944 of file stm32f10x.h.
#define CAN_F12R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6945 of file stm32f10x.h.
#define CAN_F12R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6946 of file stm32f10x.h.
#define CAN_F12R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6920 of file stm32f10x.h.
#define CAN_F12R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6947 of file stm32f10x.h.
#define CAN_F12R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6948 of file stm32f10x.h.
#define CAN_F12R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6921 of file stm32f10x.h.
#define CAN_F12R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6922 of file stm32f10x.h.
#define CAN_F12R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6923 of file stm32f10x.h.
#define CAN_F12R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6924 of file stm32f10x.h.
#define CAN_F12R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6925 of file stm32f10x.h.
#define CAN_F12R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6926 of file stm32f10x.h.
#define CAN_F12R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7393 of file stm32f10x.h.
#define CAN_F12R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7394 of file stm32f10x.h.
#define CAN_F12R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7403 of file stm32f10x.h.
#define CAN_F12R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7404 of file stm32f10x.h.
#define CAN_F12R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7405 of file stm32f10x.h.
#define CAN_F12R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7406 of file stm32f10x.h.
#define CAN_F12R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7407 of file stm32f10x.h.
#define CAN_F12R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7408 of file stm32f10x.h.
#define CAN_F12R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7409 of file stm32f10x.h.
#define CAN_F12R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7410 of file stm32f10x.h.
#define CAN_F12R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7411 of file stm32f10x.h.
#define CAN_F12R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7412 of file stm32f10x.h.
#define CAN_F12R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7395 of file stm32f10x.h.
#define CAN_F12R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7413 of file stm32f10x.h.
#define CAN_F12R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7414 of file stm32f10x.h.
#define CAN_F12R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7415 of file stm32f10x.h.
#define CAN_F12R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7416 of file stm32f10x.h.
#define CAN_F12R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7417 of file stm32f10x.h.
#define CAN_F12R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7418 of file stm32f10x.h.
#define CAN_F12R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7419 of file stm32f10x.h.
#define CAN_F12R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7420 of file stm32f10x.h.
#define CAN_F12R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7421 of file stm32f10x.h.
#define CAN_F12R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7422 of file stm32f10x.h.
#define CAN_F12R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7396 of file stm32f10x.h.
#define CAN_F12R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7423 of file stm32f10x.h.
#define CAN_F12R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7424 of file stm32f10x.h.
#define CAN_F12R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7397 of file stm32f10x.h.
#define CAN_F12R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7398 of file stm32f10x.h.
#define CAN_F12R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7399 of file stm32f10x.h.
#define CAN_F12R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7400 of file stm32f10x.h.
#define CAN_F12R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7401 of file stm32f10x.h.
#define CAN_F12R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7402 of file stm32f10x.h.
#define CAN_F13R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6951 of file stm32f10x.h.
#define CAN_F13R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6952 of file stm32f10x.h.
#define CAN_F13R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6961 of file stm32f10x.h.
#define CAN_F13R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6962 of file stm32f10x.h.
#define CAN_F13R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6963 of file stm32f10x.h.
#define CAN_F13R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6964 of file stm32f10x.h.
#define CAN_F13R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6965 of file stm32f10x.h.
#define CAN_F13R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6966 of file stm32f10x.h.
#define CAN_F13R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6967 of file stm32f10x.h.
#define CAN_F13R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6968 of file stm32f10x.h.
#define CAN_F13R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6969 of file stm32f10x.h.
#define CAN_F13R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6970 of file stm32f10x.h.
#define CAN_F13R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6953 of file stm32f10x.h.
#define CAN_F13R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6971 of file stm32f10x.h.
#define CAN_F13R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6972 of file stm32f10x.h.
#define CAN_F13R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6973 of file stm32f10x.h.
#define CAN_F13R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6974 of file stm32f10x.h.
#define CAN_F13R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6975 of file stm32f10x.h.
#define CAN_F13R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6976 of file stm32f10x.h.
#define CAN_F13R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6977 of file stm32f10x.h.
#define CAN_F13R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6978 of file stm32f10x.h.
#define CAN_F13R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6979 of file stm32f10x.h.
#define CAN_F13R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6980 of file stm32f10x.h.
#define CAN_F13R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6954 of file stm32f10x.h.
#define CAN_F13R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6981 of file stm32f10x.h.
#define CAN_F13R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6982 of file stm32f10x.h.
#define CAN_F13R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6955 of file stm32f10x.h.
#define CAN_F13R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6956 of file stm32f10x.h.
#define CAN_F13R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6957 of file stm32f10x.h.
#define CAN_F13R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6958 of file stm32f10x.h.
#define CAN_F13R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6959 of file stm32f10x.h.
#define CAN_F13R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6960 of file stm32f10x.h.
#define CAN_F13R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7427 of file stm32f10x.h.
#define CAN_F13R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7428 of file stm32f10x.h.
#define CAN_F13R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7437 of file stm32f10x.h.
#define CAN_F13R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7438 of file stm32f10x.h.
#define CAN_F13R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7439 of file stm32f10x.h.
#define CAN_F13R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7440 of file stm32f10x.h.
#define CAN_F13R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7441 of file stm32f10x.h.
#define CAN_F13R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7442 of file stm32f10x.h.
#define CAN_F13R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7443 of file stm32f10x.h.
#define CAN_F13R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7444 of file stm32f10x.h.
#define CAN_F13R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7445 of file stm32f10x.h.
#define CAN_F13R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7446 of file stm32f10x.h.
#define CAN_F13R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7429 of file stm32f10x.h.
#define CAN_F13R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7447 of file stm32f10x.h.
#define CAN_F13R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7448 of file stm32f10x.h.
#define CAN_F13R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7449 of file stm32f10x.h.
#define CAN_F13R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7450 of file stm32f10x.h.
#define CAN_F13R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7451 of file stm32f10x.h.
#define CAN_F13R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7452 of file stm32f10x.h.
#define CAN_F13R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7453 of file stm32f10x.h.
#define CAN_F13R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7454 of file stm32f10x.h.
#define CAN_F13R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7455 of file stm32f10x.h.
#define CAN_F13R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7456 of file stm32f10x.h.
#define CAN_F13R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7430 of file stm32f10x.h.
#define CAN_F13R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7457 of file stm32f10x.h.
#define CAN_F13R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7458 of file stm32f10x.h.
#define CAN_F13R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7431 of file stm32f10x.h.
#define CAN_F13R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7432 of file stm32f10x.h.
#define CAN_F13R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7433 of file stm32f10x.h.
#define CAN_F13R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7434 of file stm32f10x.h.
#define CAN_F13R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7435 of file stm32f10x.h.
#define CAN_F13R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7436 of file stm32f10x.h.
#define CAN_F1R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6543 of file stm32f10x.h.
#define CAN_F1R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6544 of file stm32f10x.h.
#define CAN_F1R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6553 of file stm32f10x.h.
#define CAN_F1R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6554 of file stm32f10x.h.
#define CAN_F1R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6555 of file stm32f10x.h.
#define CAN_F1R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6556 of file stm32f10x.h.
#define CAN_F1R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6557 of file stm32f10x.h.
#define CAN_F1R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6558 of file stm32f10x.h.
#define CAN_F1R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6559 of file stm32f10x.h.
#define CAN_F1R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6560 of file stm32f10x.h.
#define CAN_F1R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6561 of file stm32f10x.h.
#define CAN_F1R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6562 of file stm32f10x.h.
#define CAN_F1R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6545 of file stm32f10x.h.
#define CAN_F1R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6563 of file stm32f10x.h.
#define CAN_F1R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6564 of file stm32f10x.h.
#define CAN_F1R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6565 of file stm32f10x.h.
#define CAN_F1R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6566 of file stm32f10x.h.
#define CAN_F1R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6567 of file stm32f10x.h.
#define CAN_F1R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6568 of file stm32f10x.h.
#define CAN_F1R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6569 of file stm32f10x.h.
#define CAN_F1R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6570 of file stm32f10x.h.
#define CAN_F1R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6571 of file stm32f10x.h.
#define CAN_F1R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6572 of file stm32f10x.h.
#define CAN_F1R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6546 of file stm32f10x.h.
#define CAN_F1R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6573 of file stm32f10x.h.
#define CAN_F1R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6574 of file stm32f10x.h.
#define CAN_F1R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6547 of file stm32f10x.h.
#define CAN_F1R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6548 of file stm32f10x.h.
#define CAN_F1R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6549 of file stm32f10x.h.
#define CAN_F1R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6550 of file stm32f10x.h.
#define CAN_F1R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6551 of file stm32f10x.h.
#define CAN_F1R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6552 of file stm32f10x.h.
#define CAN_F1R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7019 of file stm32f10x.h.
#define CAN_F1R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7020 of file stm32f10x.h.
#define CAN_F1R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7029 of file stm32f10x.h.
#define CAN_F1R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7030 of file stm32f10x.h.
#define CAN_F1R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7031 of file stm32f10x.h.
#define CAN_F1R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7032 of file stm32f10x.h.
#define CAN_F1R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7033 of file stm32f10x.h.
#define CAN_F1R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7034 of file stm32f10x.h.
#define CAN_F1R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7035 of file stm32f10x.h.
#define CAN_F1R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7036 of file stm32f10x.h.
#define CAN_F1R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7037 of file stm32f10x.h.
#define CAN_F1R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7038 of file stm32f10x.h.
#define CAN_F1R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7021 of file stm32f10x.h.
#define CAN_F1R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7039 of file stm32f10x.h.
#define CAN_F1R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7040 of file stm32f10x.h.
#define CAN_F1R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7041 of file stm32f10x.h.
#define CAN_F1R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7042 of file stm32f10x.h.
#define CAN_F1R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7043 of file stm32f10x.h.
#define CAN_F1R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7044 of file stm32f10x.h.
#define CAN_F1R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7045 of file stm32f10x.h.
#define CAN_F1R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7046 of file stm32f10x.h.
#define CAN_F1R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7047 of file stm32f10x.h.
#define CAN_F1R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7048 of file stm32f10x.h.
#define CAN_F1R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7022 of file stm32f10x.h.
#define CAN_F1R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7049 of file stm32f10x.h.
#define CAN_F1R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7050 of file stm32f10x.h.
#define CAN_F1R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7023 of file stm32f10x.h.
#define CAN_F1R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7024 of file stm32f10x.h.
#define CAN_F1R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7025 of file stm32f10x.h.
#define CAN_F1R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7026 of file stm32f10x.h.
#define CAN_F1R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7027 of file stm32f10x.h.
#define CAN_F1R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7028 of file stm32f10x.h.
#define CAN_F2R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6577 of file stm32f10x.h.
#define CAN_F2R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6578 of file stm32f10x.h.
#define CAN_F2R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6587 of file stm32f10x.h.
#define CAN_F2R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6588 of file stm32f10x.h.
#define CAN_F2R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6589 of file stm32f10x.h.
#define CAN_F2R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6590 of file stm32f10x.h.
#define CAN_F2R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6591 of file stm32f10x.h.
#define CAN_F2R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6592 of file stm32f10x.h.
#define CAN_F2R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6593 of file stm32f10x.h.
#define CAN_F2R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6594 of file stm32f10x.h.
#define CAN_F2R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6595 of file stm32f10x.h.
#define CAN_F2R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6596 of file stm32f10x.h.
#define CAN_F2R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6579 of file stm32f10x.h.
#define CAN_F2R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6597 of file stm32f10x.h.
#define CAN_F2R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6598 of file stm32f10x.h.
#define CAN_F2R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6599 of file stm32f10x.h.
#define CAN_F2R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6600 of file stm32f10x.h.
#define CAN_F2R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6601 of file stm32f10x.h.
#define CAN_F2R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6602 of file stm32f10x.h.
#define CAN_F2R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6603 of file stm32f10x.h.
#define CAN_F2R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6604 of file stm32f10x.h.
#define CAN_F2R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6605 of file stm32f10x.h.
#define CAN_F2R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6606 of file stm32f10x.h.
#define CAN_F2R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6580 of file stm32f10x.h.
#define CAN_F2R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6607 of file stm32f10x.h.
#define CAN_F2R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6608 of file stm32f10x.h.
#define CAN_F2R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6581 of file stm32f10x.h.
#define CAN_F2R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6582 of file stm32f10x.h.
#define CAN_F2R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6583 of file stm32f10x.h.
#define CAN_F2R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6584 of file stm32f10x.h.
#define CAN_F2R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6585 of file stm32f10x.h.
#define CAN_F2R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6586 of file stm32f10x.h.
#define CAN_F2R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7053 of file stm32f10x.h.
#define CAN_F2R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7054 of file stm32f10x.h.
#define CAN_F2R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7063 of file stm32f10x.h.
#define CAN_F2R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7064 of file stm32f10x.h.
#define CAN_F2R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7065 of file stm32f10x.h.
#define CAN_F2R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7066 of file stm32f10x.h.
#define CAN_F2R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7067 of file stm32f10x.h.
#define CAN_F2R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7068 of file stm32f10x.h.
#define CAN_F2R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7069 of file stm32f10x.h.
#define CAN_F2R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7070 of file stm32f10x.h.
#define CAN_F2R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7071 of file stm32f10x.h.
#define CAN_F2R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7072 of file stm32f10x.h.
#define CAN_F2R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7055 of file stm32f10x.h.
#define CAN_F2R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7073 of file stm32f10x.h.
#define CAN_F2R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7074 of file stm32f10x.h.
#define CAN_F2R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7075 of file stm32f10x.h.
#define CAN_F2R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7076 of file stm32f10x.h.
#define CAN_F2R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7077 of file stm32f10x.h.
#define CAN_F2R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7078 of file stm32f10x.h.
#define CAN_F2R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7079 of file stm32f10x.h.
#define CAN_F2R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7080 of file stm32f10x.h.
#define CAN_F2R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7081 of file stm32f10x.h.
#define CAN_F2R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7082 of file stm32f10x.h.
#define CAN_F2R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7056 of file stm32f10x.h.
#define CAN_F2R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7083 of file stm32f10x.h.
#define CAN_F2R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7084 of file stm32f10x.h.
#define CAN_F2R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7057 of file stm32f10x.h.
#define CAN_F2R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7058 of file stm32f10x.h.
#define CAN_F2R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7059 of file stm32f10x.h.
#define CAN_F2R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7060 of file stm32f10x.h.
#define CAN_F2R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7061 of file stm32f10x.h.
#define CAN_F2R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7062 of file stm32f10x.h.
#define CAN_F3R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6611 of file stm32f10x.h.
#define CAN_F3R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6612 of file stm32f10x.h.
#define CAN_F3R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6621 of file stm32f10x.h.
#define CAN_F3R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6622 of file stm32f10x.h.
#define CAN_F3R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6623 of file stm32f10x.h.
#define CAN_F3R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6624 of file stm32f10x.h.
#define CAN_F3R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6625 of file stm32f10x.h.
#define CAN_F3R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6626 of file stm32f10x.h.
#define CAN_F3R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6627 of file stm32f10x.h.
#define CAN_F3R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6628 of file stm32f10x.h.
#define CAN_F3R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6629 of file stm32f10x.h.
#define CAN_F3R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6630 of file stm32f10x.h.
#define CAN_F3R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6613 of file stm32f10x.h.
#define CAN_F3R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6631 of file stm32f10x.h.
#define CAN_F3R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6632 of file stm32f10x.h.
#define CAN_F3R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6633 of file stm32f10x.h.
#define CAN_F3R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6634 of file stm32f10x.h.
#define CAN_F3R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6635 of file stm32f10x.h.
#define CAN_F3R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6636 of file stm32f10x.h.
#define CAN_F3R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6637 of file stm32f10x.h.
#define CAN_F3R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6638 of file stm32f10x.h.
#define CAN_F3R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6639 of file stm32f10x.h.
#define CAN_F3R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6640 of file stm32f10x.h.
#define CAN_F3R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6614 of file stm32f10x.h.
#define CAN_F3R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6641 of file stm32f10x.h.
#define CAN_F3R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6642 of file stm32f10x.h.
#define CAN_F3R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6615 of file stm32f10x.h.
#define CAN_F3R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6616 of file stm32f10x.h.
#define CAN_F3R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6617 of file stm32f10x.h.
#define CAN_F3R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6618 of file stm32f10x.h.
#define CAN_F3R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6619 of file stm32f10x.h.
#define CAN_F3R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6620 of file stm32f10x.h.
#define CAN_F3R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7087 of file stm32f10x.h.
#define CAN_F3R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7088 of file stm32f10x.h.
#define CAN_F3R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7097 of file stm32f10x.h.
#define CAN_F3R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7098 of file stm32f10x.h.
#define CAN_F3R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7099 of file stm32f10x.h.
#define CAN_F3R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7100 of file stm32f10x.h.
#define CAN_F3R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7101 of file stm32f10x.h.
#define CAN_F3R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7102 of file stm32f10x.h.
#define CAN_F3R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7103 of file stm32f10x.h.
#define CAN_F3R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7104 of file stm32f10x.h.
#define CAN_F3R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7105 of file stm32f10x.h.
#define CAN_F3R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7106 of file stm32f10x.h.
#define CAN_F3R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7089 of file stm32f10x.h.
#define CAN_F3R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7107 of file stm32f10x.h.
#define CAN_F3R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7108 of file stm32f10x.h.
#define CAN_F3R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7109 of file stm32f10x.h.
#define CAN_F3R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7110 of file stm32f10x.h.
#define CAN_F3R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7111 of file stm32f10x.h.
#define CAN_F3R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7112 of file stm32f10x.h.
#define CAN_F3R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7113 of file stm32f10x.h.
#define CAN_F3R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7114 of file stm32f10x.h.
#define CAN_F3R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7115 of file stm32f10x.h.
#define CAN_F3R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7116 of file stm32f10x.h.
#define CAN_F3R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7090 of file stm32f10x.h.
#define CAN_F3R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7117 of file stm32f10x.h.
#define CAN_F3R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7118 of file stm32f10x.h.
#define CAN_F3R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7091 of file stm32f10x.h.
#define CAN_F3R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7092 of file stm32f10x.h.
#define CAN_F3R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7093 of file stm32f10x.h.
#define CAN_F3R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7094 of file stm32f10x.h.
#define CAN_F3R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7095 of file stm32f10x.h.
#define CAN_F3R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7096 of file stm32f10x.h.
#define CAN_F4R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6645 of file stm32f10x.h.
#define CAN_F4R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6646 of file stm32f10x.h.
#define CAN_F4R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6655 of file stm32f10x.h.
#define CAN_F4R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6656 of file stm32f10x.h.
#define CAN_F4R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6657 of file stm32f10x.h.
#define CAN_F4R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6658 of file stm32f10x.h.
#define CAN_F4R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6659 of file stm32f10x.h.
#define CAN_F4R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6660 of file stm32f10x.h.
#define CAN_F4R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6661 of file stm32f10x.h.
#define CAN_F4R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6662 of file stm32f10x.h.
#define CAN_F4R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6663 of file stm32f10x.h.
#define CAN_F4R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6664 of file stm32f10x.h.
#define CAN_F4R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6647 of file stm32f10x.h.
#define CAN_F4R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6665 of file stm32f10x.h.
#define CAN_F4R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6666 of file stm32f10x.h.
#define CAN_F4R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6667 of file stm32f10x.h.
#define CAN_F4R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6668 of file stm32f10x.h.
#define CAN_F4R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6669 of file stm32f10x.h.
#define CAN_F4R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6670 of file stm32f10x.h.
#define CAN_F4R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6671 of file stm32f10x.h.
#define CAN_F4R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6672 of file stm32f10x.h.
#define CAN_F4R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6673 of file stm32f10x.h.
#define CAN_F4R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6674 of file stm32f10x.h.
#define CAN_F4R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6648 of file stm32f10x.h.
#define CAN_F4R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6675 of file stm32f10x.h.
#define CAN_F4R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6676 of file stm32f10x.h.
#define CAN_F4R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6649 of file stm32f10x.h.
#define CAN_F4R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6650 of file stm32f10x.h.
#define CAN_F4R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6651 of file stm32f10x.h.
#define CAN_F4R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6652 of file stm32f10x.h.
#define CAN_F4R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6653 of file stm32f10x.h.
#define CAN_F4R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6654 of file stm32f10x.h.
#define CAN_F4R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7121 of file stm32f10x.h.
#define CAN_F4R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7122 of file stm32f10x.h.
#define CAN_F4R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7131 of file stm32f10x.h.
#define CAN_F4R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7132 of file stm32f10x.h.
#define CAN_F4R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7133 of file stm32f10x.h.
#define CAN_F4R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7134 of file stm32f10x.h.
#define CAN_F4R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7135 of file stm32f10x.h.
#define CAN_F4R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7136 of file stm32f10x.h.
#define CAN_F4R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7137 of file stm32f10x.h.
#define CAN_F4R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7138 of file stm32f10x.h.
#define CAN_F4R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7139 of file stm32f10x.h.
#define CAN_F4R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7140 of file stm32f10x.h.
#define CAN_F4R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7123 of file stm32f10x.h.
#define CAN_F4R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7141 of file stm32f10x.h.
#define CAN_F4R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7142 of file stm32f10x.h.
#define CAN_F4R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7143 of file stm32f10x.h.
#define CAN_F4R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7144 of file stm32f10x.h.
#define CAN_F4R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7145 of file stm32f10x.h.
#define CAN_F4R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7146 of file stm32f10x.h.
#define CAN_F4R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7147 of file stm32f10x.h.
#define CAN_F4R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7148 of file stm32f10x.h.
#define CAN_F4R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7149 of file stm32f10x.h.
#define CAN_F4R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7150 of file stm32f10x.h.
#define CAN_F4R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7124 of file stm32f10x.h.
#define CAN_F4R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7151 of file stm32f10x.h.
#define CAN_F4R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7152 of file stm32f10x.h.
#define CAN_F4R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7125 of file stm32f10x.h.
#define CAN_F4R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7126 of file stm32f10x.h.
#define CAN_F4R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7127 of file stm32f10x.h.
#define CAN_F4R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7128 of file stm32f10x.h.
#define CAN_F4R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7129 of file stm32f10x.h.
#define CAN_F4R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7130 of file stm32f10x.h.
#define CAN_F5R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6679 of file stm32f10x.h.
#define CAN_F5R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6680 of file stm32f10x.h.
#define CAN_F5R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6689 of file stm32f10x.h.
#define CAN_F5R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6690 of file stm32f10x.h.
#define CAN_F5R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6691 of file stm32f10x.h.
#define CAN_F5R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6692 of file stm32f10x.h.
#define CAN_F5R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6693 of file stm32f10x.h.
#define CAN_F5R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6694 of file stm32f10x.h.
#define CAN_F5R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6695 of file stm32f10x.h.
#define CAN_F5R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6696 of file stm32f10x.h.
#define CAN_F5R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6697 of file stm32f10x.h.
#define CAN_F5R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6698 of file stm32f10x.h.
#define CAN_F5R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6681 of file stm32f10x.h.
#define CAN_F5R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6699 of file stm32f10x.h.
#define CAN_F5R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6700 of file stm32f10x.h.
#define CAN_F5R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6701 of file stm32f10x.h.
#define CAN_F5R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6702 of file stm32f10x.h.
#define CAN_F5R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6703 of file stm32f10x.h.
#define CAN_F5R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6704 of file stm32f10x.h.
#define CAN_F5R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6705 of file stm32f10x.h.
#define CAN_F5R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6706 of file stm32f10x.h.
#define CAN_F5R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6707 of file stm32f10x.h.
#define CAN_F5R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6708 of file stm32f10x.h.
#define CAN_F5R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6682 of file stm32f10x.h.
#define CAN_F5R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6709 of file stm32f10x.h.
#define CAN_F5R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6710 of file stm32f10x.h.
#define CAN_F5R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6683 of file stm32f10x.h.
#define CAN_F5R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6684 of file stm32f10x.h.
#define CAN_F5R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6685 of file stm32f10x.h.
#define CAN_F5R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6686 of file stm32f10x.h.
#define CAN_F5R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6687 of file stm32f10x.h.
#define CAN_F5R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6688 of file stm32f10x.h.
#define CAN_F5R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7155 of file stm32f10x.h.
#define CAN_F5R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7156 of file stm32f10x.h.
#define CAN_F5R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7165 of file stm32f10x.h.
#define CAN_F5R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7166 of file stm32f10x.h.
#define CAN_F5R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7167 of file stm32f10x.h.
#define CAN_F5R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7168 of file stm32f10x.h.
#define CAN_F5R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7169 of file stm32f10x.h.
#define CAN_F5R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7170 of file stm32f10x.h.
#define CAN_F5R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7171 of file stm32f10x.h.
#define CAN_F5R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7172 of file stm32f10x.h.
#define CAN_F5R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7173 of file stm32f10x.h.
#define CAN_F5R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7174 of file stm32f10x.h.
#define CAN_F5R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7157 of file stm32f10x.h.
#define CAN_F5R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7175 of file stm32f10x.h.
#define CAN_F5R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7176 of file stm32f10x.h.
#define CAN_F5R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7177 of file stm32f10x.h.
#define CAN_F5R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7178 of file stm32f10x.h.
#define CAN_F5R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7179 of file stm32f10x.h.
#define CAN_F5R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7180 of file stm32f10x.h.
#define CAN_F5R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7181 of file stm32f10x.h.
#define CAN_F5R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7182 of file stm32f10x.h.
#define CAN_F5R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7183 of file stm32f10x.h.
#define CAN_F5R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7184 of file stm32f10x.h.
#define CAN_F5R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7158 of file stm32f10x.h.
#define CAN_F5R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7185 of file stm32f10x.h.
#define CAN_F5R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7186 of file stm32f10x.h.
#define CAN_F5R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7159 of file stm32f10x.h.
#define CAN_F5R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7160 of file stm32f10x.h.
#define CAN_F5R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7161 of file stm32f10x.h.
#define CAN_F5R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7162 of file stm32f10x.h.
#define CAN_F5R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7163 of file stm32f10x.h.
#define CAN_F5R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7164 of file stm32f10x.h.
#define CAN_F6R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6713 of file stm32f10x.h.
#define CAN_F6R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6714 of file stm32f10x.h.
#define CAN_F6R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6723 of file stm32f10x.h.
#define CAN_F6R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6724 of file stm32f10x.h.
#define CAN_F6R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6725 of file stm32f10x.h.
#define CAN_F6R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6726 of file stm32f10x.h.
#define CAN_F6R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6727 of file stm32f10x.h.
#define CAN_F6R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6728 of file stm32f10x.h.
#define CAN_F6R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6729 of file stm32f10x.h.
#define CAN_F6R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6730 of file stm32f10x.h.
#define CAN_F6R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6731 of file stm32f10x.h.
#define CAN_F6R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6732 of file stm32f10x.h.
#define CAN_F6R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6715 of file stm32f10x.h.
#define CAN_F6R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6733 of file stm32f10x.h.
#define CAN_F6R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6734 of file stm32f10x.h.
#define CAN_F6R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6735 of file stm32f10x.h.
#define CAN_F6R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6736 of file stm32f10x.h.
#define CAN_F6R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6737 of file stm32f10x.h.
#define CAN_F6R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6738 of file stm32f10x.h.
#define CAN_F6R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6739 of file stm32f10x.h.
#define CAN_F6R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6740 of file stm32f10x.h.
#define CAN_F6R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6741 of file stm32f10x.h.
#define CAN_F6R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6742 of file stm32f10x.h.
#define CAN_F6R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6716 of file stm32f10x.h.
#define CAN_F6R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6743 of file stm32f10x.h.
#define CAN_F6R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6744 of file stm32f10x.h.
#define CAN_F6R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6717 of file stm32f10x.h.
#define CAN_F6R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6718 of file stm32f10x.h.
#define CAN_F6R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6719 of file stm32f10x.h.
#define CAN_F6R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6720 of file stm32f10x.h.
#define CAN_F6R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6721 of file stm32f10x.h.
#define CAN_F6R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6722 of file stm32f10x.h.
#define CAN_F6R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7189 of file stm32f10x.h.
#define CAN_F6R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7190 of file stm32f10x.h.
#define CAN_F6R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7199 of file stm32f10x.h.
#define CAN_F6R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7200 of file stm32f10x.h.
#define CAN_F6R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7201 of file stm32f10x.h.
#define CAN_F6R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7202 of file stm32f10x.h.
#define CAN_F6R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7203 of file stm32f10x.h.
#define CAN_F6R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7204 of file stm32f10x.h.
#define CAN_F6R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7205 of file stm32f10x.h.
#define CAN_F6R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7206 of file stm32f10x.h.
#define CAN_F6R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7207 of file stm32f10x.h.
#define CAN_F6R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7208 of file stm32f10x.h.
#define CAN_F6R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7191 of file stm32f10x.h.
#define CAN_F6R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7209 of file stm32f10x.h.
#define CAN_F6R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7210 of file stm32f10x.h.
#define CAN_F6R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7211 of file stm32f10x.h.
#define CAN_F6R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7212 of file stm32f10x.h.
#define CAN_F6R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7213 of file stm32f10x.h.
#define CAN_F6R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7214 of file stm32f10x.h.
#define CAN_F6R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7215 of file stm32f10x.h.
#define CAN_F6R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7216 of file stm32f10x.h.
#define CAN_F6R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7217 of file stm32f10x.h.
#define CAN_F6R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7218 of file stm32f10x.h.
#define CAN_F6R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7192 of file stm32f10x.h.
#define CAN_F6R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7219 of file stm32f10x.h.
#define CAN_F6R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7220 of file stm32f10x.h.
#define CAN_F6R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7193 of file stm32f10x.h.
#define CAN_F6R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7194 of file stm32f10x.h.
#define CAN_F6R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7195 of file stm32f10x.h.
#define CAN_F6R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7196 of file stm32f10x.h.
#define CAN_F6R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7197 of file stm32f10x.h.
#define CAN_F6R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7198 of file stm32f10x.h.
#define CAN_F7R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6747 of file stm32f10x.h.
#define CAN_F7R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6748 of file stm32f10x.h.
#define CAN_F7R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6757 of file stm32f10x.h.
#define CAN_F7R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6758 of file stm32f10x.h.
#define CAN_F7R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6759 of file stm32f10x.h.
#define CAN_F7R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6760 of file stm32f10x.h.
#define CAN_F7R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6761 of file stm32f10x.h.
#define CAN_F7R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6762 of file stm32f10x.h.
#define CAN_F7R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6763 of file stm32f10x.h.
#define CAN_F7R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6764 of file stm32f10x.h.
#define CAN_F7R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6765 of file stm32f10x.h.
#define CAN_F7R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6766 of file stm32f10x.h.
#define CAN_F7R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6749 of file stm32f10x.h.
#define CAN_F7R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6767 of file stm32f10x.h.
#define CAN_F7R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6768 of file stm32f10x.h.
#define CAN_F7R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6769 of file stm32f10x.h.
#define CAN_F7R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6770 of file stm32f10x.h.
#define CAN_F7R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6771 of file stm32f10x.h.
#define CAN_F7R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6772 of file stm32f10x.h.
#define CAN_F7R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6773 of file stm32f10x.h.
#define CAN_F7R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6774 of file stm32f10x.h.
#define CAN_F7R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6775 of file stm32f10x.h.
#define CAN_F7R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6776 of file stm32f10x.h.
#define CAN_F7R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6750 of file stm32f10x.h.
#define CAN_F7R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6777 of file stm32f10x.h.
#define CAN_F7R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6778 of file stm32f10x.h.
#define CAN_F7R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6751 of file stm32f10x.h.
#define CAN_F7R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6752 of file stm32f10x.h.
#define CAN_F7R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6753 of file stm32f10x.h.
#define CAN_F7R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6754 of file stm32f10x.h.
#define CAN_F7R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6755 of file stm32f10x.h.
#define CAN_F7R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6756 of file stm32f10x.h.
#define CAN_F7R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7223 of file stm32f10x.h.
#define CAN_F7R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7224 of file stm32f10x.h.
#define CAN_F7R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7233 of file stm32f10x.h.
#define CAN_F7R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7234 of file stm32f10x.h.
#define CAN_F7R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7235 of file stm32f10x.h.
#define CAN_F7R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7236 of file stm32f10x.h.
#define CAN_F7R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7237 of file stm32f10x.h.
#define CAN_F7R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7238 of file stm32f10x.h.
#define CAN_F7R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7239 of file stm32f10x.h.
#define CAN_F7R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7240 of file stm32f10x.h.
#define CAN_F7R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7241 of file stm32f10x.h.
#define CAN_F7R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7242 of file stm32f10x.h.
#define CAN_F7R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7225 of file stm32f10x.h.
#define CAN_F7R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7243 of file stm32f10x.h.
#define CAN_F7R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7244 of file stm32f10x.h.
#define CAN_F7R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7245 of file stm32f10x.h.
#define CAN_F7R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7246 of file stm32f10x.h.
#define CAN_F7R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7247 of file stm32f10x.h.
#define CAN_F7R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7248 of file stm32f10x.h.
#define CAN_F7R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7249 of file stm32f10x.h.
#define CAN_F7R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7250 of file stm32f10x.h.
#define CAN_F7R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7251 of file stm32f10x.h.
#define CAN_F7R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7252 of file stm32f10x.h.
#define CAN_F7R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7226 of file stm32f10x.h.
#define CAN_F7R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7253 of file stm32f10x.h.
#define CAN_F7R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7254 of file stm32f10x.h.
#define CAN_F7R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7227 of file stm32f10x.h.
#define CAN_F7R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7228 of file stm32f10x.h.
#define CAN_F7R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7229 of file stm32f10x.h.
#define CAN_F7R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7230 of file stm32f10x.h.
#define CAN_F7R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7231 of file stm32f10x.h.
#define CAN_F7R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7232 of file stm32f10x.h.
#define CAN_F8R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6781 of file stm32f10x.h.
#define CAN_F8R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6782 of file stm32f10x.h.
#define CAN_F8R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6791 of file stm32f10x.h.
#define CAN_F8R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6792 of file stm32f10x.h.
#define CAN_F8R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6793 of file stm32f10x.h.
#define CAN_F8R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6794 of file stm32f10x.h.
#define CAN_F8R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6795 of file stm32f10x.h.
#define CAN_F8R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6796 of file stm32f10x.h.
#define CAN_F8R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6797 of file stm32f10x.h.
#define CAN_F8R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6798 of file stm32f10x.h.
#define CAN_F8R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6799 of file stm32f10x.h.
#define CAN_F8R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6800 of file stm32f10x.h.
#define CAN_F8R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6783 of file stm32f10x.h.
#define CAN_F8R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6801 of file stm32f10x.h.
#define CAN_F8R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6802 of file stm32f10x.h.
#define CAN_F8R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6803 of file stm32f10x.h.
#define CAN_F8R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6804 of file stm32f10x.h.
#define CAN_F8R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6805 of file stm32f10x.h.
#define CAN_F8R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6806 of file stm32f10x.h.
#define CAN_F8R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6807 of file stm32f10x.h.
#define CAN_F8R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6808 of file stm32f10x.h.
#define CAN_F8R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6809 of file stm32f10x.h.
#define CAN_F8R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6810 of file stm32f10x.h.
#define CAN_F8R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6784 of file stm32f10x.h.
#define CAN_F8R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6811 of file stm32f10x.h.
#define CAN_F8R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6812 of file stm32f10x.h.
#define CAN_F8R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6785 of file stm32f10x.h.
#define CAN_F8R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6786 of file stm32f10x.h.
#define CAN_F8R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6787 of file stm32f10x.h.
#define CAN_F8R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6788 of file stm32f10x.h.
#define CAN_F8R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6789 of file stm32f10x.h.
#define CAN_F8R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6790 of file stm32f10x.h.
#define CAN_F8R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7257 of file stm32f10x.h.
#define CAN_F8R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7258 of file stm32f10x.h.
#define CAN_F8R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7267 of file stm32f10x.h.
#define CAN_F8R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7268 of file stm32f10x.h.
#define CAN_F8R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7269 of file stm32f10x.h.
#define CAN_F8R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7270 of file stm32f10x.h.
#define CAN_F8R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7271 of file stm32f10x.h.
#define CAN_F8R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7272 of file stm32f10x.h.
#define CAN_F8R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7273 of file stm32f10x.h.
#define CAN_F8R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7274 of file stm32f10x.h.
#define CAN_F8R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7275 of file stm32f10x.h.
#define CAN_F8R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7276 of file stm32f10x.h.
#define CAN_F8R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7259 of file stm32f10x.h.
#define CAN_F8R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7277 of file stm32f10x.h.
#define CAN_F8R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7278 of file stm32f10x.h.
#define CAN_F8R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7279 of file stm32f10x.h.
#define CAN_F8R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7280 of file stm32f10x.h.
#define CAN_F8R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7281 of file stm32f10x.h.
#define CAN_F8R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7282 of file stm32f10x.h.
#define CAN_F8R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7283 of file stm32f10x.h.
#define CAN_F8R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7284 of file stm32f10x.h.
#define CAN_F8R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7285 of file stm32f10x.h.
#define CAN_F8R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7286 of file stm32f10x.h.
#define CAN_F8R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7260 of file stm32f10x.h.
#define CAN_F8R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7287 of file stm32f10x.h.
#define CAN_F8R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7288 of file stm32f10x.h.
#define CAN_F8R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7261 of file stm32f10x.h.
#define CAN_F8R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7262 of file stm32f10x.h.
#define CAN_F8R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7263 of file stm32f10x.h.
#define CAN_F8R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7264 of file stm32f10x.h.
#define CAN_F8R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7265 of file stm32f10x.h.
#define CAN_F8R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7266 of file stm32f10x.h.
#define CAN_F9R1_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 6815 of file stm32f10x.h.
#define CAN_F9R1_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 6816 of file stm32f10x.h.
#define CAN_F9R1_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 6825 of file stm32f10x.h.
#define CAN_F9R1_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 6826 of file stm32f10x.h.
#define CAN_F9R1_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 6827 of file stm32f10x.h.
#define CAN_F9R1_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 6828 of file stm32f10x.h.
#define CAN_F9R1_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 6829 of file stm32f10x.h.
#define CAN_F9R1_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 6830 of file stm32f10x.h.
#define CAN_F9R1_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 6831 of file stm32f10x.h.
#define CAN_F9R1_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 6832 of file stm32f10x.h.
#define CAN_F9R1_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 6833 of file stm32f10x.h.
#define CAN_F9R1_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 6834 of file stm32f10x.h.
#define CAN_F9R1_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 6817 of file stm32f10x.h.
#define CAN_F9R1_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 6835 of file stm32f10x.h.
#define CAN_F9R1_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 6836 of file stm32f10x.h.
#define CAN_F9R1_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 6837 of file stm32f10x.h.
#define CAN_F9R1_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 6838 of file stm32f10x.h.
#define CAN_F9R1_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 6839 of file stm32f10x.h.
#define CAN_F9R1_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 6840 of file stm32f10x.h.
#define CAN_F9R1_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 6841 of file stm32f10x.h.
#define CAN_F9R1_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 6842 of file stm32f10x.h.
#define CAN_F9R1_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 6843 of file stm32f10x.h.
#define CAN_F9R1_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 6844 of file stm32f10x.h.
#define CAN_F9R1_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 6818 of file stm32f10x.h.
#define CAN_F9R1_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 6845 of file stm32f10x.h.
#define CAN_F9R1_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 6846 of file stm32f10x.h.
#define CAN_F9R1_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 6819 of file stm32f10x.h.
#define CAN_F9R1_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 6820 of file stm32f10x.h.
#define CAN_F9R1_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 6821 of file stm32f10x.h.
#define CAN_F9R1_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 6822 of file stm32f10x.h.
#define CAN_F9R1_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 6823 of file stm32f10x.h.
#define CAN_F9R1_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 6824 of file stm32f10x.h.
#define CAN_F9R2_FB0 ((uint32_t)0x00000001) |
Filter bit 0
Definition at line 7291 of file stm32f10x.h.
#define CAN_F9R2_FB1 ((uint32_t)0x00000002) |
Filter bit 1
Definition at line 7292 of file stm32f10x.h.
#define CAN_F9R2_FB10 ((uint32_t)0x00000400) |
Filter bit 10
Definition at line 7301 of file stm32f10x.h.
#define CAN_F9R2_FB11 ((uint32_t)0x00000800) |
Filter bit 11
Definition at line 7302 of file stm32f10x.h.
#define CAN_F9R2_FB12 ((uint32_t)0x00001000) |
Filter bit 12
Definition at line 7303 of file stm32f10x.h.
#define CAN_F9R2_FB13 ((uint32_t)0x00002000) |
Filter bit 13
Definition at line 7304 of file stm32f10x.h.
#define CAN_F9R2_FB14 ((uint32_t)0x00004000) |
Filter bit 14
Definition at line 7305 of file stm32f10x.h.
#define CAN_F9R2_FB15 ((uint32_t)0x00008000) |
Filter bit 15
Definition at line 7306 of file stm32f10x.h.
#define CAN_F9R2_FB16 ((uint32_t)0x00010000) |
Filter bit 16
Definition at line 7307 of file stm32f10x.h.
#define CAN_F9R2_FB17 ((uint32_t)0x00020000) |
Filter bit 17
Definition at line 7308 of file stm32f10x.h.
#define CAN_F9R2_FB18 ((uint32_t)0x00040000) |
Filter bit 18
Definition at line 7309 of file stm32f10x.h.
#define CAN_F9R2_FB19 ((uint32_t)0x00080000) |
Filter bit 19
Definition at line 7310 of file stm32f10x.h.
#define CAN_F9R2_FB2 ((uint32_t)0x00000004) |
Filter bit 2
Definition at line 7293 of file stm32f10x.h.
#define CAN_F9R2_FB20 ((uint32_t)0x00100000) |
Filter bit 20
Definition at line 7311 of file stm32f10x.h.
#define CAN_F9R2_FB21 ((uint32_t)0x00200000) |
Filter bit 21
Definition at line 7312 of file stm32f10x.h.
#define CAN_F9R2_FB22 ((uint32_t)0x00400000) |
Filter bit 22
Definition at line 7313 of file stm32f10x.h.
#define CAN_F9R2_FB23 ((uint32_t)0x00800000) |
Filter bit 23
Definition at line 7314 of file stm32f10x.h.
#define CAN_F9R2_FB24 ((uint32_t)0x01000000) |
Filter bit 24
Definition at line 7315 of file stm32f10x.h.
#define CAN_F9R2_FB25 ((uint32_t)0x02000000) |
Filter bit 25
Definition at line 7316 of file stm32f10x.h.
#define CAN_F9R2_FB26 ((uint32_t)0x04000000) |
Filter bit 26
Definition at line 7317 of file stm32f10x.h.
#define CAN_F9R2_FB27 ((uint32_t)0x08000000) |
Filter bit 27
Definition at line 7318 of file stm32f10x.h.
#define CAN_F9R2_FB28 ((uint32_t)0x10000000) |
Filter bit 28
Definition at line 7319 of file stm32f10x.h.
#define CAN_F9R2_FB29 ((uint32_t)0x20000000) |
Filter bit 29
Definition at line 7320 of file stm32f10x.h.
#define CAN_F9R2_FB3 ((uint32_t)0x00000008) |
Filter bit 3
Definition at line 7294 of file stm32f10x.h.
#define CAN_F9R2_FB30 ((uint32_t)0x40000000) |
Filter bit 30
Definition at line 7321 of file stm32f10x.h.
#define CAN_F9R2_FB31 ((uint32_t)0x80000000) |
Filter bit 31
Definition at line 7322 of file stm32f10x.h.
#define CAN_F9R2_FB4 ((uint32_t)0x00000010) |
Filter bit 4
Definition at line 7295 of file stm32f10x.h.
#define CAN_F9R2_FB5 ((uint32_t)0x00000020) |
Filter bit 5
Definition at line 7296 of file stm32f10x.h.
#define CAN_F9R2_FB6 ((uint32_t)0x00000040) |
Filter bit 6
Definition at line 7297 of file stm32f10x.h.
#define CAN_F9R2_FB7 ((uint32_t)0x00000080) |
Filter bit 7
Definition at line 7298 of file stm32f10x.h.
#define CAN_F9R2_FB8 ((uint32_t)0x00000100) |
Filter bit 8
Definition at line 7299 of file stm32f10x.h.
#define CAN_F9R2_FB9 ((uint32_t)0x00000200) |
Filter bit 9
Definition at line 7300 of file stm32f10x.h.
#define CAN_FA1R_FACT ((uint16_t)0x3FFF) |
Filter Active
Definition at line 6492 of file stm32f10x.h.
#define CAN_FA1R_FACT0 ((uint16_t)0x0001) |
Filter 0 Active
Definition at line 6493 of file stm32f10x.h.
#define CAN_FA1R_FACT1 ((uint16_t)0x0002) |
Filter 1 Active
Definition at line 6494 of file stm32f10x.h.
#define CAN_FA1R_FACT10 ((uint16_t)0x0400) |
Filter 10 Active
Definition at line 6503 of file stm32f10x.h.
#define CAN_FA1R_FACT11 ((uint16_t)0x0800) |
Filter 11 Active
Definition at line 6504 of file stm32f10x.h.
#define CAN_FA1R_FACT12 ((uint16_t)0x1000) |
Filter 12 Active
Definition at line 6505 of file stm32f10x.h.
#define CAN_FA1R_FACT13 ((uint16_t)0x2000) |
Filter 13 Active
Definition at line 6506 of file stm32f10x.h.
#define CAN_FA1R_FACT2 ((uint16_t)0x0004) |
Filter 2 Active
Definition at line 6495 of file stm32f10x.h.
#define CAN_FA1R_FACT3 ((uint16_t)0x0008) |
Filter 3 Active
Definition at line 6496 of file stm32f10x.h.
#define CAN_FA1R_FACT4 ((uint16_t)0x0010) |
Filter 4 Active
Definition at line 6497 of file stm32f10x.h.
#define CAN_FA1R_FACT5 ((uint16_t)0x0020) |
Filter 5 Active
Definition at line 6498 of file stm32f10x.h.
#define CAN_FA1R_FACT6 ((uint16_t)0x0040) |
Filter 6 Active
Definition at line 6499 of file stm32f10x.h.
#define CAN_FA1R_FACT7 ((uint16_t)0x0080) |
Filter 7 Active
Definition at line 6500 of file stm32f10x.h.
#define CAN_FA1R_FACT8 ((uint16_t)0x0100) |
Filter 8 Active
Definition at line 6501 of file stm32f10x.h.
#define CAN_FA1R_FACT9 ((uint16_t)0x0200) |
Filter 9 Active
Definition at line 6502 of file stm32f10x.h.
#define CAN_FFA1R_FFA ((uint16_t)0x3FFF) |
Filter FIFO Assignment
Definition at line 6475 of file stm32f10x.h.
#define CAN_FFA1R_FFA0 ((uint16_t)0x0001) |
Filter FIFO Assignment for Filter 0
Definition at line 6476 of file stm32f10x.h.
#define CAN_FFA1R_FFA1 ((uint16_t)0x0002) |
Filter FIFO Assignment for Filter 1
Definition at line 6477 of file stm32f10x.h.
#define CAN_FFA1R_FFA10 ((uint16_t)0x0400) |
Filter FIFO Assignment for Filter 10
Definition at line 6486 of file stm32f10x.h.
#define CAN_FFA1R_FFA11 ((uint16_t)0x0800) |
Filter FIFO Assignment for Filter 11
Definition at line 6487 of file stm32f10x.h.
#define CAN_FFA1R_FFA12 ((uint16_t)0x1000) |
Filter FIFO Assignment for Filter 12
Definition at line 6488 of file stm32f10x.h.
#define CAN_FFA1R_FFA13 ((uint16_t)0x2000) |
Filter FIFO Assignment for Filter 13
Definition at line 6489 of file stm32f10x.h.
#define CAN_FFA1R_FFA2 ((uint16_t)0x0004) |
Filter FIFO Assignment for Filter 2
Definition at line 6478 of file stm32f10x.h.
#define CAN_FFA1R_FFA3 ((uint16_t)0x0008) |
Filter FIFO Assignment for Filter 3
Definition at line 6479 of file stm32f10x.h.
#define CAN_FFA1R_FFA4 ((uint16_t)0x0010) |
Filter FIFO Assignment for Filter 4
Definition at line 6480 of file stm32f10x.h.
#define CAN_FFA1R_FFA5 ((uint16_t)0x0020) |
Filter FIFO Assignment for Filter 5
Definition at line 6481 of file stm32f10x.h.
#define CAN_FFA1R_FFA6 ((uint16_t)0x0040) |
Filter FIFO Assignment for Filter 6
Definition at line 6482 of file stm32f10x.h.
#define CAN_FFA1R_FFA7 ((uint16_t)0x0080) |
Filter FIFO Assignment for Filter 7
Definition at line 6483 of file stm32f10x.h.
#define CAN_FFA1R_FFA8 ((uint16_t)0x0100) |
Filter FIFO Assignment for Filter 8
Definition at line 6484 of file stm32f10x.h.
#define CAN_FFA1R_FFA9 ((uint16_t)0x0200) |
Filter FIFO Assignment for Filter 9
Definition at line 6485 of file stm32f10x.h.
#define CAN_FM1R_FBM ((uint16_t)0x3FFF) |
Filter Mode
Definition at line 6441 of file stm32f10x.h.
#define CAN_FM1R_FBM0 ((uint16_t)0x0001) |
Filter Init Mode bit 0
Definition at line 6442 of file stm32f10x.h.
#define CAN_FM1R_FBM1 ((uint16_t)0x0002) |
Filter Init Mode bit 1
Definition at line 6443 of file stm32f10x.h.
#define CAN_FM1R_FBM10 ((uint16_t)0x0400) |
Filter Init Mode bit 10
Definition at line 6452 of file stm32f10x.h.
#define CAN_FM1R_FBM11 ((uint16_t)0x0800) |
Filter Init Mode bit 11
Definition at line 6453 of file stm32f10x.h.
#define CAN_FM1R_FBM12 ((uint16_t)0x1000) |
Filter Init Mode bit 12
Definition at line 6454 of file stm32f10x.h.
#define CAN_FM1R_FBM13 ((uint16_t)0x2000) |
Filter Init Mode bit 13
Definition at line 6455 of file stm32f10x.h.
#define CAN_FM1R_FBM2 ((uint16_t)0x0004) |
Filter Init Mode bit 2
Definition at line 6444 of file stm32f10x.h.
#define CAN_FM1R_FBM3 ((uint16_t)0x0008) |
Filter Init Mode bit 3
Definition at line 6445 of file stm32f10x.h.
#define CAN_FM1R_FBM4 ((uint16_t)0x0010) |
Filter Init Mode bit 4
Definition at line 6446 of file stm32f10x.h.
#define CAN_FM1R_FBM5 ((uint16_t)0x0020) |
Filter Init Mode bit 5
Definition at line 6447 of file stm32f10x.h.
#define CAN_FM1R_FBM6 ((uint16_t)0x0040) |
Filter Init Mode bit 6
Definition at line 6448 of file stm32f10x.h.
#define CAN_FM1R_FBM7 ((uint16_t)0x0080) |
Filter Init Mode bit 7
Definition at line 6449 of file stm32f10x.h.
#define CAN_FM1R_FBM8 ((uint16_t)0x0100) |
Filter Init Mode bit 8
Definition at line 6450 of file stm32f10x.h.
#define CAN_FM1R_FBM9 ((uint16_t)0x0200) |
Filter Init Mode bit 9
Definition at line 6451 of file stm32f10x.h.
#define CAN_FMR_FINIT ((uint8_t)0x01) |
Filter Init Mode
Definition at line 6438 of file stm32f10x.h.
#define CAN_FS1R_FSC ((uint16_t)0x3FFF) |
Filter Scale Configuration
Definition at line 6458 of file stm32f10x.h.
#define CAN_FS1R_FSC0 ((uint16_t)0x0001) |
Filter Scale Configuration bit 0
Definition at line 6459 of file stm32f10x.h.
#define CAN_FS1R_FSC1 ((uint16_t)0x0002) |
Filter Scale Configuration bit 1
Definition at line 6460 of file stm32f10x.h.
#define CAN_FS1R_FSC10 ((uint16_t)0x0400) |
Filter Scale Configuration bit 10
Definition at line 6469 of file stm32f10x.h.
#define CAN_FS1R_FSC11 ((uint16_t)0x0800) |
Filter Scale Configuration bit 11
Definition at line 6470 of file stm32f10x.h.
#define CAN_FS1R_FSC12 ((uint16_t)0x1000) |
Filter Scale Configuration bit 12
Definition at line 6471 of file stm32f10x.h.
#define CAN_FS1R_FSC13 ((uint16_t)0x2000) |
Filter Scale Configuration bit 13
Definition at line 6472 of file stm32f10x.h.
#define CAN_FS1R_FSC2 ((uint16_t)0x0004) |
Filter Scale Configuration bit 2
Definition at line 6461 of file stm32f10x.h.
#define CAN_FS1R_FSC3 ((uint16_t)0x0008) |
Filter Scale Configuration bit 3
Definition at line 6462 of file stm32f10x.h.
#define CAN_FS1R_FSC4 ((uint16_t)0x0010) |
Filter Scale Configuration bit 4
Definition at line 6463 of file stm32f10x.h.
#define CAN_FS1R_FSC5 ((uint16_t)0x0020) |
Filter Scale Configuration bit 5
Definition at line 6464 of file stm32f10x.h.
#define CAN_FS1R_FSC6 ((uint16_t)0x0040) |
Filter Scale Configuration bit 6
Definition at line 6465 of file stm32f10x.h.
#define CAN_FS1R_FSC7 ((uint16_t)0x0080) |
Filter Scale Configuration bit 7
Definition at line 6466 of file stm32f10x.h.
#define CAN_FS1R_FSC8 ((uint16_t)0x0100) |
Filter Scale Configuration bit 8
Definition at line 6467 of file stm32f10x.h.
#define CAN_FS1R_FSC9 ((uint16_t)0x0200) |
Filter Scale Configuration bit 9
Definition at line 6468 of file stm32f10x.h.
#define CAN_IER_BOFIE ((uint32_t)0x00000400) |
Bus-Off Interrupt Enable
Definition at line 6290 of file stm32f10x.h.
#define CAN_IER_EPVIE ((uint32_t)0x00000200) |
Error Passive Interrupt Enable
Definition at line 6289 of file stm32f10x.h.
#define CAN_IER_ERRIE ((uint32_t)0x00008000) |
Error Interrupt Enable
Definition at line 6292 of file stm32f10x.h.
#define CAN_IER_EWGIE ((uint32_t)0x00000100) |
Error Warning Interrupt Enable
Definition at line 6288 of file stm32f10x.h.
#define CAN_IER_FFIE0 ((uint32_t)0x00000004) |
FIFO Full Interrupt Enable
Definition at line 6283 of file stm32f10x.h.
#define CAN_IER_FFIE1 ((uint32_t)0x00000020) |
FIFO Full Interrupt Enable
Definition at line 6286 of file stm32f10x.h.
#define CAN_IER_FMPIE0 ((uint32_t)0x00000002) |
FIFO Message Pending Interrupt Enable
Definition at line 6282 of file stm32f10x.h.
#define CAN_IER_FMPIE1 ((uint32_t)0x00000010) |
FIFO Message Pending Interrupt Enable
Definition at line 6285 of file stm32f10x.h.
#define CAN_IER_FOVIE0 ((uint32_t)0x00000008) |
FIFO Overrun Interrupt Enable
Definition at line 6284 of file stm32f10x.h.
#define CAN_IER_FOVIE1 ((uint32_t)0x00000040) |
FIFO Overrun Interrupt Enable
Definition at line 6287 of file stm32f10x.h.
#define CAN_IER_LECIE ((uint32_t)0x00000800) |
Last Error Code Interrupt Enable
Definition at line 6291 of file stm32f10x.h.
#define CAN_IER_SLKIE ((uint32_t)0x00020000) |
Sleep Interrupt Enable
Definition at line 6294 of file stm32f10x.h.
#define CAN_IER_TMEIE ((uint32_t)0x00000001) |
Transmit Mailbox Empty Interrupt Enable
Definition at line 6281 of file stm32f10x.h.
#define CAN_IER_WKUIE ((uint32_t)0x00010000) |
Wakeup Interrupt Enable
Definition at line 6293 of file stm32f10x.h.
#define CAN_MCR_ABOM ((uint16_t)0x0040) |
Automatic Bus-Off Management
Definition at line 6225 of file stm32f10x.h.
#define CAN_MCR_AWUM ((uint16_t)0x0020) |
Automatic Wakeup Mode
Definition at line 6224 of file stm32f10x.h.
#define CAN_MCR_INRQ ((uint16_t)0x0001) |
< CAN control and status registers Initialization Request
Definition at line 6219 of file stm32f10x.h.
#define CAN_MCR_NART ((uint16_t)0x0010) |
No Automatic Retransmission
Definition at line 6223 of file stm32f10x.h.
#define CAN_MCR_RESET ((uint16_t)0x8000) |
CAN software master reset
Definition at line 6227 of file stm32f10x.h.
#define CAN_MCR_RFLM ((uint16_t)0x0008) |
Receive FIFO Locked Mode
Definition at line 6222 of file stm32f10x.h.
#define CAN_MCR_SLEEP ((uint16_t)0x0002) |
Sleep Mode Request
Definition at line 6220 of file stm32f10x.h.
#define CAN_MCR_TTCM ((uint16_t)0x0080) |
Time Triggered Communication Mode
Definition at line 6226 of file stm32f10x.h.
#define CAN_MCR_TXFP ((uint16_t)0x0004) |
Transmit FIFO Priority
Definition at line 6221 of file stm32f10x.h.
#define CAN_MSR_ERRI ((uint16_t)0x0004) |
Error Interrupt
Definition at line 6232 of file stm32f10x.h.
#define CAN_MSR_INAK ((uint16_t)0x0001) |
Initialization Acknowledge
Definition at line 6230 of file stm32f10x.h.
#define CAN_MSR_RX ((uint16_t)0x0800) |
CAN Rx Signal
Definition at line 6238 of file stm32f10x.h.
#define CAN_MSR_RXM ((uint16_t)0x0200) |
Receive Mode
Definition at line 6236 of file stm32f10x.h.
#define CAN_MSR_SAMP ((uint16_t)0x0400) |
Last Sample Point
Definition at line 6237 of file stm32f10x.h.
#define CAN_MSR_SLAK ((uint16_t)0x0002) |
Sleep Acknowledge
Definition at line 6231 of file stm32f10x.h.
#define CAN_MSR_SLAKI ((uint16_t)0x0010) |
Sleep Acknowledge Interrupt
Definition at line 6234 of file stm32f10x.h.
#define CAN_MSR_TXM ((uint16_t)0x0100) |
Transmit Mode
Definition at line 6235 of file stm32f10x.h.
#define CAN_MSR_WKUI ((uint16_t)0x0008) |
Wakeup Interrupt
Definition at line 6233 of file stm32f10x.h.
#define CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) |
Data byte 4
Definition at line 6408 of file stm32f10x.h.
#define CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) |
Data byte 5
Definition at line 6409 of file stm32f10x.h.
#define CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) |
Data byte 6
Definition at line 6410 of file stm32f10x.h.
#define CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) |
Data byte 7
Definition at line 6411 of file stm32f10x.h.
#define CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) |
Data byte 4
Definition at line 6431 of file stm32f10x.h.
#define CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) |
Data byte 5
Definition at line 6432 of file stm32f10x.h.
#define CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) |
Data byte 6
Definition at line 6433 of file stm32f10x.h.
#define CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) |
Data byte 7 CAN filter registers
Definition at line 6434 of file stm32f10x.h.
#define CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) |
Data byte 0
Definition at line 6402 of file stm32f10x.h.
#define CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) |
Data byte 1
Definition at line 6403 of file stm32f10x.h.
#define CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) |
Data byte 2
Definition at line 6404 of file stm32f10x.h.
#define CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) |
Data byte 3
Definition at line 6405 of file stm32f10x.h.
#define CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) |
Data byte 0
Definition at line 6425 of file stm32f10x.h.
#define CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) |
Data byte 1
Definition at line 6426 of file stm32f10x.h.
#define CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) |
Data byte 2
Definition at line 6427 of file stm32f10x.h.
#define CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) |
Data byte 3
Definition at line 6428 of file stm32f10x.h.
#define CAN_RDT0R_DLC ((uint32_t)0x0000000F) |
Data Length Code
Definition at line 6397 of file stm32f10x.h.
#define CAN_RDT0R_FMI ((uint32_t)0x0000FF00) |
Filter Match Index
Definition at line 6398 of file stm32f10x.h.
#define CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) |
Message Time Stamp
Definition at line 6399 of file stm32f10x.h.
#define CAN_RDT1R_DLC ((uint32_t)0x0000000F) |
Data Length Code
Definition at line 6420 of file stm32f10x.h.
#define CAN_RDT1R_FMI ((uint32_t)0x0000FF00) |
Filter Match Index
Definition at line 6421 of file stm32f10x.h.
#define CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) |
Message Time Stamp
Definition at line 6422 of file stm32f10x.h.
#define CAN_RF0R_FMP0 ((uint8_t)0x03) |
FIFO 0 Message Pending
Definition at line 6269 of file stm32f10x.h.
#define CAN_RF0R_FOVR0 ((uint8_t)0x10) |
FIFO 0 Overrun
Definition at line 6271 of file stm32f10x.h.
#define CAN_RF0R_FULL0 ((uint8_t)0x08) |
FIFO 0 Full
Definition at line 6270 of file stm32f10x.h.
#define CAN_RF0R_RFOM0 ((uint8_t)0x20) |
Release FIFO 0 Output Mailbox
Definition at line 6272 of file stm32f10x.h.
#define CAN_RF1R_FMP1 ((uint8_t)0x03) |
FIFO 1 Message Pending
Definition at line 6275 of file stm32f10x.h.
#define CAN_RF1R_FOVR1 ((uint8_t)0x10) |
FIFO 1 Overrun
Definition at line 6277 of file stm32f10x.h.
#define CAN_RF1R_FULL1 ((uint8_t)0x08) |
FIFO 1 Full
Definition at line 6276 of file stm32f10x.h.
#define CAN_RF1R_RFOM1 ((uint8_t)0x20) |
Release FIFO 1 Output Mailbox
Definition at line 6278 of file stm32f10x.h.
#define CAN_RI0R_EXID ((uint32_t)0x001FFFF8) |
Extended Identifier
Definition at line 6393 of file stm32f10x.h.
#define CAN_RI0R_IDE ((uint32_t)0x00000004) |
Identifier Extension
Definition at line 6392 of file stm32f10x.h.
#define CAN_RI0R_RTR ((uint32_t)0x00000002) |
Remote Transmission Request
Definition at line 6391 of file stm32f10x.h.
#define CAN_RI0R_STID ((uint32_t)0xFFE00000) |
Standard Identifier or Extended Identifier
Definition at line 6394 of file stm32f10x.h.
#define CAN_RI1R_EXID ((uint32_t)0x001FFFF8) |
Extended identifier
Definition at line 6416 of file stm32f10x.h.
#define CAN_RI1R_IDE ((uint32_t)0x00000004) |
Identifier Extension
Definition at line 6415 of file stm32f10x.h.
#define CAN_RI1R_RTR ((uint32_t)0x00000002) |
Remote Transmission Request
Definition at line 6414 of file stm32f10x.h.
#define CAN_RI1R_STID ((uint32_t)0xFFE00000) |
Standard Identifier or Extended Identifier
Definition at line 6417 of file stm32f10x.h.
#define CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) |
Data byte 4
Definition at line 6337 of file stm32f10x.h.
#define CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) |
Data byte 5
Definition at line 6338 of file stm32f10x.h.
#define CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) |
Data byte 6
Definition at line 6339 of file stm32f10x.h.
#define CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) |
Data byte 7
Definition at line 6340 of file stm32f10x.h.
#define CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) |
Data byte 4
Definition at line 6361 of file stm32f10x.h.
#define CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) |
Data byte 5
Definition at line 6362 of file stm32f10x.h.
#define CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) |
Data byte 6
Definition at line 6363 of file stm32f10x.h.
#define CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) |
Data byte 7
Definition at line 6364 of file stm32f10x.h.
#define CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) |
Data byte 4
Definition at line 6385 of file stm32f10x.h.
#define CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) |
Data byte 5
Definition at line 6386 of file stm32f10x.h.
#define CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) |
Data byte 6
Definition at line 6387 of file stm32f10x.h.
#define CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) |
Data byte 7
Definition at line 6388 of file stm32f10x.h.
#define CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) |
Data byte 0
Definition at line 6331 of file stm32f10x.h.
#define CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) |
Data byte 1
Definition at line 6332 of file stm32f10x.h.
#define CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) |
Data byte 2
Definition at line 6333 of file stm32f10x.h.
#define CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) |
Data byte 3
Definition at line 6334 of file stm32f10x.h.
#define CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) |
Data byte 0
Definition at line 6355 of file stm32f10x.h.
#define CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) |
Data byte 1
Definition at line 6356 of file stm32f10x.h.
#define CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) |
Data byte 2
Definition at line 6357 of file stm32f10x.h.
#define CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) |
Data byte 3
Definition at line 6358 of file stm32f10x.h.
#define CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) |
Data byte 0
Definition at line 6379 of file stm32f10x.h.
#define CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) |
Data byte 1
Definition at line 6380 of file stm32f10x.h.
#define CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) |
Data byte 2
Definition at line 6381 of file stm32f10x.h.
#define CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) |
Data byte 3
Definition at line 6382 of file stm32f10x.h.
#define CAN_TDT0R_DLC ((uint32_t)0x0000000F) |
Data Length Code
Definition at line 6326 of file stm32f10x.h.
#define CAN_TDT0R_TGT ((uint32_t)0x00000100) |
Transmit Global Time
Definition at line 6327 of file stm32f10x.h.
#define CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) |
Message Time Stamp
Definition at line 6328 of file stm32f10x.h.
#define CAN_TDT1R_DLC ((uint32_t)0x0000000F) |
Data Length Code
Definition at line 6350 of file stm32f10x.h.
#define CAN_TDT1R_TGT ((uint32_t)0x00000100) |
Transmit Global Time
Definition at line 6351 of file stm32f10x.h.
#define CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) |
Message Time Stamp
Definition at line 6352 of file stm32f10x.h.
#define CAN_TDT2R_DLC ((uint32_t)0x0000000F) |
Data Length Code
Definition at line 6374 of file stm32f10x.h.
#define CAN_TDT2R_TGT ((uint32_t)0x00000100) |
Transmit Global Time
Definition at line 6375 of file stm32f10x.h.
#define CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) |
Message Time Stamp
Definition at line 6376 of file stm32f10x.h.
#define CAN_TI0R_EXID ((uint32_t)0x001FFFF8) |
Extended Identifier
Definition at line 6322 of file stm32f10x.h.
#define CAN_TI0R_IDE ((uint32_t)0x00000004) |
Identifier Extension
Definition at line 6321 of file stm32f10x.h.
#define CAN_TI0R_RTR ((uint32_t)0x00000002) |
Remote Transmission Request
Definition at line 6320 of file stm32f10x.h.
#define CAN_TI0R_STID ((uint32_t)0xFFE00000) |
Standard Identifier or Extended Identifier
Definition at line 6323 of file stm32f10x.h.
#define CAN_TI0R_TXRQ ((uint32_t)0x00000001) |
Transmit Mailbox Request
Definition at line 6319 of file stm32f10x.h.
#define CAN_TI1R_EXID ((uint32_t)0x001FFFF8) |
Extended Identifier
Definition at line 6346 of file stm32f10x.h.
#define CAN_TI1R_IDE ((uint32_t)0x00000004) |
Identifier Extension
Definition at line 6345 of file stm32f10x.h.
#define CAN_TI1R_RTR ((uint32_t)0x00000002) |
Remote Transmission Request
Definition at line 6344 of file stm32f10x.h.
#define CAN_TI1R_STID ((uint32_t)0xFFE00000) |
Standard Identifier or Extended Identifier
Definition at line 6347 of file stm32f10x.h.
#define CAN_TI1R_TXRQ ((uint32_t)0x00000001) |
Transmit Mailbox Request
Definition at line 6343 of file stm32f10x.h.
#define CAN_TI2R_EXID ((uint32_t)0x001FFFF8) |
Extended identifier
Definition at line 6370 of file stm32f10x.h.
#define CAN_TI2R_IDE ((uint32_t)0x00000004) |
Identifier Extension
Definition at line 6369 of file stm32f10x.h.
#define CAN_TI2R_RTR ((uint32_t)0x00000002) |
Remote Transmission Request
Definition at line 6368 of file stm32f10x.h.
#define CAN_TI2R_STID ((uint32_t)0xFFE00000) |
Standard Identifier or Extended Identifier
Definition at line 6371 of file stm32f10x.h.
#define CAN_TI2R_TXRQ ((uint32_t)0x00000001) |
Transmit Mailbox Request
Definition at line 6367 of file stm32f10x.h.
#define CAN_TSR_ABRQ0 ((uint32_t)0x00000080) |
Abort Request for Mailbox0
Definition at line 6245 of file stm32f10x.h.
#define CAN_TSR_ABRQ1 ((uint32_t)0x00008000) |
Abort Request for Mailbox 1
Definition at line 6250 of file stm32f10x.h.
#define CAN_TSR_ABRQ2 ((uint32_t)0x00800000) |
Abort Request for Mailbox 2
Definition at line 6255 of file stm32f10x.h.
#define CAN_TSR_ALST0 ((uint32_t)0x00000004) |
Arbitration Lost for Mailbox0
Definition at line 6243 of file stm32f10x.h.
#define CAN_TSR_ALST1 ((uint32_t)0x00000400) |
Arbitration Lost for Mailbox1
Definition at line 6248 of file stm32f10x.h.
#define CAN_TSR_ALST2 ((uint32_t)0x00040000) |
Arbitration Lost for mailbox 2
Definition at line 6253 of file stm32f10x.h.
#define CAN_TSR_CODE ((uint32_t)0x03000000) |
Mailbox Code
Definition at line 6256 of file stm32f10x.h.
#define CAN_TSR_LOW ((uint32_t)0xE0000000) |
LOW[2:0] bits
Definition at line 6263 of file stm32f10x.h.
#define CAN_TSR_LOW0 ((uint32_t)0x20000000) |
Lowest Priority Flag for Mailbox 0
Definition at line 6264 of file stm32f10x.h.
#define CAN_TSR_LOW1 ((uint32_t)0x40000000) |
Lowest Priority Flag for Mailbox 1
Definition at line 6265 of file stm32f10x.h.
#define CAN_TSR_LOW2 ((uint32_t)0x80000000) |
Lowest Priority Flag for Mailbox 2
Definition at line 6266 of file stm32f10x.h.
#define CAN_TSR_RQCP0 ((uint32_t)0x00000001) |
Request Completed Mailbox0
Definition at line 6241 of file stm32f10x.h.
#define CAN_TSR_RQCP1 ((uint32_t)0x00000100) |
Request Completed Mailbox1
Definition at line 6246 of file stm32f10x.h.
#define CAN_TSR_RQCP2 ((uint32_t)0x00010000) |
Request Completed Mailbox2
Definition at line 6251 of file stm32f10x.h.
#define CAN_TSR_TERR0 ((uint32_t)0x00000008) |
Transmission Error of Mailbox0
Definition at line 6244 of file stm32f10x.h.
#define CAN_TSR_TERR1 ((uint32_t)0x00000800) |
Transmission Error of Mailbox1
Definition at line 6249 of file stm32f10x.h.
#define CAN_TSR_TERR2 ((uint32_t)0x00080000) |
Transmission Error of Mailbox 2
Definition at line 6254 of file stm32f10x.h.
#define CAN_TSR_TME ((uint32_t)0x1C000000) |
TME[2:0] bits
Definition at line 6258 of file stm32f10x.h.
#define CAN_TSR_TME0 ((uint32_t)0x04000000) |
Transmit Mailbox 0 Empty
Definition at line 6259 of file stm32f10x.h.
#define CAN_TSR_TME1 ((uint32_t)0x08000000) |
Transmit Mailbox 1 Empty
Definition at line 6260 of file stm32f10x.h.
#define CAN_TSR_TME2 ((uint32_t)0x10000000) |
Transmit Mailbox 2 Empty
Definition at line 6261 of file stm32f10x.h.
#define CAN_TSR_TXOK0 ((uint32_t)0x00000002) |
Transmission OK of Mailbox0
Definition at line 6242 of file stm32f10x.h.
#define CAN_TSR_TXOK1 ((uint32_t)0x00000200) |
Transmission OK of Mailbox1
Definition at line 6247 of file stm32f10x.h.
#define CAN_TSR_TXOK2 ((uint32_t)0x00020000) |
Transmission OK of Mailbox 2
Definition at line 6252 of file stm32f10x.h.
#define CEC_CFGR_BPEM ((uint16_t)0x0008) |
Bit Period Error Mode
Definition at line 4147 of file stm32f10x.h.
#define CEC_CFGR_BTEM ((uint16_t)0x0004) |
Bit Timing Error Mode
Definition at line 4146 of file stm32f10x.h.
#define CEC_CFGR_IE ((uint16_t)0x0002) |
Interrupt Enable
Definition at line 4145 of file stm32f10x.h.
#define CEC_CFGR_PE ((uint16_t)0x0001) |
Peripheral Enable
Definition at line 4144 of file stm32f10x.h.
#define CEC_CSR_RBTF ((uint16_t)0x0080) |
Rx Block Transfer Finished
Definition at line 4176 of file stm32f10x.h.
#define CEC_CSR_REOM ((uint16_t)0x0020) |
Rx End Of Message
Definition at line 4174 of file stm32f10x.h.
#define CEC_CSR_RERR ((uint16_t)0x0040) |
Rx Error
Definition at line 4175 of file stm32f10x.h.
#define CEC_CSR_RSOM ((uint16_t)0x0010) |
Rx Start Of Message
Definition at line 4173 of file stm32f10x.h.
#define CEC_CSR_TBTRF ((uint16_t)0x0008) |
Tx Byte Transfer Request or Block Transfer Finished
Definition at line 4172 of file stm32f10x.h.
#define CEC_CSR_TEOM ((uint16_t)0x0002) |
Tx End Of Message
Definition at line 4170 of file stm32f10x.h.
#define CEC_CSR_TERR ((uint16_t)0x0004) |
Tx Error
Definition at line 4171 of file stm32f10x.h.
#define CEC_CSR_TSOM ((uint16_t)0x0001) |
Tx Start Of Message
Definition at line 4169 of file stm32f10x.h.
#define CEC_ESR_ACKE ((uint16_t)0x0010) |
Block Acknowledge Error
Definition at line 4164 of file stm32f10x.h.
#define CEC_ESR_BPE ((uint16_t)0x0002) |
Bit Period Error
Definition at line 4161 of file stm32f10x.h.
#define CEC_ESR_BTE ((uint16_t)0x0001) |
Bit Timing Error
Definition at line 4160 of file stm32f10x.h.
#define CEC_ESR_LINE ((uint16_t)0x0020) |
Line Error
Definition at line 4165 of file stm32f10x.h.
#define CEC_ESR_RBTFE ((uint16_t)0x0004) |
Rx Block Transfer Finished Error
Definition at line 4162 of file stm32f10x.h.
#define CEC_ESR_SBE ((uint16_t)0x0008) |
Start Bit Error
Definition at line 4163 of file stm32f10x.h.
#define CEC_ESR_TBTFE ((uint16_t)0x0040) |
Tx Block Transfer Finished Error
Definition at line 4166 of file stm32f10x.h.
#define CEC_OAR_OA ((uint16_t)0x000F) |
OA[3:0]: Own Address
Definition at line 4150 of file stm32f10x.h.
#define CEC_OAR_OA_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4151 of file stm32f10x.h.
#define CEC_OAR_OA_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4152 of file stm32f10x.h.
#define CEC_OAR_OA_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 4153 of file stm32f10x.h.
#define CEC_OAR_OA_3 ((uint16_t)0x0008) |
Bit 3
Definition at line 4154 of file stm32f10x.h.
#define CEC_PRES_PRES ((uint16_t)0x3FFF) |
Prescaler Counter Value
Definition at line 4157 of file stm32f10x.h.
#define CEC_RXD_RXD ((uint16_t)0x00FF) |
Rx Data register
Definition at line 4182 of file stm32f10x.h.
#define CEC_TXD_TXD ((uint16_t)0x00FF) |
Tx Data register
Definition at line 4179 of file stm32f10x.h.
#define CRC_CR_RESET ((uint8_t)0x01) |
RESET bit
Definition at line 1486 of file stm32f10x.h.
#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) |
Data register bits
Definition at line 1478 of file stm32f10x.h.
#define CRC_IDR_IDR ((uint8_t)0xFF) |
General-purpose 8-bit data register bits
Definition at line 1482 of file stm32f10x.h.
#define DAC_CR_BOFF1 ((uint32_t)0x00000002) |
DAC channel1 output buffer disable
Definition at line 4054 of file stm32f10x.h.
#define DAC_CR_BOFF2 ((uint32_t)0x00020000) |
DAC channel2 output buffer disable
Definition at line 4074 of file stm32f10x.h.
#define DAC_CR_DMAEN1 ((uint32_t)0x00001000) |
DAC channel1 DMA enable
Definition at line 4072 of file stm32f10x.h.
#define DAC_CR_DMAEN2 ((uint32_t)0x10000000) |
DAC channel2 DMA enabled
Definition at line 4092 of file stm32f10x.h.
#define DAC_CR_EN1 ((uint32_t)0x00000001) |
DAC channel1 enable
Definition at line 4053 of file stm32f10x.h.
#define DAC_CR_EN2 ((uint32_t)0x00010000) |
DAC channel2 enable
Definition at line 4073 of file stm32f10x.h.
#define DAC_CR_MAMP1 ((uint32_t)0x00000F00) |
MAMP1[3:0] (DAC channel1 Mask/Amplitude selector)
Definition at line 4066 of file stm32f10x.h.
#define DAC_CR_MAMP1_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4067 of file stm32f10x.h.
#define DAC_CR_MAMP1_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4068 of file stm32f10x.h.
#define DAC_CR_MAMP1_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4069 of file stm32f10x.h.
#define DAC_CR_MAMP1_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4070 of file stm32f10x.h.
#define DAC_CR_MAMP2 ((uint32_t)0x0F000000) |
MAMP2[3:0] (DAC channel2 Mask/Amplitude selector)
Definition at line 4086 of file stm32f10x.h.
#define DAC_CR_MAMP2_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4087 of file stm32f10x.h.
#define DAC_CR_MAMP2_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4088 of file stm32f10x.h.
#define DAC_CR_MAMP2_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4089 of file stm32f10x.h.
#define DAC_CR_MAMP2_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4090 of file stm32f10x.h.
#define DAC_CR_TEN1 ((uint32_t)0x00000004) |
DAC channel1 Trigger enable
Definition at line 4055 of file stm32f10x.h.
#define DAC_CR_TEN2 ((uint32_t)0x00040000) |
DAC channel2 Trigger enable
Definition at line 4075 of file stm32f10x.h.
#define DAC_CR_TSEL1 ((uint32_t)0x00000038) |
TSEL1[2:0] (DAC channel1 Trigger selection)
Definition at line 4057 of file stm32f10x.h.
#define DAC_CR_TSEL1_0 ((uint32_t)0x00000008) |
Bit 0
Definition at line 4058 of file stm32f10x.h.
#define DAC_CR_TSEL1_1 ((uint32_t)0x00000010) |
Bit 1
Definition at line 4059 of file stm32f10x.h.
#define DAC_CR_TSEL1_2 ((uint32_t)0x00000020) |
Bit 2
Definition at line 4060 of file stm32f10x.h.
#define DAC_CR_TSEL2 ((uint32_t)0x00380000) |
TSEL2[2:0] (DAC channel2 Trigger selection)
Definition at line 4077 of file stm32f10x.h.
#define DAC_CR_TSEL2_0 ((uint32_t)0x00080000) |
Bit 0
Definition at line 4078 of file stm32f10x.h.
#define DAC_CR_TSEL2_1 ((uint32_t)0x00100000) |
Bit 1
Definition at line 4079 of file stm32f10x.h.
#define DAC_CR_TSEL2_2 ((uint32_t)0x00200000) |
Bit 2
Definition at line 4080 of file stm32f10x.h.
#define DAC_CR_WAVE1 ((uint32_t)0x000000C0) |
WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable)
Definition at line 4062 of file stm32f10x.h.
#define DAC_CR_WAVE1_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 4063 of file stm32f10x.h.
#define DAC_CR_WAVE1_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 4064 of file stm32f10x.h.
#define DAC_CR_WAVE2 ((uint32_t)0x00C00000) |
WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable)
Definition at line 4082 of file stm32f10x.h.
#define DAC_CR_WAVE2_0 ((uint32_t)0x00400000) |
Bit 0
Definition at line 4083 of file stm32f10x.h.
#define DAC_CR_WAVE2_1 ((uint32_t)0x00800000) |
Bit 1
Definition at line 4084 of file stm32f10x.h.
#define DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) |
DAC channel1 12-bit Left aligned data
Definition at line 4102 of file stm32f10x.h.
#define DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) |
DAC channel2 12-bit Left aligned data
Definition at line 4111 of file stm32f10x.h.
#define DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) |
DAC channel1 12-bit Left aligned data
Definition at line 4121 of file stm32f10x.h.
#define DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) |
DAC channel2 12-bit Left aligned data
Definition at line 4122 of file stm32f10x.h.
#define DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) |
DAC channel1 12-bit Right aligned data
Definition at line 4099 of file stm32f10x.h.
#define DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) |
DAC channel2 12-bit Right aligned data
Definition at line 4108 of file stm32f10x.h.
#define DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) |
DAC channel1 12-bit Right aligned data
Definition at line 4117 of file stm32f10x.h.
#define DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) |
DAC channel2 12-bit Right aligned data
Definition at line 4118 of file stm32f10x.h.
#define DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) |
DAC channel1 8-bit Right aligned data
Definition at line 4105 of file stm32f10x.h.
#define DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) |
DAC channel2 8-bit Right aligned data
Definition at line 4114 of file stm32f10x.h.
#define DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) |
DAC channel1 8-bit Right aligned data
Definition at line 4125 of file stm32f10x.h.
#define DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) |
DAC channel2 8-bit Right aligned data
Definition at line 4126 of file stm32f10x.h.
#define DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) |
DAC channel1 data output
Definition at line 4129 of file stm32f10x.h.
#define DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) |
DAC channel2 data output
Definition at line 4132 of file stm32f10x.h.
#define DAC_SR_DMAUDR1 ((uint32_t)0x00002000) |
DAC channel1 DMA underrun flag
Definition at line 4135 of file stm32f10x.h.
#define DAC_SR_DMAUDR2 ((uint32_t)0x20000000) |
DAC channel2 DMA underrun flag
Definition at line 4136 of file stm32f10x.h.
#define DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) |
DAC channel1 software trigger
Definition at line 4095 of file stm32f10x.h.
#define DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) |
DAC channel2 software trigger
Definition at line 4096 of file stm32f10x.h.
#define DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000) |
Debug CAN1 stopped when Core is halted
Definition at line 7766 of file stm32f10x.h.
#define DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000) |
Debug CAN2 stopped when Core is halted
Definition at line 7773 of file stm32f10x.h.
#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) |
SMBUS timeout mode stopped when Core is halted
Definition at line 7767 of file stm32f10x.h.
#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) |
SMBUS timeout mode stopped when Core is halted
Definition at line 7768 of file stm32f10x.h.
#define DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100) |
Debug Independent Watchdog stopped when Core is halted
Definition at line 7760 of file stm32f10x.h.
#define DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) |
Debug Sleep Mode
Definition at line 7751 of file stm32f10x.h.
#define DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) |
Debug Standby mode
Definition at line 7753 of file stm32f10x.h.
#define DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) |
Debug Stop Mode
Definition at line 7752 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000) |
Debug TIM10 stopped when Core is halted
Definition at line 7781 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000) |
Debug TIM11 stopped when Core is halted
Definition at line 7782 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000) |
Debug TIM12 stopped when Core is halted
Definition at line 7777 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000) |
Debug TIM13 stopped when Core is halted
Definition at line 7778 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000) |
Debug TIM14 stopped when Core is halted
Definition at line 7779 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000) |
Debug TIM15 stopped when Core is halted
Definition at line 7774 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000) |
Debug TIM16 stopped when Core is halted
Definition at line 7775 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000) |
Debug TIM17 stopped when Core is halted
Definition at line 7776 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400) |
TIM1 counter stopped when core is halted
Definition at line 7762 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800) |
TIM2 counter stopped when core is halted
Definition at line 7763 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000) |
TIM3 counter stopped when core is halted
Definition at line 7764 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000) |
TIM4 counter stopped when core is halted
Definition at line 7765 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000) |
TIM5 counter stopped when core is halted
Definition at line 7770 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000) |
TIM6 counter stopped when core is halted
Definition at line 7771 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000) |
TIM7 counter stopped when core is halted
Definition at line 7772 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000) |
TIM8 counter stopped when core is halted
Definition at line 7769 of file stm32f10x.h.
#define DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000) |
Debug TIM9 stopped when Core is halted
Definition at line 7780 of file stm32f10x.h.
#define DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200) |
Debug Window Watchdog stopped when Core is halted
Definition at line 7761 of file stm32f10x.h.
#define DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) |
Trace Pin Assignment Control
Definition at line 7754 of file stm32f10x.h.
#define DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) |
TRACE_MODE[1:0] bits (Trace Pin Assignment Control)
Definition at line 7756 of file stm32f10x.h.
#define DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 7757 of file stm32f10x.h.
#define DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 7758 of file stm32f10x.h.
#define DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) |
Device Identifier
Definition at line 7730 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) |
REV_ID[15:0] bits (Revision Identifier)
Definition at line 7732 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 7733 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 7734 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000) |
Bit 10
Definition at line 7743 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000) |
Bit 11
Definition at line 7744 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000) |
Bit 12
Definition at line 7745 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000) |
Bit 13
Definition at line 7746 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000) |
Bit 14
Definition at line 7747 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000) |
Bit 15
Definition at line 7748 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 7735 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 7736 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 7737 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 7738 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 7739 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 7740 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000) |
Bit 8
Definition at line 7741 of file stm32f10x.h.
#define DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000) |
Bit 9
Definition at line 7742 of file stm32f10x.h.
#define DMA_CCR1_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3468 of file stm32f10x.h.
#define DMA_CCR1_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3467 of file stm32f10x.h.
#define DMA_CCR1_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3463 of file stm32f10x.h.
#define DMA_CCR1_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3465 of file stm32f10x.h.
#define DMA_CCR1_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode
Definition at line 3484 of file stm32f10x.h.
#define DMA_CCR1_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3470 of file stm32f10x.h.
#define DMA_CCR1_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3476 of file stm32f10x.h.
#define DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3477 of file stm32f10x.h.
#define DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3478 of file stm32f10x.h.
#define DMA_CCR1_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3469 of file stm32f10x.h.
#define DMA_CCR1_PL ((uint16_t)0x3000) |
PL[1:0] bits(Channel Priority level)
Definition at line 3480 of file stm32f10x.h.
#define DMA_CCR1_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3481 of file stm32f10x.h.
#define DMA_CCR1_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3482 of file stm32f10x.h.
#define DMA_CCR1_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3472 of file stm32f10x.h.
#define DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3473 of file stm32f10x.h.
#define DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3474 of file stm32f10x.h.
#define DMA_CCR1_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3464 of file stm32f10x.h.
#define DMA_CCR1_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3466 of file stm32f10x.h.
#define DMA_CCR2_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3492 of file stm32f10x.h.
#define DMA_CCR2_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3491 of file stm32f10x.h.
#define DMA_CCR2_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3487 of file stm32f10x.h.
#define DMA_CCR2_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3489 of file stm32f10x.h.
#define DMA_CCR2_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode
Definition at line 3508 of file stm32f10x.h.
#define DMA_CCR2_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3494 of file stm32f10x.h.
#define DMA_CCR2_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3500 of file stm32f10x.h.
#define DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3501 of file stm32f10x.h.
#define DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3502 of file stm32f10x.h.
#define DMA_CCR2_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3493 of file stm32f10x.h.
#define DMA_CCR2_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3504 of file stm32f10x.h.
#define DMA_CCR2_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3505 of file stm32f10x.h.
#define DMA_CCR2_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3506 of file stm32f10x.h.
#define DMA_CCR2_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3496 of file stm32f10x.h.
#define DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3497 of file stm32f10x.h.
#define DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3498 of file stm32f10x.h.
#define DMA_CCR2_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3488 of file stm32f10x.h.
#define DMA_CCR2_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3490 of file stm32f10x.h.
#define DMA_CCR3_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3516 of file stm32f10x.h.
#define DMA_CCR3_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3515 of file stm32f10x.h.
#define DMA_CCR3_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3511 of file stm32f10x.h.
#define DMA_CCR3_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3513 of file stm32f10x.h.
#define DMA_CCR3_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode ****************** Bit definition for DMA_CCR4 register
Definition at line 3532 of file stm32f10x.h.
#define DMA_CCR3_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3518 of file stm32f10x.h.
#define DMA_CCR3_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3524 of file stm32f10x.h.
#define DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3525 of file stm32f10x.h.
#define DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3526 of file stm32f10x.h.
#define DMA_CCR3_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3517 of file stm32f10x.h.
#define DMA_CCR3_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3528 of file stm32f10x.h.
#define DMA_CCR3_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3529 of file stm32f10x.h.
#define DMA_CCR3_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3530 of file stm32f10x.h.
#define DMA_CCR3_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3520 of file stm32f10x.h.
#define DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3521 of file stm32f10x.h.
#define DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3522 of file stm32f10x.h.
#define DMA_CCR3_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3512 of file stm32f10x.h.
#define DMA_CCR3_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3514 of file stm32f10x.h.
#define DMA_CCR4_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3540 of file stm32f10x.h.
#define DMA_CCR4_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3539 of file stm32f10x.h.
#define DMA_CCR4_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3535 of file stm32f10x.h.
#define DMA_CCR4_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3537 of file stm32f10x.h.
#define DMA_CCR4_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode
Definition at line 3556 of file stm32f10x.h.
#define DMA_CCR4_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3542 of file stm32f10x.h.
#define DMA_CCR4_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3548 of file stm32f10x.h.
#define DMA_CCR4_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3549 of file stm32f10x.h.
#define DMA_CCR4_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3550 of file stm32f10x.h.
#define DMA_CCR4_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3541 of file stm32f10x.h.
#define DMA_CCR4_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3552 of file stm32f10x.h.
#define DMA_CCR4_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3553 of file stm32f10x.h.
#define DMA_CCR4_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3554 of file stm32f10x.h.
#define DMA_CCR4_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3544 of file stm32f10x.h.
#define DMA_CCR4_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3545 of file stm32f10x.h.
#define DMA_CCR4_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3546 of file stm32f10x.h.
#define DMA_CCR4_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3536 of file stm32f10x.h.
#define DMA_CCR4_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3538 of file stm32f10x.h.
#define DMA_CCR5_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3564 of file stm32f10x.h.
#define DMA_CCR5_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3563 of file stm32f10x.h.
#define DMA_CCR5_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3559 of file stm32f10x.h.
#define DMA_CCR5_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3561 of file stm32f10x.h.
#define DMA_CCR5_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode enable
Definition at line 3580 of file stm32f10x.h.
#define DMA_CCR5_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3566 of file stm32f10x.h.
#define DMA_CCR5_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3572 of file stm32f10x.h.
#define DMA_CCR5_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3573 of file stm32f10x.h.
#define DMA_CCR5_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3574 of file stm32f10x.h.
#define DMA_CCR5_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3565 of file stm32f10x.h.
#define DMA_CCR5_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3576 of file stm32f10x.h.
#define DMA_CCR5_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3577 of file stm32f10x.h.
#define DMA_CCR5_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3578 of file stm32f10x.h.
#define DMA_CCR5_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3568 of file stm32f10x.h.
#define DMA_CCR5_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3569 of file stm32f10x.h.
#define DMA_CCR5_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3570 of file stm32f10x.h.
#define DMA_CCR5_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3560 of file stm32f10x.h.
#define DMA_CCR5_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3562 of file stm32f10x.h.
#define DMA_CCR6_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3588 of file stm32f10x.h.
#define DMA_CCR6_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3587 of file stm32f10x.h.
#define DMA_CCR6_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3583 of file stm32f10x.h.
#define DMA_CCR6_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3585 of file stm32f10x.h.
#define DMA_CCR6_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode
Definition at line 3604 of file stm32f10x.h.
#define DMA_CCR6_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3590 of file stm32f10x.h.
#define DMA_CCR6_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3596 of file stm32f10x.h.
#define DMA_CCR6_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3597 of file stm32f10x.h.
#define DMA_CCR6_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3598 of file stm32f10x.h.
#define DMA_CCR6_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3589 of file stm32f10x.h.
#define DMA_CCR6_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3600 of file stm32f10x.h.
#define DMA_CCR6_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3601 of file stm32f10x.h.
#define DMA_CCR6_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3602 of file stm32f10x.h.
#define DMA_CCR6_PSIZE ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3592 of file stm32f10x.h.
#define DMA_CCR6_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3593 of file stm32f10x.h.
#define DMA_CCR6_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3594 of file stm32f10x.h.
#define DMA_CCR6_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3584 of file stm32f10x.h.
#define DMA_CCR6_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3586 of file stm32f10x.h.
#define DMA_CCR7_CIRC ((uint16_t)0x0020) |
Circular mode
Definition at line 3612 of file stm32f10x.h.
#define DMA_CCR7_DIR ((uint16_t)0x0010) |
Data transfer direction
Definition at line 3611 of file stm32f10x.h.
#define DMA_CCR7_EN ((uint16_t)0x0001) |
Channel enable
Definition at line 3607 of file stm32f10x.h.
#define DMA_CCR7_HTIE ((uint16_t)0x0004) |
Half Transfer interrupt enable
Definition at line 3609 of file stm32f10x.h.
#define DMA_CCR7_MEM2MEM ((uint16_t)0x4000) |
Memory to memory mode enable
Definition at line 3628 of file stm32f10x.h.
#define DMA_CCR7_MINC ((uint16_t)0x0080) |
Memory increment mode
Definition at line 3614 of file stm32f10x.h.
#define DMA_CCR7_MSIZE ((uint16_t)0x0C00) |
MSIZE[1:0] bits (Memory size)
Definition at line 3620 of file stm32f10x.h.
#define DMA_CCR7_MSIZE_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 3621 of file stm32f10x.h.
#define DMA_CCR7_MSIZE_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 3622 of file stm32f10x.h.
#define DMA_CCR7_PINC ((uint16_t)0x0040) |
Peripheral increment mode
Definition at line 3613 of file stm32f10x.h.
#define DMA_CCR7_PL ((uint16_t)0x3000) |
PL[1:0] bits (Channel Priority level)
Definition at line 3624 of file stm32f10x.h.
#define DMA_CCR7_PL_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 3625 of file stm32f10x.h.
#define DMA_CCR7_PL_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 3626 of file stm32f10x.h.
#define DMA_CCR7_PSIZE , ((uint16_t)0x0300) |
PSIZE[1:0] bits (Peripheral size)
Definition at line 3616 of file stm32f10x.h.
#define DMA_CCR7_PSIZE_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 3617 of file stm32f10x.h.
#define DMA_CCR7_PSIZE_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 3618 of file stm32f10x.h.
#define DMA_CCR7_TCIE ((uint16_t)0x0002) |
Transfer complete interrupt enable
Definition at line 3608 of file stm32f10x.h.
#define DMA_CCR7_TEIE ((uint16_t)0x0008) |
Transfer error interrupt enable
Definition at line 3610 of file stm32f10x.h.
#define DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3675 of file stm32f10x.h.
#define DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3678 of file stm32f10x.h.
#define DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3681 of file stm32f10x.h.
#define DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3685 of file stm32f10x.h.
#define DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3688 of file stm32f10x.h.
#define DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3691 of file stm32f10x.h.
#define DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF) |
Memory Address
Definition at line 3694 of file stm32f10x.h.
#define DMA_CNDTR1_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3631 of file stm32f10x.h.
#define DMA_CNDTR2_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3634 of file stm32f10x.h.
#define DMA_CNDTR3_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3637 of file stm32f10x.h.
#define DMA_CNDTR4_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3640 of file stm32f10x.h.
#define DMA_CNDTR5_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3643 of file stm32f10x.h.
#define DMA_CNDTR6_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3646 of file stm32f10x.h.
#define DMA_CNDTR7_NDT ((uint16_t)0xFFFF) |
Number of data to Transfer
Definition at line 3649 of file stm32f10x.h.
#define DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3652 of file stm32f10x.h.
#define DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3655 of file stm32f10x.h.
#define DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3658 of file stm32f10x.h.
#define DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3662 of file stm32f10x.h.
#define DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3665 of file stm32f10x.h.
#define DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3668 of file stm32f10x.h.
#define DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF) |
Peripheral Address
Definition at line 3672 of file stm32f10x.h.
#define DMA_IFCR_CGIF1 ((uint32_t)0x00000001) |
Channel 1 Global interrupt clear
Definition at line 3433 of file stm32f10x.h.
#define DMA_IFCR_CGIF2 ((uint32_t)0x00000010) |
Channel 2 Global interrupt clear
Definition at line 3437 of file stm32f10x.h.
#define DMA_IFCR_CGIF3 ((uint32_t)0x00000100) |
Channel 3 Global interrupt clear
Definition at line 3441 of file stm32f10x.h.
#define DMA_IFCR_CGIF4 ((uint32_t)0x00001000) |
Channel 4 Global interrupt clear
Definition at line 3445 of file stm32f10x.h.
#define DMA_IFCR_CGIF5 ((uint32_t)0x00010000) |
Channel 5 Global interrupt clear
Definition at line 3449 of file stm32f10x.h.
#define DMA_IFCR_CGIF6 ((uint32_t)0x00100000) |
Channel 6 Global interrupt clear
Definition at line 3453 of file stm32f10x.h.
#define DMA_IFCR_CGIF7 ((uint32_t)0x01000000) |
Channel 7 Global interrupt clear
Definition at line 3457 of file stm32f10x.h.
#define DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) |
Channel 1 Half Transfer clear
Definition at line 3435 of file stm32f10x.h.
#define DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) |
Channel 2 Half Transfer clear
Definition at line 3439 of file stm32f10x.h.
#define DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) |
Channel 3 Half Transfer clear
Definition at line 3443 of file stm32f10x.h.
#define DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) |
Channel 4 Half Transfer clear
Definition at line 3447 of file stm32f10x.h.
#define DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) |
Channel 5 Half Transfer clear
Definition at line 3451 of file stm32f10x.h.
#define DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) |
Channel 6 Half Transfer clear
Definition at line 3455 of file stm32f10x.h.
#define DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) |
Channel 7 Half Transfer clear
Definition at line 3459 of file stm32f10x.h.
#define DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) |
Channel 1 Transfer Complete clear
Definition at line 3434 of file stm32f10x.h.
#define DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) |
Channel 2 Transfer Complete clear
Definition at line 3438 of file stm32f10x.h.
#define DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) |
Channel 3 Transfer Complete clear
Definition at line 3442 of file stm32f10x.h.
#define DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) |
Channel 4 Transfer Complete clear
Definition at line 3446 of file stm32f10x.h.
#define DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) |
Channel 5 Transfer Complete clear
Definition at line 3450 of file stm32f10x.h.
#define DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) |
Channel 6 Transfer Complete clear
Definition at line 3454 of file stm32f10x.h.
#define DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) |
Channel 7 Transfer Complete clear
Definition at line 3458 of file stm32f10x.h.
#define DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) |
Channel 1 Transfer Error clear
Definition at line 3436 of file stm32f10x.h.
#define DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) |
Channel 2 Transfer Error clear
Definition at line 3440 of file stm32f10x.h.
#define DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) |
Channel 3 Transfer Error clear
Definition at line 3444 of file stm32f10x.h.
#define DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) |
Channel 4 Transfer Error clear
Definition at line 3448 of file stm32f10x.h.
#define DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) |
Channel 5 Transfer Error clear
Definition at line 3452 of file stm32f10x.h.
#define DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) |
Channel 6 Transfer Error clear
Definition at line 3456 of file stm32f10x.h.
#define DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) |
Channel 7 Transfer Error clear
Definition at line 3460 of file stm32f10x.h.
#define DMA_ISR_GIF1 ((uint32_t)0x00000001) |
Channel 1 Global interrupt flag
Definition at line 3403 of file stm32f10x.h.
#define DMA_ISR_GIF2 ((uint32_t)0x00000010) |
Channel 2 Global interrupt flag
Definition at line 3407 of file stm32f10x.h.
#define DMA_ISR_GIF3 ((uint32_t)0x00000100) |
Channel 3 Global interrupt flag
Definition at line 3411 of file stm32f10x.h.
#define DMA_ISR_GIF4 ((uint32_t)0x00001000) |
Channel 4 Global interrupt flag
Definition at line 3415 of file stm32f10x.h.
#define DMA_ISR_GIF5 ((uint32_t)0x00010000) |
Channel 5 Global interrupt flag
Definition at line 3419 of file stm32f10x.h.
#define DMA_ISR_GIF6 ((uint32_t)0x00100000) |
Channel 6 Global interrupt flag
Definition at line 3423 of file stm32f10x.h.
#define DMA_ISR_GIF7 ((uint32_t)0x01000000) |
Channel 7 Global interrupt flag
Definition at line 3427 of file stm32f10x.h.
#define DMA_ISR_HTIF1 ((uint32_t)0x00000004) |
Channel 1 Half Transfer flag
Definition at line 3405 of file stm32f10x.h.
#define DMA_ISR_HTIF2 ((uint32_t)0x00000040) |
Channel 2 Half Transfer flag
Definition at line 3409 of file stm32f10x.h.
#define DMA_ISR_HTIF3 ((uint32_t)0x00000400) |
Channel 3 Half Transfer flag
Definition at line 3413 of file stm32f10x.h.
#define DMA_ISR_HTIF4 ((uint32_t)0x00004000) |
Channel 4 Half Transfer flag
Definition at line 3417 of file stm32f10x.h.
#define DMA_ISR_HTIF5 ((uint32_t)0x00040000) |
Channel 5 Half Transfer flag
Definition at line 3421 of file stm32f10x.h.
#define DMA_ISR_HTIF6 ((uint32_t)0x00400000) |
Channel 6 Half Transfer flag
Definition at line 3425 of file stm32f10x.h.
#define DMA_ISR_HTIF7 ((uint32_t)0x04000000) |
Channel 7 Half Transfer flag
Definition at line 3429 of file stm32f10x.h.
#define DMA_ISR_TCIF1 ((uint32_t)0x00000002) |
Channel 1 Transfer Complete flag
Definition at line 3404 of file stm32f10x.h.
#define DMA_ISR_TCIF2 ((uint32_t)0x00000020) |
Channel 2 Transfer Complete flag
Definition at line 3408 of file stm32f10x.h.
#define DMA_ISR_TCIF3 ((uint32_t)0x00000200) |
Channel 3 Transfer Complete flag
Definition at line 3412 of file stm32f10x.h.
#define DMA_ISR_TCIF4 ((uint32_t)0x00002000) |
Channel 4 Transfer Complete flag
Definition at line 3416 of file stm32f10x.h.
#define DMA_ISR_TCIF5 ((uint32_t)0x00020000) |
Channel 5 Transfer Complete flag
Definition at line 3420 of file stm32f10x.h.
#define DMA_ISR_TCIF6 ((uint32_t)0x00200000) |
Channel 6 Transfer Complete flag
Definition at line 3424 of file stm32f10x.h.
#define DMA_ISR_TCIF7 ((uint32_t)0x02000000) |
Channel 7 Transfer Complete flag
Definition at line 3428 of file stm32f10x.h.
#define DMA_ISR_TEIF1 ((uint32_t)0x00000008) |
Channel 1 Transfer Error flag
Definition at line 3406 of file stm32f10x.h.
#define DMA_ISR_TEIF2 ((uint32_t)0x00000080) |
Channel 2 Transfer Error flag
Definition at line 3410 of file stm32f10x.h.
#define DMA_ISR_TEIF3 ((uint32_t)0x00000800) |
Channel 3 Transfer Error flag
Definition at line 3414 of file stm32f10x.h.
#define DMA_ISR_TEIF4 ((uint32_t)0x00008000) |
Channel 4 Transfer Error flag
Definition at line 3418 of file stm32f10x.h.
#define DMA_ISR_TEIF5 ((uint32_t)0x00080000) |
Channel 5 Transfer Error flag
Definition at line 3422 of file stm32f10x.h.
#define DMA_ISR_TEIF6 ((uint32_t)0x00800000) |
Channel 6 Transfer Error flag
Definition at line 3426 of file stm32f10x.h.
#define DMA_ISR_TEIF7 ((uint32_t)0x08000000) |
Channel 7 Transfer Error flag
Definition at line 3430 of file stm32f10x.h.
#define EXTI_EMR_MR0 ((uint32_t)0x00000001) |
Event Mask on line 0
Definition at line 3287 of file stm32f10x.h.
#define EXTI_EMR_MR1 ((uint32_t)0x00000002) |
Event Mask on line 1
Definition at line 3288 of file stm32f10x.h.
#define EXTI_EMR_MR10 ((uint32_t)0x00000400) |
Event Mask on line 10
Definition at line 3297 of file stm32f10x.h.
#define EXTI_EMR_MR11 ((uint32_t)0x00000800) |
Event Mask on line 11
Definition at line 3298 of file stm32f10x.h.
#define EXTI_EMR_MR12 ((uint32_t)0x00001000) |
Event Mask on line 12
Definition at line 3299 of file stm32f10x.h.
#define EXTI_EMR_MR13 ((uint32_t)0x00002000) |
Event Mask on line 13
Definition at line 3300 of file stm32f10x.h.
#define EXTI_EMR_MR14 ((uint32_t)0x00004000) |
Event Mask on line 14
Definition at line 3301 of file stm32f10x.h.
#define EXTI_EMR_MR15 ((uint32_t)0x00008000) |
Event Mask on line 15
Definition at line 3302 of file stm32f10x.h.
#define EXTI_EMR_MR16 ((uint32_t)0x00010000) |
Event Mask on line 16
Definition at line 3303 of file stm32f10x.h.
#define EXTI_EMR_MR17 ((uint32_t)0x00020000) |
Event Mask on line 17
Definition at line 3304 of file stm32f10x.h.
#define EXTI_EMR_MR18 ((uint32_t)0x00040000) |
Event Mask on line 18
Definition at line 3305 of file stm32f10x.h.
#define EXTI_EMR_MR19 ((uint32_t)0x00080000) |
Event Mask on line 19
Definition at line 3306 of file stm32f10x.h.
#define EXTI_EMR_MR2 ((uint32_t)0x00000004) |
Event Mask on line 2
Definition at line 3289 of file stm32f10x.h.
#define EXTI_EMR_MR3 ((uint32_t)0x00000008) |
Event Mask on line 3
Definition at line 3290 of file stm32f10x.h.
#define EXTI_EMR_MR4 ((uint32_t)0x00000010) |
Event Mask on line 4
Definition at line 3291 of file stm32f10x.h.
#define EXTI_EMR_MR5 ((uint32_t)0x00000020) |
Event Mask on line 5
Definition at line 3292 of file stm32f10x.h.
#define EXTI_EMR_MR6 ((uint32_t)0x00000040) |
Event Mask on line 6
Definition at line 3293 of file stm32f10x.h.
#define EXTI_EMR_MR7 ((uint32_t)0x00000080) |
Event Mask on line 7
Definition at line 3294 of file stm32f10x.h.
#define EXTI_EMR_MR8 ((uint32_t)0x00000100) |
Event Mask on line 8
Definition at line 3295 of file stm32f10x.h.
#define EXTI_EMR_MR9 ((uint32_t)0x00000200) |
Event Mask on line 9
Definition at line 3296 of file stm32f10x.h.
#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) |
Falling trigger event configuration bit of line 0
Definition at line 3331 of file stm32f10x.h.
#define EXTI_FTSR_TR1 ((uint32_t)0x00000002) |
Falling trigger event configuration bit of line 1
Definition at line 3332 of file stm32f10x.h.
#define EXTI_FTSR_TR10 ((uint32_t)0x00000400) |
Falling trigger event configuration bit of line 10
Definition at line 3341 of file stm32f10x.h.
#define EXTI_FTSR_TR11 ((uint32_t)0x00000800) |
Falling trigger event configuration bit of line 11
Definition at line 3342 of file stm32f10x.h.
#define EXTI_FTSR_TR12 ((uint32_t)0x00001000) |
Falling trigger event configuration bit of line 12
Definition at line 3343 of file stm32f10x.h.
#define EXTI_FTSR_TR13 ((uint32_t)0x00002000) |
Falling trigger event configuration bit of line 13
Definition at line 3344 of file stm32f10x.h.
#define EXTI_FTSR_TR14 ((uint32_t)0x00004000) |
Falling trigger event configuration bit of line 14
Definition at line 3345 of file stm32f10x.h.
#define EXTI_FTSR_TR15 ((uint32_t)0x00008000) |
Falling trigger event configuration bit of line 15
Definition at line 3346 of file stm32f10x.h.
#define EXTI_FTSR_TR16 ((uint32_t)0x00010000) |
Falling trigger event configuration bit of line 16
Definition at line 3347 of file stm32f10x.h.
#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) |
Falling trigger event configuration bit of line 17
Definition at line 3348 of file stm32f10x.h.
#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) |
Falling trigger event configuration bit of line 18
Definition at line 3349 of file stm32f10x.h.
#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) |
Falling trigger event configuration bit of line 19
Definition at line 3350 of file stm32f10x.h.
#define EXTI_FTSR_TR2 ((uint32_t)0x00000004) |
Falling trigger event configuration bit of line 2
Definition at line 3333 of file stm32f10x.h.
#define EXTI_FTSR_TR3 ((uint32_t)0x00000008) |
Falling trigger event configuration bit of line 3
Definition at line 3334 of file stm32f10x.h.
#define EXTI_FTSR_TR4 ((uint32_t)0x00000010) |
Falling trigger event configuration bit of line 4
Definition at line 3335 of file stm32f10x.h.
#define EXTI_FTSR_TR5 ((uint32_t)0x00000020) |
Falling trigger event configuration bit of line 5
Definition at line 3336 of file stm32f10x.h.
#define EXTI_FTSR_TR6 ((uint32_t)0x00000040) |
Falling trigger event configuration bit of line 6
Definition at line 3337 of file stm32f10x.h.
#define EXTI_FTSR_TR7 ((uint32_t)0x00000080) |
Falling trigger event configuration bit of line 7
Definition at line 3338 of file stm32f10x.h.
#define EXTI_FTSR_TR8 ((uint32_t)0x00000100) |
Falling trigger event configuration bit of line 8
Definition at line 3339 of file stm32f10x.h.
#define EXTI_FTSR_TR9 ((uint32_t)0x00000200) |
Falling trigger event configuration bit of line 9
Definition at line 3340 of file stm32f10x.h.
#define EXTI_IMR_MR0 ((uint32_t)0x00000001) |
Interrupt Mask on line 0
Definition at line 3265 of file stm32f10x.h.
#define EXTI_IMR_MR1 ((uint32_t)0x00000002) |
Interrupt Mask on line 1
Definition at line 3266 of file stm32f10x.h.
#define EXTI_IMR_MR10 ((uint32_t)0x00000400) |
Interrupt Mask on line 10
Definition at line 3275 of file stm32f10x.h.
#define EXTI_IMR_MR11 ((uint32_t)0x00000800) |
Interrupt Mask on line 11
Definition at line 3276 of file stm32f10x.h.
#define EXTI_IMR_MR12 ((uint32_t)0x00001000) |
Interrupt Mask on line 12
Definition at line 3277 of file stm32f10x.h.
#define EXTI_IMR_MR13 ((uint32_t)0x00002000) |
Interrupt Mask on line 13
Definition at line 3278 of file stm32f10x.h.
#define EXTI_IMR_MR14 ((uint32_t)0x00004000) |
Interrupt Mask on line 14
Definition at line 3279 of file stm32f10x.h.
#define EXTI_IMR_MR15 ((uint32_t)0x00008000) |
Interrupt Mask on line 15
Definition at line 3280 of file stm32f10x.h.
#define EXTI_IMR_MR16 ((uint32_t)0x00010000) |
Interrupt Mask on line 16
Definition at line 3281 of file stm32f10x.h.
#define EXTI_IMR_MR17 ((uint32_t)0x00020000) |
Interrupt Mask on line 17
Definition at line 3282 of file stm32f10x.h.
#define EXTI_IMR_MR18 ((uint32_t)0x00040000) |
Interrupt Mask on line 18
Definition at line 3283 of file stm32f10x.h.
#define EXTI_IMR_MR19 ((uint32_t)0x00080000) |
Interrupt Mask on line 19
Definition at line 3284 of file stm32f10x.h.
#define EXTI_IMR_MR2 ((uint32_t)0x00000004) |
Interrupt Mask on line 2
Definition at line 3267 of file stm32f10x.h.
#define EXTI_IMR_MR3 ((uint32_t)0x00000008) |
Interrupt Mask on line 3
Definition at line 3268 of file stm32f10x.h.
#define EXTI_IMR_MR4 ((uint32_t)0x00000010) |
Interrupt Mask on line 4
Definition at line 3269 of file stm32f10x.h.
#define EXTI_IMR_MR5 ((uint32_t)0x00000020) |
Interrupt Mask on line 5
Definition at line 3270 of file stm32f10x.h.
#define EXTI_IMR_MR6 ((uint32_t)0x00000040) |
Interrupt Mask on line 6
Definition at line 3271 of file stm32f10x.h.
#define EXTI_IMR_MR7 ((uint32_t)0x00000080) |
Interrupt Mask on line 7
Definition at line 3272 of file stm32f10x.h.
#define EXTI_IMR_MR8 ((uint32_t)0x00000100) |
Interrupt Mask on line 8
Definition at line 3273 of file stm32f10x.h.
#define EXTI_IMR_MR9 ((uint32_t)0x00000200) |
Interrupt Mask on line 9
Definition at line 3274 of file stm32f10x.h.
#define EXTI_PR_PR0 ((uint32_t)0x00000001) |
Pending bit for line 0
Definition at line 3375 of file stm32f10x.h.
#define EXTI_PR_PR1 ((uint32_t)0x00000002) |
Pending bit for line 1
Definition at line 3376 of file stm32f10x.h.
#define EXTI_PR_PR10 ((uint32_t)0x00000400) |
Pending bit for line 10
Definition at line 3385 of file stm32f10x.h.
#define EXTI_PR_PR11 ((uint32_t)0x00000800) |
Pending bit for line 11
Definition at line 3386 of file stm32f10x.h.
#define EXTI_PR_PR12 ((uint32_t)0x00001000) |
Pending bit for line 12
Definition at line 3387 of file stm32f10x.h.
#define EXTI_PR_PR13 ((uint32_t)0x00002000) |
Pending bit for line 13
Definition at line 3388 of file stm32f10x.h.
#define EXTI_PR_PR14 ((uint32_t)0x00004000) |
Pending bit for line 14
Definition at line 3389 of file stm32f10x.h.
#define EXTI_PR_PR15 ((uint32_t)0x00008000) |
Pending bit for line 15
Definition at line 3390 of file stm32f10x.h.
#define EXTI_PR_PR16 ((uint32_t)0x00010000) |
Pending bit for line 16
Definition at line 3391 of file stm32f10x.h.
#define EXTI_PR_PR17 ((uint32_t)0x00020000) |
Pending bit for line 17
Definition at line 3392 of file stm32f10x.h.
#define EXTI_PR_PR18 ((uint32_t)0x00040000) |
Pending bit for line 18
Definition at line 3393 of file stm32f10x.h.
#define EXTI_PR_PR19 ((uint32_t)0x00080000) |
Pending bit for line 19
Definition at line 3394 of file stm32f10x.h.
#define EXTI_PR_PR2 ((uint32_t)0x00000004) |
Pending bit for line 2
Definition at line 3377 of file stm32f10x.h.
#define EXTI_PR_PR3 ((uint32_t)0x00000008) |
Pending bit for line 3
Definition at line 3378 of file stm32f10x.h.
#define EXTI_PR_PR4 ((uint32_t)0x00000010) |
Pending bit for line 4
Definition at line 3379 of file stm32f10x.h.
#define EXTI_PR_PR5 ((uint32_t)0x00000020) |
Pending bit for line 5
Definition at line 3380 of file stm32f10x.h.
#define EXTI_PR_PR6 ((uint32_t)0x00000040) |
Pending bit for line 6
Definition at line 3381 of file stm32f10x.h.
#define EXTI_PR_PR7 ((uint32_t)0x00000080) |
Pending bit for line 7
Definition at line 3382 of file stm32f10x.h.
#define EXTI_PR_PR8 ((uint32_t)0x00000100) |
Pending bit for line 8
Definition at line 3383 of file stm32f10x.h.
#define EXTI_PR_PR9 ((uint32_t)0x00000200) |
Pending bit for line 9
Definition at line 3384 of file stm32f10x.h.
#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) |
Rising trigger event configuration bit of line 0
Definition at line 3309 of file stm32f10x.h.
#define EXTI_RTSR_TR1 ((uint32_t)0x00000002) |
Rising trigger event configuration bit of line 1
Definition at line 3310 of file stm32f10x.h.
#define EXTI_RTSR_TR10 ((uint32_t)0x00000400) |
Rising trigger event configuration bit of line 10
Definition at line 3319 of file stm32f10x.h.
#define EXTI_RTSR_TR11 ((uint32_t)0x00000800) |
Rising trigger event configuration bit of line 11
Definition at line 3320 of file stm32f10x.h.
#define EXTI_RTSR_TR12 ((uint32_t)0x00001000) |
Rising trigger event configuration bit of line 12
Definition at line 3321 of file stm32f10x.h.
#define EXTI_RTSR_TR13 ((uint32_t)0x00002000) |
Rising trigger event configuration bit of line 13
Definition at line 3322 of file stm32f10x.h.
#define EXTI_RTSR_TR14 ((uint32_t)0x00004000) |
Rising trigger event configuration bit of line 14
Definition at line 3323 of file stm32f10x.h.
#define EXTI_RTSR_TR15 ((uint32_t)0x00008000) |
Rising trigger event configuration bit of line 15
Definition at line 3324 of file stm32f10x.h.
#define EXTI_RTSR_TR16 ((uint32_t)0x00010000) |
Rising trigger event configuration bit of line 16
Definition at line 3325 of file stm32f10x.h.
#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) |
Rising trigger event configuration bit of line 17
Definition at line 3326 of file stm32f10x.h.
#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) |
Rising trigger event configuration bit of line 18
Definition at line 3327 of file stm32f10x.h.
#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) |
Rising trigger event configuration bit of line 19
Definition at line 3328 of file stm32f10x.h.
#define EXTI_RTSR_TR2 ((uint32_t)0x00000004) |
Rising trigger event configuration bit of line 2
Definition at line 3311 of file stm32f10x.h.
#define EXTI_RTSR_TR3 ((uint32_t)0x00000008) |
Rising trigger event configuration bit of line 3
Definition at line 3312 of file stm32f10x.h.
#define EXTI_RTSR_TR4 ((uint32_t)0x00000010) |
Rising trigger event configuration bit of line 4
Definition at line 3313 of file stm32f10x.h.
#define EXTI_RTSR_TR5 ((uint32_t)0x00000020) |
Rising trigger event configuration bit of line 5
Definition at line 3314 of file stm32f10x.h.
#define EXTI_RTSR_TR6 ((uint32_t)0x00000040) |
Rising trigger event configuration bit of line 6
Definition at line 3315 of file stm32f10x.h.
#define EXTI_RTSR_TR7 ((uint32_t)0x00000080) |
Rising trigger event configuration bit of line 7
Definition at line 3316 of file stm32f10x.h.
#define EXTI_RTSR_TR8 ((uint32_t)0x00000100) |
Rising trigger event configuration bit of line 8
Definition at line 3317 of file stm32f10x.h.
#define EXTI_RTSR_TR9 ((uint32_t)0x00000200) |
Rising trigger event configuration bit of line 9
Definition at line 3318 of file stm32f10x.h.
#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) |
Software Interrupt on line 0
Definition at line 3353 of file stm32f10x.h.
#define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) |
Software Interrupt on line 1
Definition at line 3354 of file stm32f10x.h.
#define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) |
Software Interrupt on line 10
Definition at line 3363 of file stm32f10x.h.
#define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) |
Software Interrupt on line 11
Definition at line 3364 of file stm32f10x.h.
#define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) |
Software Interrupt on line 12
Definition at line 3365 of file stm32f10x.h.
#define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) |
Software Interrupt on line 13
Definition at line 3366 of file stm32f10x.h.
#define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) |
Software Interrupt on line 14
Definition at line 3367 of file stm32f10x.h.
#define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) |
Software Interrupt on line 15
Definition at line 3368 of file stm32f10x.h.
#define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) |
Software Interrupt on line 16
Definition at line 3369 of file stm32f10x.h.
#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) |
Software Interrupt on line 17
Definition at line 3370 of file stm32f10x.h.
#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) |
Software Interrupt on line 18
Definition at line 3371 of file stm32f10x.h.
#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) |
Software Interrupt on line 19
Definition at line 3372 of file stm32f10x.h.
#define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) |
Software Interrupt on line 2
Definition at line 3355 of file stm32f10x.h.
#define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) |
Software Interrupt on line 3
Definition at line 3356 of file stm32f10x.h.
#define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) |
Software Interrupt on line 4
Definition at line 3357 of file stm32f10x.h.
#define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) |
Software Interrupt on line 5
Definition at line 3358 of file stm32f10x.h.
#define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) |
Software Interrupt on line 6
Definition at line 3359 of file stm32f10x.h.
#define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) |
Software Interrupt on line 7
Definition at line 3360 of file stm32f10x.h.
#define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) |
Software Interrupt on line 8
Definition at line 3361 of file stm32f10x.h.
#define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) |
Software Interrupt on line 9
Definition at line 3362 of file stm32f10x.h.
#define FLASH_ACR_HLFCYA ((uint8_t)0x08) |
Flash Half Cycle Access Enable
Definition at line 7796 of file stm32f10x.h.
#define FLASH_ACR_LATENCY ((uint8_t)0x03) |
LATENCY[2:0] bits (Latency)
Definition at line 7791 of file stm32f10x.h.
#define FLASH_ACR_LATENCY_0 ((uint8_t)0x00) |
Bit 0
Definition at line 7792 of file stm32f10x.h.
#define FLASH_ACR_LATENCY_1 ((uint8_t)0x01) |
Bit 0
Definition at line 7793 of file stm32f10x.h.
#define FLASH_ACR_LATENCY_2 ((uint8_t)0x02) |
Bit 1
Definition at line 7794 of file stm32f10x.h.
#define FLASH_ACR_PRFTBE ((uint8_t)0x10) |
Prefetch Buffer Enable
Definition at line 7797 of file stm32f10x.h.
#define FLASH_ACR_PRFTBS ((uint8_t)0x20) |
Prefetch Buffer Status
Definition at line 7798 of file stm32f10x.h.
#define FLASH_AR_FAR ((uint32_t)0xFFFFFFFF) |
Flash Address
Definition at line 7825 of file stm32f10x.h.
#define FLASH_CR_EOPIE ((uint16_t)0x1000) |
End of operation interrupt enable
Definition at line 7822 of file stm32f10x.h.
#define FLASH_CR_ERRIE ((uint16_t)0x0400) |
Error Interrupt Enable
Definition at line 7821 of file stm32f10x.h.
#define FLASH_CR_LOCK ((uint16_t)0x0080) |
Lock
Definition at line 7819 of file stm32f10x.h.
#define FLASH_CR_MER ((uint16_t)0x0004) |
Mass Erase
Definition at line 7815 of file stm32f10x.h.
#define FLASH_CR_OPTER ((uint16_t)0x0020) |
Option Byte Erase
Definition at line 7817 of file stm32f10x.h.
#define FLASH_CR_OPTPG ((uint16_t)0x0010) |
Option Byte Programming
Definition at line 7816 of file stm32f10x.h.
#define FLASH_CR_OPTWRE ((uint16_t)0x0200) |
Option Bytes Write Enable
Definition at line 7820 of file stm32f10x.h.
#define FLASH_CR_PER ((uint16_t)0x0002) |
Page Erase
Definition at line 7814 of file stm32f10x.h.
#define FLASH_CR_PG ((uint16_t)0x0001) |
Programming
Definition at line 7813 of file stm32f10x.h.
#define FLASH_CR_STRT ((uint16_t)0x0040) |
Start
Definition at line 7818 of file stm32f10x.h.
#define FLASH_Data0_Data0 ((uint32_t)0x000000FF) |
User data storage option byte
Definition at line 7851 of file stm32f10x.h.
#define FLASH_Data0_nData0 ((uint32_t)0x0000FF00) |
User data storage complemented option byte
Definition at line 7852 of file stm32f10x.h.
#define FLASH_Data1_Data1 ((uint32_t)0x00FF0000) |
User data storage option byte
Definition at line 7855 of file stm32f10x.h.
#define FLASH_Data1_nData1 ((uint32_t)0xFF000000) |
User data storage complemented option byte
Definition at line 7856 of file stm32f10x.h.
#define FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) |
FPEC Key
Definition at line 7801 of file stm32f10x.h.
#define FLASH_OBR_BFB2 ((uint16_t)0x0020) |
BFB2
Definition at line 7835 of file stm32f10x.h.
#define FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) |
nRST_STDBY
Definition at line 7834 of file stm32f10x.h.
#define FLASH_OBR_nRST_STOP ((uint16_t)0x0008) |
nRST_STOP
Definition at line 7833 of file stm32f10x.h.
#define FLASH_OBR_OPTERR ((uint16_t)0x0001) |
Option Byte Error
Definition at line 7828 of file stm32f10x.h.
#define FLASH_OBR_RDPRT ((uint16_t)0x0002) |
Read protection
Definition at line 7829 of file stm32f10x.h.
#define FLASH_OBR_USER ((uint16_t)0x03FC) |
User Option Bytes
Definition at line 7831 of file stm32f10x.h.
#define FLASH_OBR_WDG_SW ((uint16_t)0x0004) |
WDG_SW
Definition at line 7832 of file stm32f10x.h.
#define FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF) |
Option Byte Key
Definition at line 7804 of file stm32f10x.h.
#define FLASH_RDP_nRDP ((uint32_t)0x0000FF00) |
Read protection complemented option byte
Definition at line 7844 of file stm32f10x.h.
#define FLASH_RDP_RDP ((uint32_t)0x000000FF) |
Read protection option byte
Definition at line 7843 of file stm32f10x.h.
#define FLASH_SR_BSY ((uint8_t)0x01) |
Busy
Definition at line 7807 of file stm32f10x.h.
#define FLASH_SR_EOP ((uint8_t)0x20) |
End of operation
Definition at line 7810 of file stm32f10x.h.
#define FLASH_SR_PGERR ((uint8_t)0x04) |
Programming Error
Definition at line 7808 of file stm32f10x.h.
#define FLASH_SR_WRPRTERR ((uint8_t)0x10) |
Write Protection Error
Definition at line 7809 of file stm32f10x.h.
#define FLASH_USER_nUSER ((uint32_t)0xFF000000) |
User complemented option byte
Definition at line 7848 of file stm32f10x.h.
#define FLASH_USER_USER ((uint32_t)0x00FF0000) |
User option byte
Definition at line 7847 of file stm32f10x.h.
#define FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00) |
Flash memory write protection complemented option bytes
Definition at line 7860 of file stm32f10x.h.
#define FLASH_WRP0_WRP0 ((uint32_t)0x000000FF) |
Flash memory write protection option bytes
Definition at line 7859 of file stm32f10x.h.
#define FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000) |
Flash memory write protection complemented option bytes
Definition at line 7864 of file stm32f10x.h.
#define FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000) |
Flash memory write protection option bytes
Definition at line 7863 of file stm32f10x.h.
#define FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00) |
Flash memory write protection complemented option bytes
Definition at line 7868 of file stm32f10x.h.
#define FLASH_WRP2_WRP2 ((uint32_t)0x000000FF) |
Flash memory write protection option bytes
Definition at line 7867 of file stm32f10x.h.
#define FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000) |
Flash memory write protection complemented option bytes
Definition at line 7872 of file stm32f10x.h.
#define FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000) |
Flash memory write protection option bytes
Definition at line 7871 of file stm32f10x.h.
#define FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF) |
Write Protect
Definition at line 7838 of file stm32f10x.h.
#define FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) |
Asynchronous wait
Definition at line 4604 of file stm32f10x.h.
#define FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) |
Burst enable bit
Definition at line 4597 of file stm32f10x.h.
#define FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) |
Write burst enable
Definition at line 4605 of file stm32f10x.h.
#define FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) |
Extended mode enable
Definition at line 4603 of file stm32f10x.h.
#define FSMC_BCR1_FACCEN ((uint32_t)0x00000040) |
Flash access enable
Definition at line 4596 of file stm32f10x.h.
#define FSMC_BCR1_MBKEN ((uint32_t)0x00000001) |
Memory bank enable bit
Definition at line 4585 of file stm32f10x.h.
#define FSMC_BCR1_MTYP ((uint32_t)0x0000000C) |
MTYP[1:0] bits (Memory type)
Definition at line 4588 of file stm32f10x.h.
#define FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 4589 of file stm32f10x.h.
#define FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 4590 of file stm32f10x.h.
#define FSMC_BCR1_MUXEN ((uint32_t)0x00000002) |
Address/data multiplexing enable bit
Definition at line 4586 of file stm32f10x.h.
#define FSMC_BCR1_MWID ((uint32_t)0x00000030) |
MWID[1:0] bits (Memory data bus width)
Definition at line 4592 of file stm32f10x.h.
#define FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4593 of file stm32f10x.h.
#define FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4594 of file stm32f10x.h.
#define FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) |
Wait timing configuration
Definition at line 4600 of file stm32f10x.h.
#define FSMC_BCR1_WAITEN ((uint32_t)0x00002000) |
Wait enable bit
Definition at line 4602 of file stm32f10x.h.
#define FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) |
Wait signal polarity bit
Definition at line 4598 of file stm32f10x.h.
#define FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) |
Wrapped burst mode support
Definition at line 4599 of file stm32f10x.h.
#define FSMC_BCR1_WREN ((uint32_t)0x00001000) |
Write enable bit
Definition at line 4601 of file stm32f10x.h.
#define FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) |
Asynchronous wait
Definition at line 4627 of file stm32f10x.h.
#define FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) |
Burst enable bit
Definition at line 4620 of file stm32f10x.h.
#define FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) |
Write burst enable
Definition at line 4628 of file stm32f10x.h.
#define FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) |
Extended mode enable
Definition at line 4626 of file stm32f10x.h.
#define FSMC_BCR2_FACCEN ((uint32_t)0x00000040) |
Flash access enable
Definition at line 4619 of file stm32f10x.h.
#define FSMC_BCR2_MBKEN ((uint32_t)0x00000001) |
Memory bank enable bit
Definition at line 4608 of file stm32f10x.h.
#define FSMC_BCR2_MTYP ((uint32_t)0x0000000C) |
MTYP[1:0] bits (Memory type)
Definition at line 4611 of file stm32f10x.h.
#define FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 4612 of file stm32f10x.h.
#define FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 4613 of file stm32f10x.h.
#define FSMC_BCR2_MUXEN ((uint32_t)0x00000002) |
Address/data multiplexing enable bit
Definition at line 4609 of file stm32f10x.h.
#define FSMC_BCR2_MWID ((uint32_t)0x00000030) |
MWID[1:0] bits (Memory data bus width)
Definition at line 4615 of file stm32f10x.h.
#define FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4616 of file stm32f10x.h.
#define FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4617 of file stm32f10x.h.
#define FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) |
Wait timing configuration
Definition at line 4623 of file stm32f10x.h.
#define FSMC_BCR2_WAITEN ((uint32_t)0x00002000) |
Wait enable bit
Definition at line 4625 of file stm32f10x.h.
#define FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) |
Wait signal polarity bit
Definition at line 4621 of file stm32f10x.h.
#define FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) |
Wrapped burst mode support
Definition at line 4622 of file stm32f10x.h.
#define FSMC_BCR2_WREN ((uint32_t)0x00001000) |
Write enable bit
Definition at line 4624 of file stm32f10x.h.
#define FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) |
Asynchronous wait
Definition at line 4650 of file stm32f10x.h.
#define FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) |
Burst enable bit
Definition at line 4643 of file stm32f10x.h.
#define FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) |
Write burst enable
Definition at line 4651 of file stm32f10x.h.
#define FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) |
Extended mode enable
Definition at line 4649 of file stm32f10x.h.
#define FSMC_BCR3_FACCEN ((uint32_t)0x00000040) |
Flash access enable
Definition at line 4642 of file stm32f10x.h.
#define FSMC_BCR3_MBKEN ((uint32_t)0x00000001) |
Memory bank enable bit
Definition at line 4631 of file stm32f10x.h.
#define FSMC_BCR3_MTYP ((uint32_t)0x0000000C) |
MTYP[1:0] bits (Memory type)
Definition at line 4634 of file stm32f10x.h.
#define FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 4635 of file stm32f10x.h.
#define FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 4636 of file stm32f10x.h.
#define FSMC_BCR3_MUXEN ((uint32_t)0x00000002) |
Address/data multiplexing enable bit
Definition at line 4632 of file stm32f10x.h.
#define FSMC_BCR3_MWID ((uint32_t)0x00000030) |
MWID[1:0] bits (Memory data bus width)
Definition at line 4638 of file stm32f10x.h.
#define FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4639 of file stm32f10x.h.
#define FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4640 of file stm32f10x.h.
#define FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) |
Wait timing configuration
Definition at line 4646 of file stm32f10x.h.
#define FSMC_BCR3_WAITEN ((uint32_t)0x00002000) |
Wait enable bit
Definition at line 4648 of file stm32f10x.h.
#define FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) |
Wait signal polarity bit.
Definition at line 4644 of file stm32f10x.h.
#define FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) |
Wrapped burst mode support
Definition at line 4645 of file stm32f10x.h.
#define FSMC_BCR3_WREN ((uint32_t)0x00001000) |
Write enable bit
Definition at line 4647 of file stm32f10x.h.
#define FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) |
Asynchronous wait
Definition at line 4673 of file stm32f10x.h.
#define FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) |
Burst enable bit
Definition at line 4666 of file stm32f10x.h.
#define FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) |
Write burst enable
Definition at line 4674 of file stm32f10x.h.
#define FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) |
Extended mode enable
Definition at line 4672 of file stm32f10x.h.
#define FSMC_BCR4_FACCEN ((uint32_t)0x00000040) |
Flash access enable
Definition at line 4665 of file stm32f10x.h.
#define FSMC_BCR4_MBKEN ((uint32_t)0x00000001) |
Memory bank enable bit
Definition at line 4654 of file stm32f10x.h.
#define FSMC_BCR4_MTYP ((uint32_t)0x0000000C) |
MTYP[1:0] bits (Memory type)
Definition at line 4657 of file stm32f10x.h.
#define FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 4658 of file stm32f10x.h.
#define FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 4659 of file stm32f10x.h.
#define FSMC_BCR4_MUXEN ((uint32_t)0x00000002) |
Address/data multiplexing enable bit
Definition at line 4655 of file stm32f10x.h.
#define FSMC_BCR4_MWID ((uint32_t)0x00000030) |
MWID[1:0] bits (Memory data bus width)
Definition at line 4661 of file stm32f10x.h.
#define FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4662 of file stm32f10x.h.
#define FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4663 of file stm32f10x.h.
#define FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) |
Wait timing configuration
Definition at line 4669 of file stm32f10x.h.
#define FSMC_BCR4_WAITEN ((uint32_t)0x00002000) |
Wait enable bit
Definition at line 4671 of file stm32f10x.h.
#define FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) |
Wait signal polarity bit
Definition at line 4667 of file stm32f10x.h.
#define FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) |
Wrapped burst mode support
Definition at line 4668 of file stm32f10x.h.
#define FSMC_BCR4_WREN ((uint32_t)0x00001000) |
Write enable bit
Definition at line 4670 of file stm32f10x.h.
#define FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4713 of file stm32f10x.h.
#define FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4714 of file stm32f10x.h.
#define FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4715 of file stm32f10x.h.
#define FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4683 of file stm32f10x.h.
#define FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4684 of file stm32f10x.h.
#define FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4685 of file stm32f10x.h.
#define FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4686 of file stm32f10x.h.
#define FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4687 of file stm32f10x.h.
#define FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4677 of file stm32f10x.h.
#define FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4678 of file stm32f10x.h.
#define FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4679 of file stm32f10x.h.
#define FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4680 of file stm32f10x.h.
#define FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4681 of file stm32f10x.h.
#define FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) |
BUSTURN[3:0] bits (Bus turnaround phase duration)
Definition at line 4695 of file stm32f10x.h.
#define FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 4696 of file stm32f10x.h.
#define FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 4697 of file stm32f10x.h.
#define FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 4698 of file stm32f10x.h.
#define FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 4699 of file stm32f10x.h.
#define FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4701 of file stm32f10x.h.
#define FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4702 of file stm32f10x.h.
#define FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4703 of file stm32f10x.h.
#define FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4704 of file stm32f10x.h.
#define FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4705 of file stm32f10x.h.
#define FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4689 of file stm32f10x.h.
#define FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4690 of file stm32f10x.h.
#define FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4691 of file stm32f10x.h.
#define FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4692 of file stm32f10x.h.
#define FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4693 of file stm32f10x.h.
#define FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4707 of file stm32f10x.h.
#define FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4708 of file stm32f10x.h.
#define FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4709 of file stm32f10x.h.
#define FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4710 of file stm32f10x.h.
#define FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4711 of file stm32f10x.h.
#define FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4754 of file stm32f10x.h.
#define FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4755 of file stm32f10x.h.
#define FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4756 of file stm32f10x.h.
#define FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4724 of file stm32f10x.h.
#define FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4725 of file stm32f10x.h.
#define FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4726 of file stm32f10x.h.
#define FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4727 of file stm32f10x.h.
#define FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4728 of file stm32f10x.h.
#define FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4718 of file stm32f10x.h.
#define FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4719 of file stm32f10x.h.
#define FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4720 of file stm32f10x.h.
#define FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4721 of file stm32f10x.h.
#define FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4722 of file stm32f10x.h.
#define FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) |
BUSTURN[3:0] bits (Bus turnaround phase duration)
Definition at line 4736 of file stm32f10x.h.
#define FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 4737 of file stm32f10x.h.
#define FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 4738 of file stm32f10x.h.
#define FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 4739 of file stm32f10x.h.
#define FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 4740 of file stm32f10x.h.
#define FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4742 of file stm32f10x.h.
#define FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4743 of file stm32f10x.h.
#define FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4744 of file stm32f10x.h.
#define FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4745 of file stm32f10x.h.
#define FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4746 of file stm32f10x.h.
#define FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4730 of file stm32f10x.h.
#define FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4731 of file stm32f10x.h.
#define FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4732 of file stm32f10x.h.
#define FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4733 of file stm32f10x.h.
#define FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4734 of file stm32f10x.h.
#define FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4748 of file stm32f10x.h.
#define FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4749 of file stm32f10x.h.
#define FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4750 of file stm32f10x.h.
#define FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4751 of file stm32f10x.h.
#define FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4752 of file stm32f10x.h.
#define FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4795 of file stm32f10x.h.
#define FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4796 of file stm32f10x.h.
#define FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4797 of file stm32f10x.h.
#define FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4765 of file stm32f10x.h.
#define FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4766 of file stm32f10x.h.
#define FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4767 of file stm32f10x.h.
#define FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4768 of file stm32f10x.h.
#define FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4769 of file stm32f10x.h.
#define FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4759 of file stm32f10x.h.
#define FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4760 of file stm32f10x.h.
#define FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4761 of file stm32f10x.h.
#define FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4762 of file stm32f10x.h.
#define FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4763 of file stm32f10x.h.
#define FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) |
BUSTURN[3:0] bits (Bus turnaround phase duration)
Definition at line 4777 of file stm32f10x.h.
#define FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 4778 of file stm32f10x.h.
#define FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 4779 of file stm32f10x.h.
#define FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 4780 of file stm32f10x.h.
#define FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 4781 of file stm32f10x.h.
#define FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4783 of file stm32f10x.h.
#define FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4784 of file stm32f10x.h.
#define FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4785 of file stm32f10x.h.
#define FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4786 of file stm32f10x.h.
#define FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4787 of file stm32f10x.h.
#define FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4771 of file stm32f10x.h.
#define FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4772 of file stm32f10x.h.
#define FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4773 of file stm32f10x.h.
#define FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4774 of file stm32f10x.h.
#define FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4775 of file stm32f10x.h.
#define FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4789 of file stm32f10x.h.
#define FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4790 of file stm32f10x.h.
#define FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4791 of file stm32f10x.h.
#define FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4792 of file stm32f10x.h.
#define FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4793 of file stm32f10x.h.
#define FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4836 of file stm32f10x.h.
#define FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4837 of file stm32f10x.h.
#define FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4838 of file stm32f10x.h.
#define FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4806 of file stm32f10x.h.
#define FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4807 of file stm32f10x.h.
#define FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4808 of file stm32f10x.h.
#define FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4809 of file stm32f10x.h.
#define FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4810 of file stm32f10x.h.
#define FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4800 of file stm32f10x.h.
#define FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4801 of file stm32f10x.h.
#define FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4802 of file stm32f10x.h.
#define FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4803 of file stm32f10x.h.
#define FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4804 of file stm32f10x.h.
#define FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) |
BUSTURN[3:0] bits (Bus turnaround phase duration)
Definition at line 4818 of file stm32f10x.h.
#define FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 4819 of file stm32f10x.h.
#define FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 4820 of file stm32f10x.h.
#define FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 4821 of file stm32f10x.h.
#define FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 4822 of file stm32f10x.h.
#define FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4824 of file stm32f10x.h.
#define FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4825 of file stm32f10x.h.
#define FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4826 of file stm32f10x.h.
#define FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4827 of file stm32f10x.h.
#define FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4828 of file stm32f10x.h.
#define FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4812 of file stm32f10x.h.
#define FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4813 of file stm32f10x.h.
#define FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4814 of file stm32f10x.h.
#define FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4815 of file stm32f10x.h.
#define FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4816 of file stm32f10x.h.
#define FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4830 of file stm32f10x.h.
#define FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4831 of file stm32f10x.h.
#define FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4832 of file stm32f10x.h.
#define FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4833 of file stm32f10x.h.
#define FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4834 of file stm32f10x.h.
#define FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4871 of file stm32f10x.h.
#define FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4872 of file stm32f10x.h.
#define FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4873 of file stm32f10x.h.
#define FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4847 of file stm32f10x.h.
#define FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4848 of file stm32f10x.h.
#define FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4849 of file stm32f10x.h.
#define FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4850 of file stm32f10x.h.
#define FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4851 of file stm32f10x.h.
#define FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4841 of file stm32f10x.h.
#define FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4842 of file stm32f10x.h.
#define FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4843 of file stm32f10x.h.
#define FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4844 of file stm32f10x.h.
#define FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4845 of file stm32f10x.h.
#define FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4859 of file stm32f10x.h.
#define FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4860 of file stm32f10x.h.
#define FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4861 of file stm32f10x.h.
#define FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4862 of file stm32f10x.h.
#define FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4863 of file stm32f10x.h.
#define FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4853 of file stm32f10x.h.
#define FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4854 of file stm32f10x.h.
#define FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4855 of file stm32f10x.h.
#define FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4856 of file stm32f10x.h.
#define FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4857 of file stm32f10x.h.
#define FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4865 of file stm32f10x.h.
#define FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4866 of file stm32f10x.h.
#define FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4867 of file stm32f10x.h.
#define FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4868 of file stm32f10x.h.
#define FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4869 of file stm32f10x.h.
#define FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4906 of file stm32f10x.h.
#define FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4907 of file stm32f10x.h.
#define FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4908 of file stm32f10x.h.
#define FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4882 of file stm32f10x.h.
#define FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4883 of file stm32f10x.h.
#define FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4884 of file stm32f10x.h.
#define FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4885 of file stm32f10x.h.
#define FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4886 of file stm32f10x.h.
#define FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4876 of file stm32f10x.h.
#define FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4877 of file stm32f10x.h.
#define FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4878 of file stm32f10x.h.
#define FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4879 of file stm32f10x.h.
#define FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4880 of file stm32f10x.h.
#define FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4894 of file stm32f10x.h.
#define FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4895 of file stm32f10x.h.
#define FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4896 of file stm32f10x.h.
#define FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4897 of file stm32f10x.h.
#define FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4898 of file stm32f10x.h.
#define FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4888 of file stm32f10x.h.
#define FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4889 of file stm32f10x.h.
#define FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4890 of file stm32f10x.h.
#define FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4891 of file stm32f10x.h.
#define FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4892 of file stm32f10x.h.
#define FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4900 of file stm32f10x.h.
#define FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4901 of file stm32f10x.h.
#define FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4902 of file stm32f10x.h.
#define FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4903 of file stm32f10x.h.
#define FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4904 of file stm32f10x.h.
#define FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4941 of file stm32f10x.h.
#define FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4942 of file stm32f10x.h.
#define FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4943 of file stm32f10x.h.
#define FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4917 of file stm32f10x.h.
#define FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4918 of file stm32f10x.h.
#define FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4919 of file stm32f10x.h.
#define FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4920 of file stm32f10x.h.
#define FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4921 of file stm32f10x.h.
#define FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4911 of file stm32f10x.h.
#define FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4912 of file stm32f10x.h.
#define FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4913 of file stm32f10x.h.
#define FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4914 of file stm32f10x.h.
#define FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4915 of file stm32f10x.h.
#define FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4929 of file stm32f10x.h.
#define FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4930 of file stm32f10x.h.
#define FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4931 of file stm32f10x.h.
#define FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4932 of file stm32f10x.h.
#define FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4933 of file stm32f10x.h.
#define FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4923 of file stm32f10x.h.
#define FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4924 of file stm32f10x.h.
#define FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4925 of file stm32f10x.h.
#define FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4926 of file stm32f10x.h.
#define FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4927 of file stm32f10x.h.
#define FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4935 of file stm32f10x.h.
#define FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4936 of file stm32f10x.h.
#define FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4937 of file stm32f10x.h.
#define FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4938 of file stm32f10x.h.
#define FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4939 of file stm32f10x.h.
#define FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) |
ACCMOD[1:0] bits (Access mode)
Definition at line 4976 of file stm32f10x.h.
#define FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 4977 of file stm32f10x.h.
#define FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 4978 of file stm32f10x.h.
#define FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) |
ADDHLD[3:0] bits (Address-hold phase duration)
Definition at line 4952 of file stm32f10x.h.
#define FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4953 of file stm32f10x.h.
#define FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4954 of file stm32f10x.h.
#define FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 4955 of file stm32f10x.h.
#define FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 4956 of file stm32f10x.h.
#define FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) |
ADDSET[3:0] bits (Address setup phase duration)
Definition at line 4946 of file stm32f10x.h.
#define FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 4947 of file stm32f10x.h.
#define FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 4948 of file stm32f10x.h.
#define FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 4949 of file stm32f10x.h.
#define FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 4950 of file stm32f10x.h.
#define FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000) |
CLKDIV[3:0] bits (Clock divide ratio)
Definition at line 4964 of file stm32f10x.h.
#define FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 4965 of file stm32f10x.h.
#define FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 4966 of file stm32f10x.h.
#define FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000) |
Bit 2
Definition at line 4967 of file stm32f10x.h.
#define FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000) |
Bit 3
Definition at line 4968 of file stm32f10x.h.
#define FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) |
DATAST [3:0] bits (Data-phase duration)
Definition at line 4958 of file stm32f10x.h.
#define FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 4959 of file stm32f10x.h.
#define FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 4960 of file stm32f10x.h.
#define FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 4961 of file stm32f10x.h.
#define FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 4962 of file stm32f10x.h.
#define FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000) |
DATLA[3:0] bits (Data latency)
Definition at line 4970 of file stm32f10x.h.
#define FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 4971 of file stm32f10x.h.
#define FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 4972 of file stm32f10x.h.
#define FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 4973 of file stm32f10x.h.
#define FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 4974 of file stm32f10x.h.
#define FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) |
ECC result
Definition at line 5379 of file stm32f10x.h.
#define FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) |
ECC result
Definition at line 5382 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) |
ATTHIZ2[7:0] bits (Attribute memory 2 databus HiZ time)
Definition at line 5245 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5246 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5247 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5248 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5249 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5250 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5251 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5252 of file stm32f10x.h.
#define FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5253 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) |
ATTHOLD2[7:0] bits (Attribute memory 2 hold time)
Definition at line 5235 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5236 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5237 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5238 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5239 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5240 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5241 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5242 of file stm32f10x.h.
#define FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5243 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) |
ATTSET2[7:0] bits (Attribute memory 2 setup time)
Definition at line 5215 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5216 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5217 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5218 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5219 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5220 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5221 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5222 of file stm32f10x.h.
#define FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5223 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) |
ATTWAIT2[7:0] bits (Attribute memory 2 wait time)
Definition at line 5225 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5226 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5227 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5228 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5229 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5230 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5231 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5232 of file stm32f10x.h.
#define FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5233 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) |
ATTHIZ3[7:0] bits (Attribute memory 3 databus HiZ time)
Definition at line 5286 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5287 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5288 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5289 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5290 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5291 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5292 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5293 of file stm32f10x.h.
#define FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5294 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) |
ATTHOLD3[7:0] bits (Attribute memory 3 hold time)
Definition at line 5276 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5277 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5278 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5279 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5280 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5281 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5282 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5283 of file stm32f10x.h.
#define FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5284 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) |
ATTSET3[7:0] bits (Attribute memory 3 setup time)
Definition at line 5256 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5257 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5258 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5259 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5260 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5261 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5262 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5263 of file stm32f10x.h.
#define FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5264 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) |
ATTWAIT3[7:0] bits (Attribute memory 3 wait time)
Definition at line 5266 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5267 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5268 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5269 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5270 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5271 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5272 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5273 of file stm32f10x.h.
#define FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5274 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) |
ATTHIZ4[7:0] bits (Attribute memory 4 databus HiZ time)
Definition at line 5327 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5328 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5329 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5330 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5331 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5332 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5333 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5334 of file stm32f10x.h.
#define FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5335 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) |
ATTHOLD4[7:0] bits (Attribute memory 4 hold time)
Definition at line 5317 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5318 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5319 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5320 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5321 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5322 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5323 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5324 of file stm32f10x.h.
#define FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5325 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) |
ATTSET4[7:0] bits (Attribute memory 4 setup time)
Definition at line 5297 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5298 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5299 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5300 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5301 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5302 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5303 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5304 of file stm32f10x.h.
#define FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5305 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) |
ATTWAIT4[7:0] bits (Attribute memory 4 wait time)
Definition at line 5307 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5308 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5309 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5310 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5311 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5312 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5313 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5314 of file stm32f10x.h.
#define FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5315 of file stm32f10x.h.
#define FSMC_PCR2_ECCEN ((uint32_t)0x00000040) |
ECC computation logic enable bit
Definition at line 4989 of file stm32f10x.h.
#define FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) |
ECCPS[1:0] bits (ECC page size)
Definition at line 5003 of file stm32f10x.h.
#define FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) |
Bit 0
Definition at line 5004 of file stm32f10x.h.
#define FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) |
Bit 1
Definition at line 5005 of file stm32f10x.h.
#define FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) |
Bit 2
Definition at line 5006 of file stm32f10x.h.
#define FSMC_PCR2_PBKEN ((uint32_t)0x00000004) |
PC Card/NAND Flash memory bank enable bit
Definition at line 4982 of file stm32f10x.h.
#define FSMC_PCR2_PTYP ((uint32_t)0x00000008) |
Memory type
Definition at line 4983 of file stm32f10x.h.
#define FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) |
Wait feature enable bit
Definition at line 4981 of file stm32f10x.h.
#define FSMC_PCR2_PWID ((uint32_t)0x00000030) |
PWID[1:0] bits (NAND Flash databus width)
Definition at line 4985 of file stm32f10x.h.
#define FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 4986 of file stm32f10x.h.
#define FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 4987 of file stm32f10x.h.
#define FSMC_PCR2_TAR ((uint32_t)0x0001E000) |
TAR[3:0] bits (ALE to RE delay)
Definition at line 4997 of file stm32f10x.h.
#define FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) |
Bit 0
Definition at line 4998 of file stm32f10x.h.
#define FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) |
Bit 1
Definition at line 4999 of file stm32f10x.h.
#define FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) |
Bit 2
Definition at line 5000 of file stm32f10x.h.
#define FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) |
Bit 3
Definition at line 5001 of file stm32f10x.h.
#define FSMC_PCR2_TCLR ((uint32_t)0x00001E00) |
TCLR[3:0] bits (CLE to RE delay)
Definition at line 4991 of file stm32f10x.h.
#define FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) |
Bit 0
Definition at line 4992 of file stm32f10x.h.
#define FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) |
Bit 1
Definition at line 4993 of file stm32f10x.h.
#define FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) |
Bit 2
Definition at line 4994 of file stm32f10x.h.
#define FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) |
Bit 3
Definition at line 4995 of file stm32f10x.h.
#define FSMC_PCR3_ECCEN ((uint32_t)0x00000040) |
ECC computation logic enable bit
Definition at line 5017 of file stm32f10x.h.
#define FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) |
ECCPS[2:0] bits (ECC page size)
Definition at line 5031 of file stm32f10x.h.
#define FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) |
Bit 0
Definition at line 5032 of file stm32f10x.h.
#define FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) |
Bit 1
Definition at line 5033 of file stm32f10x.h.
#define FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) |
Bit 2
Definition at line 5034 of file stm32f10x.h.
#define FSMC_PCR3_PBKEN ((uint32_t)0x00000004) |
PC Card/NAND Flash memory bank enable bit
Definition at line 5010 of file stm32f10x.h.
#define FSMC_PCR3_PTYP ((uint32_t)0x00000008) |
Memory type
Definition at line 5011 of file stm32f10x.h.
#define FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) |
Wait feature enable bit
Definition at line 5009 of file stm32f10x.h.
#define FSMC_PCR3_PWID ((uint32_t)0x00000030) |
PWID[1:0] bits (NAND Flash databus width)
Definition at line 5013 of file stm32f10x.h.
#define FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 5014 of file stm32f10x.h.
#define FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 5015 of file stm32f10x.h.
#define FSMC_PCR3_TAR ((uint32_t)0x0001E000) |
TAR[3:0] bits (ALE to RE delay)
Definition at line 5025 of file stm32f10x.h.
#define FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) |
Bit 0
Definition at line 5026 of file stm32f10x.h.
#define FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) |
Bit 1
Definition at line 5027 of file stm32f10x.h.
#define FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) |
Bit 2
Definition at line 5028 of file stm32f10x.h.
#define FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) |
Bit 3
Definition at line 5029 of file stm32f10x.h.
#define FSMC_PCR3_TCLR ((uint32_t)0x00001E00) |
TCLR[3:0] bits (CLE to RE delay)
Definition at line 5019 of file stm32f10x.h.
#define FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) |
Bit 0
Definition at line 5020 of file stm32f10x.h.
#define FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) |
Bit 1
Definition at line 5021 of file stm32f10x.h.
#define FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) |
Bit 2
Definition at line 5022 of file stm32f10x.h.
#define FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) |
Bit 3
Definition at line 5023 of file stm32f10x.h.
#define FSMC_PCR4_ECCEN ((uint32_t)0x00000040) |
ECC computation logic enable bit
Definition at line 5045 of file stm32f10x.h.
#define FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) |
ECCPS[2:0] bits (ECC page size)
Definition at line 5059 of file stm32f10x.h.
#define FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) |
Bit 0
Definition at line 5060 of file stm32f10x.h.
#define FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) |
Bit 1
Definition at line 5061 of file stm32f10x.h.
#define FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) |
Bit 2
Definition at line 5062 of file stm32f10x.h.
#define FSMC_PCR4_PBKEN ((uint32_t)0x00000004) |
PC Card/NAND Flash memory bank enable bit
Definition at line 5038 of file stm32f10x.h.
#define FSMC_PCR4_PTYP ((uint32_t)0x00000008) |
Memory type
Definition at line 5039 of file stm32f10x.h.
#define FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) |
Wait feature enable bit
Definition at line 5037 of file stm32f10x.h.
#define FSMC_PCR4_PWID ((uint32_t)0x00000030) |
PWID[1:0] bits (NAND Flash databus width)
Definition at line 5041 of file stm32f10x.h.
#define FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 5042 of file stm32f10x.h.
#define FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 5043 of file stm32f10x.h.
#define FSMC_PCR4_TAR ((uint32_t)0x0001E000) |
TAR[3:0] bits (ALE to RE delay)
Definition at line 5053 of file stm32f10x.h.
#define FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) |
Bit 0
Definition at line 5054 of file stm32f10x.h.
#define FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) |
Bit 1
Definition at line 5055 of file stm32f10x.h.
#define FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) |
Bit 2
Definition at line 5056 of file stm32f10x.h.
#define FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) |
Bit 3
Definition at line 5057 of file stm32f10x.h.
#define FSMC_PCR4_TCLR ((uint32_t)0x00001E00) |
TCLR[3:0] bits (CLE to RE delay)
Definition at line 5047 of file stm32f10x.h.
#define FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) |
Bit 0
Definition at line 5048 of file stm32f10x.h.
#define FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) |
Bit 1
Definition at line 5049 of file stm32f10x.h.
#define FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) |
Bit 2
Definition at line 5050 of file stm32f10x.h.
#define FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) |
Bit 3
Definition at line 5051 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) |
IOHIZ4[7:0] bits (I/O 4 databus HiZ time)
Definition at line 5368 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5369 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5370 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5371 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5372 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5373 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5374 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5375 of file stm32f10x.h.
#define FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5376 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) |
IOHOLD4[7:0] bits (I/O 4 hold time)
Definition at line 5358 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5359 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5360 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5361 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5362 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5363 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5364 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5365 of file stm32f10x.h.
#define FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5366 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) |
IOSET4[7:0] bits (I/O 4 setup time)
Definition at line 5338 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5339 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5340 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5341 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5342 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5343 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5344 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5345 of file stm32f10x.h.
#define FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5346 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) |
IOWAIT4[7:0] bits (I/O 4 wait time)
Definition at line 5348 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5349 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5350 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5351 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5352 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5353 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5354 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5355 of file stm32f10x.h.
#define FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5356 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) |
MEMHIZ2[7:0] bits (Common memory 2 databus HiZ time)
Definition at line 5122 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5123 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5124 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5125 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5126 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5127 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5128 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5129 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5130 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) |
MEMHOLD2[7:0] bits (Common memory 2 hold time)
Definition at line 5112 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5113 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5114 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5115 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5116 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5117 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5118 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5119 of file stm32f10x.h.
#define FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5120 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) |
MEMSET2[7:0] bits (Common memory 2 setup time)
Definition at line 5092 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5093 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5094 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5095 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5096 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5097 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5098 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5099 of file stm32f10x.h.
#define FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5100 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) |
MEMWAIT2[7:0] bits (Common memory 2 wait time)
Definition at line 5102 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5103 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5104 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5105 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5106 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5107 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5108 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5109 of file stm32f10x.h.
#define FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5110 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) |
MEMHIZ3[7:0] bits (Common memory 3 databus HiZ time)
Definition at line 5163 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5164 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5165 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5166 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5167 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5168 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5169 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5170 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5171 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) |
MEMHOLD3[7:0] bits (Common memory 3 hold time)
Definition at line 5153 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5154 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5155 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5156 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5157 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5158 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5159 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5160 of file stm32f10x.h.
#define FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5161 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) |
MEMSET3[7:0] bits (Common memory 3 setup time)
Definition at line 5133 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5134 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5135 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5136 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5137 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5138 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5139 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5140 of file stm32f10x.h.
#define FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5141 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) |
MEMWAIT3[7:0] bits (Common memory 3 wait time)
Definition at line 5143 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5144 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5145 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5146 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5147 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5148 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5149 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5150 of file stm32f10x.h.
#define FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5151 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) |
MEMHIZ4[7:0] bits (Common memory 4 databus HiZ time)
Definition at line 5204 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 5205 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 5206 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 5207 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) |
Bit 3
Definition at line 5208 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) |
Bit 4
Definition at line 5209 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) |
Bit 5
Definition at line 5210 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) |
Bit 6
Definition at line 5211 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) |
Bit 7
Definition at line 5212 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) |
MEMHOLD4[7:0] bits (Common memory 4 hold time)
Definition at line 5194 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 5195 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 5196 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) |
Bit 2
Definition at line 5197 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) |
Bit 3
Definition at line 5198 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) |
Bit 4
Definition at line 5199 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) |
Bit 5
Definition at line 5200 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) |
Bit 6
Definition at line 5201 of file stm32f10x.h.
#define FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) |
Bit 7
Definition at line 5202 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) |
MEMSET4[7:0] bits (Common memory 4 setup time)
Definition at line 5174 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 5175 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 5176 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) |
Bit 2
Definition at line 5177 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) |
Bit 3
Definition at line 5178 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) |
Bit 4
Definition at line 5179 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) |
Bit 5
Definition at line 5180 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) |
Bit 6
Definition at line 5181 of file stm32f10x.h.
#define FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) |
Bit 7
Definition at line 5182 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) |
MEMWAIT4[7:0] bits (Common memory 4 wait time)
Definition at line 5184 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 5185 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 5186 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 5187 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) |
Bit 3
Definition at line 5188 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) |
Bit 4
Definition at line 5189 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) |
Bit 5
Definition at line 5190 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) |
Bit 6
Definition at line 5191 of file stm32f10x.h.
#define FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) |
Bit 7
Definition at line 5192 of file stm32f10x.h.
#define FSMC_SR2_FEMPT ((uint8_t)0x40) |
FIFO empty
Definition at line 5071 of file stm32f10x.h.
#define FSMC_SR2_IFEN ((uint8_t)0x20) |
Interrupt Falling Edge detection Enable bit
Definition at line 5070 of file stm32f10x.h.
#define FSMC_SR2_IFS ((uint8_t)0x04) |
Interrupt Falling Edge status
Definition at line 5067 of file stm32f10x.h.
#define FSMC_SR2_ILEN ((uint8_t)0x10) |
Interrupt Level detection Enable bit
Definition at line 5069 of file stm32f10x.h.
#define FSMC_SR2_ILS ((uint8_t)0x02) |
Interrupt Level status
Definition at line 5066 of file stm32f10x.h.
#define FSMC_SR2_IREN ((uint8_t)0x08) |
Interrupt Rising Edge detection Enable bit
Definition at line 5068 of file stm32f10x.h.
#define FSMC_SR2_IRS ((uint8_t)0x01) |
Interrupt Rising Edge status
Definition at line 5065 of file stm32f10x.h.
#define FSMC_SR3_FEMPT ((uint8_t)0x40) |
FIFO empty
Definition at line 5080 of file stm32f10x.h.
#define FSMC_SR3_IFEN ((uint8_t)0x20) |
Interrupt Falling Edge detection Enable bit
Definition at line 5079 of file stm32f10x.h.
#define FSMC_SR3_IFS ((uint8_t)0x04) |
Interrupt Falling Edge status
Definition at line 5076 of file stm32f10x.h.
#define FSMC_SR3_ILEN ((uint8_t)0x10) |
Interrupt Level detection Enable bit
Definition at line 5078 of file stm32f10x.h.
#define FSMC_SR3_ILS ((uint8_t)0x02) |
Interrupt Level status
Definition at line 5075 of file stm32f10x.h.
#define FSMC_SR3_IREN ((uint8_t)0x08) |
Interrupt Rising Edge detection Enable bit
Definition at line 5077 of file stm32f10x.h.
#define FSMC_SR3_IRS ((uint8_t)0x01) |
Interrupt Rising Edge status
Definition at line 5074 of file stm32f10x.h.
#define FSMC_SR4_FEMPT ((uint8_t)0x40) |
FIFO empty
Definition at line 5089 of file stm32f10x.h.
#define FSMC_SR4_IFEN ((uint8_t)0x20) |
Interrupt Falling Edge detection Enable bit
Definition at line 5088 of file stm32f10x.h.
#define FSMC_SR4_IFS ((uint8_t)0x04) |
Interrupt Falling Edge status
Definition at line 5085 of file stm32f10x.h.
#define FSMC_SR4_ILEN ((uint8_t)0x10) |
Interrupt Level detection Enable bit
Definition at line 5087 of file stm32f10x.h.
#define FSMC_SR4_ILS ((uint8_t)0x02) |
Interrupt Level status
Definition at line 5084 of file stm32f10x.h.
#define FSMC_SR4_IREN ((uint8_t)0x08) |
Interrupt Rising Edge detection Enable bit
Definition at line 5086 of file stm32f10x.h.
#define FSMC_SR4_IRS ((uint8_t)0x01) |
Interrupt Rising Edge status
Definition at line 5083 of file stm32f10x.h.
#define GPIO_BRR_BR0 ((uint16_t)0x0001) |
Port x Reset bit 0
Definition at line 2517 of file stm32f10x.h.
#define GPIO_BRR_BR1 ((uint16_t)0x0002) |
Port x Reset bit 1
Definition at line 2518 of file stm32f10x.h.
#define GPIO_BRR_BR10 ((uint16_t)0x0400) |
Port x Reset bit 10
Definition at line 2527 of file stm32f10x.h.
#define GPIO_BRR_BR11 ((uint16_t)0x0800) |
Port x Reset bit 11
Definition at line 2528 of file stm32f10x.h.
#define GPIO_BRR_BR12 ((uint16_t)0x1000) |
Port x Reset bit 12
Definition at line 2529 of file stm32f10x.h.
#define GPIO_BRR_BR13 ((uint16_t)0x2000) |
Port x Reset bit 13
Definition at line 2530 of file stm32f10x.h.
#define GPIO_BRR_BR14 ((uint16_t)0x4000) |
Port x Reset bit 14
Definition at line 2531 of file stm32f10x.h.
#define GPIO_BRR_BR15 ((uint16_t)0x8000) |
Port x Reset bit 15
Definition at line 2532 of file stm32f10x.h.
#define GPIO_BRR_BR2 ((uint16_t)0x0004) |
Port x Reset bit 2
Definition at line 2519 of file stm32f10x.h.
#define GPIO_BRR_BR3 ((uint16_t)0x0008) |
Port x Reset bit 3
Definition at line 2520 of file stm32f10x.h.
#define GPIO_BRR_BR4 ((uint16_t)0x0010) |
Port x Reset bit 4
Definition at line 2521 of file stm32f10x.h.
#define GPIO_BRR_BR5 ((uint16_t)0x0020) |
Port x Reset bit 5
Definition at line 2522 of file stm32f10x.h.
#define GPIO_BRR_BR6 ((uint16_t)0x0040) |
Port x Reset bit 6
Definition at line 2523 of file stm32f10x.h.
#define GPIO_BRR_BR7 ((uint16_t)0x0080) |
Port x Reset bit 7
Definition at line 2524 of file stm32f10x.h.
#define GPIO_BRR_BR8 ((uint16_t)0x0100) |
Port x Reset bit 8
Definition at line 2525 of file stm32f10x.h.
#define GPIO_BRR_BR9 ((uint16_t)0x0200) |
Port x Reset bit 9
Definition at line 2526 of file stm32f10x.h.
#define GPIO_BSRR_BR0 ((uint32_t)0x00010000) |
Port x Reset bit 0
Definition at line 2499 of file stm32f10x.h.
#define GPIO_BSRR_BR1 ((uint32_t)0x00020000) |
Port x Reset bit 1
Definition at line 2500 of file stm32f10x.h.
#define GPIO_BSRR_BR10 ((uint32_t)0x04000000) |
Port x Reset bit 10
Definition at line 2509 of file stm32f10x.h.
#define GPIO_BSRR_BR11 ((uint32_t)0x08000000) |
Port x Reset bit 11
Definition at line 2510 of file stm32f10x.h.
#define GPIO_BSRR_BR12 ((uint32_t)0x10000000) |
Port x Reset bit 12
Definition at line 2511 of file stm32f10x.h.
#define GPIO_BSRR_BR13 ((uint32_t)0x20000000) |
Port x Reset bit 13
Definition at line 2512 of file stm32f10x.h.
#define GPIO_BSRR_BR14 ((uint32_t)0x40000000) |
Port x Reset bit 14
Definition at line 2513 of file stm32f10x.h.
#define GPIO_BSRR_BR15 ((uint32_t)0x80000000) |
Port x Reset bit 15
Definition at line 2514 of file stm32f10x.h.
#define GPIO_BSRR_BR2 ((uint32_t)0x00040000) |
Port x Reset bit 2
Definition at line 2501 of file stm32f10x.h.
#define GPIO_BSRR_BR3 ((uint32_t)0x00080000) |
Port x Reset bit 3
Definition at line 2502 of file stm32f10x.h.
#define GPIO_BSRR_BR4 ((uint32_t)0x00100000) |
Port x Reset bit 4
Definition at line 2503 of file stm32f10x.h.
#define GPIO_BSRR_BR5 ((uint32_t)0x00200000) |
Port x Reset bit 5
Definition at line 2504 of file stm32f10x.h.
#define GPIO_BSRR_BR6 ((uint32_t)0x00400000) |
Port x Reset bit 6
Definition at line 2505 of file stm32f10x.h.
#define GPIO_BSRR_BR7 ((uint32_t)0x00800000) |
Port x Reset bit 7
Definition at line 2506 of file stm32f10x.h.
#define GPIO_BSRR_BR8 ((uint32_t)0x01000000) |
Port x Reset bit 8
Definition at line 2507 of file stm32f10x.h.
#define GPIO_BSRR_BR9 ((uint32_t)0x02000000) |
Port x Reset bit 9
Definition at line 2508 of file stm32f10x.h.
#define GPIO_BSRR_BS0 ((uint32_t)0x00000001) |
Port x Set bit 0
Definition at line 2482 of file stm32f10x.h.
#define GPIO_BSRR_BS1 ((uint32_t)0x00000002) |
Port x Set bit 1
Definition at line 2483 of file stm32f10x.h.
#define GPIO_BSRR_BS10 ((uint32_t)0x00000400) |
Port x Set bit 10
Definition at line 2492 of file stm32f10x.h.
#define GPIO_BSRR_BS11 ((uint32_t)0x00000800) |
Port x Set bit 11
Definition at line 2493 of file stm32f10x.h.
#define GPIO_BSRR_BS12 ((uint32_t)0x00001000) |
Port x Set bit 12
Definition at line 2494 of file stm32f10x.h.
#define GPIO_BSRR_BS13 ((uint32_t)0x00002000) |
Port x Set bit 13
Definition at line 2495 of file stm32f10x.h.
#define GPIO_BSRR_BS14 ((uint32_t)0x00004000) |
Port x Set bit 14
Definition at line 2496 of file stm32f10x.h.
#define GPIO_BSRR_BS15 ((uint32_t)0x00008000) |
Port x Set bit 15
Definition at line 2497 of file stm32f10x.h.
#define GPIO_BSRR_BS2 ((uint32_t)0x00000004) |
Port x Set bit 2
Definition at line 2484 of file stm32f10x.h.
#define GPIO_BSRR_BS3 ((uint32_t)0x00000008) |
Port x Set bit 3
Definition at line 2485 of file stm32f10x.h.
#define GPIO_BSRR_BS4 ((uint32_t)0x00000010) |
Port x Set bit 4
Definition at line 2486 of file stm32f10x.h.
#define GPIO_BSRR_BS5 ((uint32_t)0x00000020) |
Port x Set bit 5
Definition at line 2487 of file stm32f10x.h.
#define GPIO_BSRR_BS6 ((uint32_t)0x00000040) |
Port x Set bit 6
Definition at line 2488 of file stm32f10x.h.
#define GPIO_BSRR_BS7 ((uint32_t)0x00000080) |
Port x Set bit 7
Definition at line 2489 of file stm32f10x.h.
#define GPIO_BSRR_BS8 ((uint32_t)0x00000100) |
Port x Set bit 8
Definition at line 2490 of file stm32f10x.h.
#define GPIO_BSRR_BS9 ((uint32_t)0x00000200) |
Port x Set bit 9
Definition at line 2491 of file stm32f10x.h.
#define GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) |
Port x configuration bits
Definition at line 2411 of file stm32f10x.h.
#define GPIO_CRH_CNF10 ((uint32_t)0x00000C00) |
CNF10[1:0] bits (Port x configuration bits, pin 10)
Definition at line 2421 of file stm32f10x.h.
#define GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 2422 of file stm32f10x.h.
#define GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 2423 of file stm32f10x.h.
#define GPIO_CRH_CNF11 ((uint32_t)0x0000C000) |
CNF11[1:0] bits (Port x configuration bits, pin 11)
Definition at line 2425 of file stm32f10x.h.
#define GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) |
Bit 0
Definition at line 2426 of file stm32f10x.h.
#define GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) |
Bit 1
Definition at line 2427 of file stm32f10x.h.
#define GPIO_CRH_CNF12 ((uint32_t)0x000C0000) |
CNF12[1:0] bits (Port x configuration bits, pin 12)
Definition at line 2429 of file stm32f10x.h.
#define GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) |
Bit 0
Definition at line 2430 of file stm32f10x.h.
#define GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) |
Bit 1
Definition at line 2431 of file stm32f10x.h.
#define GPIO_CRH_CNF13 ((uint32_t)0x00C00000) |
CNF13[1:0] bits (Port x configuration bits, pin 13)
Definition at line 2433 of file stm32f10x.h.
#define GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) |
Bit 0
Definition at line 2434 of file stm32f10x.h.
#define GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) |
Bit 1
Definition at line 2435 of file stm32f10x.h.
#define GPIO_CRH_CNF14 ((uint32_t)0x0C000000) |
CNF14[1:0] bits (Port x configuration bits, pin 14)
Definition at line 2437 of file stm32f10x.h.
#define GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 2438 of file stm32f10x.h.
#define GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 2439 of file stm32f10x.h.
#define GPIO_CRH_CNF15 ((uint32_t)0xC0000000) |
CNF15[1:0] bits (Port x configuration bits, pin 15)
Definition at line 2441 of file stm32f10x.h.
#define GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) |
Bit 0
Definition at line 2442 of file stm32f10x.h.
#define GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) |
Bit 1 ****************** Bit definition for GPIO_IDR register
Definition at line 2443 of file stm32f10x.h.
#define GPIO_CRH_CNF8 ((uint32_t)0x0000000C) |
CNF8[1:0] bits (Port x configuration bits, pin 8)
Definition at line 2413 of file stm32f10x.h.
#define GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 2414 of file stm32f10x.h.
#define GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 2415 of file stm32f10x.h.
#define GPIO_CRH_CNF9 ((uint32_t)0x000000C0) |
CNF9[1:0] bits (Port x configuration bits, pin 9)
Definition at line 2417 of file stm32f10x.h.
#define GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 2418 of file stm32f10x.h.
#define GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 2419 of file stm32f10x.h.
#define GPIO_CRH_MODE ((uint32_t)0x33333333) |
Port x mode bits
Definition at line 2377 of file stm32f10x.h.
#define GPIO_CRH_MODE10 ((uint32_t)0x00000300) |
MODE10[1:0] bits (Port x mode bits, pin 10)
Definition at line 2387 of file stm32f10x.h.
#define GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 2388 of file stm32f10x.h.
#define GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 2389 of file stm32f10x.h.
#define GPIO_CRH_MODE11 ((uint32_t)0x00003000) |
MODE11[1:0] bits (Port x mode bits, pin 11)
Definition at line 2391 of file stm32f10x.h.
#define GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) |
Bit 0
Definition at line 2392 of file stm32f10x.h.
#define GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) |
Bit 1
Definition at line 2393 of file stm32f10x.h.
#define GPIO_CRH_MODE12 ((uint32_t)0x00030000) |
MODE12[1:0] bits (Port x mode bits, pin 12)
Definition at line 2395 of file stm32f10x.h.
#define GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 2396 of file stm32f10x.h.
#define GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 2397 of file stm32f10x.h.
#define GPIO_CRH_MODE13 ((uint32_t)0x00300000) |
MODE13[1:0] bits (Port x mode bits, pin 13)
Definition at line 2399 of file stm32f10x.h.
#define GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 2400 of file stm32f10x.h.
#define GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 2401 of file stm32f10x.h.
#define GPIO_CRH_MODE14 ((uint32_t)0x03000000) |
MODE14[1:0] bits (Port x mode bits, pin 14)
Definition at line 2403 of file stm32f10x.h.
#define GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 2404 of file stm32f10x.h.
#define GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 2405 of file stm32f10x.h.
#define GPIO_CRH_MODE15 ((uint32_t)0x30000000) |
MODE15[1:0] bits (Port x mode bits, pin 15)
Definition at line 2407 of file stm32f10x.h.
#define GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 2408 of file stm32f10x.h.
#define GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 2409 of file stm32f10x.h.
#define GPIO_CRH_MODE8 ((uint32_t)0x00000003) |
MODE8[1:0] bits (Port x mode bits, pin 8)
Definition at line 2379 of file stm32f10x.h.
#define GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 2380 of file stm32f10x.h.
#define GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 2381 of file stm32f10x.h.
#define GPIO_CRH_MODE9 ((uint32_t)0x00000030) |
MODE9[1:0] bits (Port x mode bits, pin 9)
Definition at line 2383 of file stm32f10x.h.
#define GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 2384 of file stm32f10x.h.
#define GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 2385 of file stm32f10x.h.
#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) |
Port x configuration bits
Definition at line 2342 of file stm32f10x.h.
#define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) |
CNF0[1:0] bits (Port x configuration bits, pin 0)
Definition at line 2344 of file stm32f10x.h.
#define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 2345 of file stm32f10x.h.
#define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 2346 of file stm32f10x.h.
#define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) |
CNF1[1:0] bits (Port x configuration bits, pin 1)
Definition at line 2348 of file stm32f10x.h.
#define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) |
Bit 0
Definition at line 2349 of file stm32f10x.h.
#define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) |
Bit 1
Definition at line 2350 of file stm32f10x.h.
#define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) |
CNF2[1:0] bits (Port x configuration bits, pin 2)
Definition at line 2352 of file stm32f10x.h.
#define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 2353 of file stm32f10x.h.
#define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 2354 of file stm32f10x.h.
#define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) |
CNF3[1:0] bits (Port x configuration bits, pin 3)
Definition at line 2356 of file stm32f10x.h.
#define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) |
Bit 0
Definition at line 2357 of file stm32f10x.h.
#define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) |
Bit 1
Definition at line 2358 of file stm32f10x.h.
#define GPIO_CRL_CNF4 ((uint32_t)0x000C0000) |
CNF4[1:0] bits (Port x configuration bits, pin 4)
Definition at line 2360 of file stm32f10x.h.
#define GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) |
Bit 0
Definition at line 2361 of file stm32f10x.h.
#define GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) |
Bit 1
Definition at line 2362 of file stm32f10x.h.
#define GPIO_CRL_CNF5 ((uint32_t)0x00C00000) |
CNF5[1:0] bits (Port x configuration bits, pin 5)
Definition at line 2364 of file stm32f10x.h.
#define GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) |
Bit 0
Definition at line 2365 of file stm32f10x.h.
#define GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) |
Bit 1
Definition at line 2366 of file stm32f10x.h.
#define GPIO_CRL_CNF6 ((uint32_t)0x0C000000) |
CNF6[1:0] bits (Port x configuration bits, pin 6)
Definition at line 2368 of file stm32f10x.h.
#define GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 2369 of file stm32f10x.h.
#define GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 2370 of file stm32f10x.h.
#define GPIO_CRL_CNF7 ((uint32_t)0xC0000000) |
CNF7[1:0] bits (Port x configuration bits, pin 7)
Definition at line 2372 of file stm32f10x.h.
#define GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) |
Bit 0
Definition at line 2373 of file stm32f10x.h.
#define GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) |
Bit 1
Definition at line 2374 of file stm32f10x.h.
#define GPIO_CRL_MODE ((uint32_t)0x33333333) |
Port x mode bits
Definition at line 2308 of file stm32f10x.h.
#define GPIO_CRL_MODE0 ((uint32_t)0x00000003) |
MODE0[1:0] bits (Port x mode bits, pin 0)
Definition at line 2310 of file stm32f10x.h.
#define GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 2311 of file stm32f10x.h.
#define GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 2312 of file stm32f10x.h.
#define GPIO_CRL_MODE1 ((uint32_t)0x00000030) |
MODE1[1:0] bits (Port x mode bits, pin 1)
Definition at line 2314 of file stm32f10x.h.
#define GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 2315 of file stm32f10x.h.
#define GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 2316 of file stm32f10x.h.
#define GPIO_CRL_MODE2 ((uint32_t)0x00000300) |
MODE2[1:0] bits (Port x mode bits, pin 2)
Definition at line 2318 of file stm32f10x.h.
#define GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 2319 of file stm32f10x.h.
#define GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 2320 of file stm32f10x.h.
#define GPIO_CRL_MODE3 ((uint32_t)0x00003000) |
MODE3[1:0] bits (Port x mode bits, pin 3)
Definition at line 2322 of file stm32f10x.h.
#define GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) |
Bit 0
Definition at line 2323 of file stm32f10x.h.
#define GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) |
Bit 1
Definition at line 2324 of file stm32f10x.h.
#define GPIO_CRL_MODE4 ((uint32_t)0x00030000) |
MODE4[1:0] bits (Port x mode bits, pin 4)
Definition at line 2326 of file stm32f10x.h.
#define GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) |
Bit 0
Definition at line 2327 of file stm32f10x.h.
#define GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) |
Bit 1
Definition at line 2328 of file stm32f10x.h.
#define GPIO_CRL_MODE5 ((uint32_t)0x00300000) |
MODE5[1:0] bits (Port x mode bits, pin 5)
Definition at line 2330 of file stm32f10x.h.
#define GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) |
Bit 0
Definition at line 2331 of file stm32f10x.h.
#define GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) |
Bit 1
Definition at line 2332 of file stm32f10x.h.
#define GPIO_CRL_MODE6 ((uint32_t)0x03000000) |
MODE6[1:0] bits (Port x mode bits, pin 6)
Definition at line 2334 of file stm32f10x.h.
#define GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 2335 of file stm32f10x.h.
#define GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 2336 of file stm32f10x.h.
#define GPIO_CRL_MODE7 ((uint32_t)0x30000000) |
MODE7[1:0] bits (Port x mode bits, pin 7)
Definition at line 2338 of file stm32f10x.h.
#define GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) |
Bit 0
Definition at line 2339 of file stm32f10x.h.
#define GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) |
Bit 1
Definition at line 2340 of file stm32f10x.h.
#define GPIO_IDR_IDR0 ((uint16_t)0x0001) |
Port input data, bit 0
Definition at line 2446 of file stm32f10x.h.
#define GPIO_IDR_IDR1 ((uint16_t)0x0002) |
Port input data, bit 1
Definition at line 2447 of file stm32f10x.h.
#define GPIO_IDR_IDR10 ((uint16_t)0x0400) |
Port input data, bit 10
Definition at line 2456 of file stm32f10x.h.
#define GPIO_IDR_IDR11 ((uint16_t)0x0800) |
Port input data, bit 11
Definition at line 2457 of file stm32f10x.h.
#define GPIO_IDR_IDR12 ((uint16_t)0x1000) |
Port input data, bit 12
Definition at line 2458 of file stm32f10x.h.
#define GPIO_IDR_IDR13 ((uint16_t)0x2000) |
Port input data, bit 13
Definition at line 2459 of file stm32f10x.h.
#define GPIO_IDR_IDR14 ((uint16_t)0x4000) |
Port input data, bit 14
Definition at line 2460 of file stm32f10x.h.
#define GPIO_IDR_IDR15 ((uint16_t)0x8000) |
Port input data, bit 15
Definition at line 2461 of file stm32f10x.h.
#define GPIO_IDR_IDR2 ((uint16_t)0x0004) |
Port input data, bit 2
Definition at line 2448 of file stm32f10x.h.
#define GPIO_IDR_IDR3 ((uint16_t)0x0008) |
Port input data, bit 3
Definition at line 2449 of file stm32f10x.h.
#define GPIO_IDR_IDR4 ((uint16_t)0x0010) |
Port input data, bit 4
Definition at line 2450 of file stm32f10x.h.
#define GPIO_IDR_IDR5 ((uint16_t)0x0020) |
Port input data, bit 5
Definition at line 2451 of file stm32f10x.h.
#define GPIO_IDR_IDR6 ((uint16_t)0x0040) |
Port input data, bit 6
Definition at line 2452 of file stm32f10x.h.
#define GPIO_IDR_IDR7 ((uint16_t)0x0080) |
Port input data, bit 7
Definition at line 2453 of file stm32f10x.h.
#define GPIO_IDR_IDR8 ((uint16_t)0x0100) |
Port input data, bit 8
Definition at line 2454 of file stm32f10x.h.
#define GPIO_IDR_IDR9 ((uint16_t)0x0200) |
Port input data, bit 9
Definition at line 2455 of file stm32f10x.h.
#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001) |
Port x Lock bit 0
Definition at line 2535 of file stm32f10x.h.
#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002) |
Port x Lock bit 1
Definition at line 2536 of file stm32f10x.h.
#define GPIO_LCKR_LCK10 ((uint32_t)0x00000400) |
Port x Lock bit 10
Definition at line 2545 of file stm32f10x.h.
#define GPIO_LCKR_LCK11 ((uint32_t)0x00000800) |
Port x Lock bit 11
Definition at line 2546 of file stm32f10x.h.
#define GPIO_LCKR_LCK12 ((uint32_t)0x00001000) |
Port x Lock bit 12
Definition at line 2547 of file stm32f10x.h.
#define GPIO_LCKR_LCK13 ((uint32_t)0x00002000) |
Port x Lock bit 13
Definition at line 2548 of file stm32f10x.h.
#define GPIO_LCKR_LCK14 ((uint32_t)0x00004000) |
Port x Lock bit 14
Definition at line 2549 of file stm32f10x.h.
#define GPIO_LCKR_LCK15 ((uint32_t)0x00008000) |
Port x Lock bit 15
Definition at line 2550 of file stm32f10x.h.
#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004) |
Port x Lock bit 2
Definition at line 2537 of file stm32f10x.h.
#define GPIO_LCKR_LCK3 ((uint32_t)0x00000008) |
Port x Lock bit 3
Definition at line 2538 of file stm32f10x.h.
#define GPIO_LCKR_LCK4 ((uint32_t)0x00000010) |
Port x Lock bit 4
Definition at line 2539 of file stm32f10x.h.
#define GPIO_LCKR_LCK5 ((uint32_t)0x00000020) |
Port x Lock bit 5
Definition at line 2540 of file stm32f10x.h.
#define GPIO_LCKR_LCK6 ((uint32_t)0x00000040) |
Port x Lock bit 6
Definition at line 2541 of file stm32f10x.h.
#define GPIO_LCKR_LCK7 ((uint32_t)0x00000080) |
Port x Lock bit 7
Definition at line 2542 of file stm32f10x.h.
#define GPIO_LCKR_LCK8 ((uint32_t)0x00000100) |
Port x Lock bit 8
Definition at line 2543 of file stm32f10x.h.
#define GPIO_LCKR_LCK9 ((uint32_t)0x00000200) |
Port x Lock bit 9
Definition at line 2544 of file stm32f10x.h.
#define GPIO_LCKR_LCKK ((uint32_t)0x00010000) |
Lock key
Definition at line 2551 of file stm32f10x.h.
#define GPIO_ODR_ODR0 ((uint16_t)0x0001) |
Port output data, bit 0
Definition at line 2464 of file stm32f10x.h.
#define GPIO_ODR_ODR1 ((uint16_t)0x0002) |
Port output data, bit 1
Definition at line 2465 of file stm32f10x.h.
#define GPIO_ODR_ODR10 ((uint16_t)0x0400) |
Port output data, bit 10
Definition at line 2474 of file stm32f10x.h.
#define GPIO_ODR_ODR11 ((uint16_t)0x0800) |
Port output data, bit 11
Definition at line 2475 of file stm32f10x.h.
#define GPIO_ODR_ODR12 ((uint16_t)0x1000) |
Port output data, bit 12
Definition at line 2476 of file stm32f10x.h.
#define GPIO_ODR_ODR13 ((uint16_t)0x2000) |
Port output data, bit 13
Definition at line 2477 of file stm32f10x.h.
#define GPIO_ODR_ODR14 ((uint16_t)0x4000) |
Port output data, bit 14
Definition at line 2478 of file stm32f10x.h.
#define GPIO_ODR_ODR15 ((uint16_t)0x8000) |
Port output data, bit 15
Definition at line 2479 of file stm32f10x.h.
#define GPIO_ODR_ODR2 ((uint16_t)0x0004) |
Port output data, bit 2
Definition at line 2466 of file stm32f10x.h.
#define GPIO_ODR_ODR3 ((uint16_t)0x0008) |
Port output data, bit 3
Definition at line 2467 of file stm32f10x.h.
#define GPIO_ODR_ODR4 ((uint16_t)0x0010) |
Port output data, bit 4
Definition at line 2468 of file stm32f10x.h.
#define GPIO_ODR_ODR5 ((uint16_t)0x0020) |
Port output data, bit 5
Definition at line 2469 of file stm32f10x.h.
#define GPIO_ODR_ODR6 ((uint16_t)0x0040) |
Port output data, bit 6
Definition at line 2470 of file stm32f10x.h.
#define GPIO_ODR_ODR7 ((uint16_t)0x0080) |
Port output data, bit 7
Definition at line 2471 of file stm32f10x.h.
#define GPIO_ODR_ODR8 ((uint16_t)0x0100) |
Port output data, bit 8
Definition at line 2472 of file stm32f10x.h.
#define GPIO_ODR_ODR9 ((uint16_t)0x0200) |
Port output data, bit 9
Definition at line 2473 of file stm32f10x.h.
#define I2C_CCR_CCR ((uint16_t)0x0FFF) |
Clock Control Register in Fast/Standard mode (Master mode)
Definition at line 7632 of file stm32f10x.h.
#define I2C_CCR_DUTY ((uint16_t)0x4000) |
Fast Mode Duty Cycle
Definition at line 7633 of file stm32f10x.h.
#define I2C_CCR_FS ((uint16_t)0x8000) |
I2C Master Mode Selection
Definition at line 7634 of file stm32f10x.h.
#define I2C_CR1_ACK ((uint16_t)0x0400) |
Acknowledge Enable
Definition at line 7560 of file stm32f10x.h.
#define I2C_CR1_ALERT ((uint16_t)0x2000) |
SMBus Alert
Definition at line 7563 of file stm32f10x.h.
#define I2C_CR1_ENARP ((uint16_t)0x0010) |
ARP Enable
Definition at line 7554 of file stm32f10x.h.
#define I2C_CR1_ENGC ((uint16_t)0x0040) |
General Call Enable
Definition at line 7556 of file stm32f10x.h.
#define I2C_CR1_ENPEC ((uint16_t)0x0020) |
PEC Enable
Definition at line 7555 of file stm32f10x.h.
#define I2C_CR1_NOSTRETCH ((uint16_t)0x0080) |
Clock Stretching Disable (Slave mode)
Definition at line 7557 of file stm32f10x.h.
#define I2C_CR1_PE ((uint16_t)0x0001) |
Peripheral Enable
Definition at line 7551 of file stm32f10x.h.
#define I2C_CR1_PEC ((uint16_t)0x1000) |
Packet Error Checking
Definition at line 7562 of file stm32f10x.h.
#define I2C_CR1_POS ((uint16_t)0x0800) |
Acknowledge/PEC Position (for data reception)
Definition at line 7561 of file stm32f10x.h.
#define I2C_CR1_SMBTYPE ((uint16_t)0x0008) |
SMBus Type
Definition at line 7553 of file stm32f10x.h.
#define I2C_CR1_SMBUS ((uint16_t)0x0002) |
SMBus Mode
Definition at line 7552 of file stm32f10x.h.
#define I2C_CR1_START ((uint16_t)0x0100) |
Start Generation
Definition at line 7558 of file stm32f10x.h.
#define I2C_CR1_STOP ((uint16_t)0x0200) |
Stop Generation
Definition at line 7559 of file stm32f10x.h.
#define I2C_CR1_SWRST ((uint16_t)0x8000) |
Software Reset
Definition at line 7564 of file stm32f10x.h.
#define I2C_CR2_DMAEN ((uint16_t)0x0800) |
DMA Requests Enable
Definition at line 7578 of file stm32f10x.h.
#define I2C_CR2_FREQ ((uint16_t)0x003F) |
FREQ[5:0] bits (Peripheral Clock Frequency)
Definition at line 7567 of file stm32f10x.h.
#define I2C_CR2_FREQ_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 7568 of file stm32f10x.h.
#define I2C_CR2_FREQ_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 7569 of file stm32f10x.h.
#define I2C_CR2_FREQ_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 7570 of file stm32f10x.h.
#define I2C_CR2_FREQ_3 ((uint16_t)0x0008) |
Bit 3
Definition at line 7571 of file stm32f10x.h.
#define I2C_CR2_FREQ_4 ((uint16_t)0x0010) |
Bit 4
Definition at line 7572 of file stm32f10x.h.
#define I2C_CR2_FREQ_5 ((uint16_t)0x0020) |
Bit 5
Definition at line 7573 of file stm32f10x.h.
#define I2C_CR2_ITBUFEN ((uint16_t)0x0400) |
Buffer Interrupt Enable
Definition at line 7577 of file stm32f10x.h.
#define I2C_CR2_ITERREN ((uint16_t)0x0100) |
Error Interrupt Enable
Definition at line 7575 of file stm32f10x.h.
#define I2C_CR2_ITEVTEN ((uint16_t)0x0200) |
Event Interrupt Enable
Definition at line 7576 of file stm32f10x.h.
#define I2C_CR2_LAST ((uint16_t)0x1000) |
DMA Last Transfer
Definition at line 7579 of file stm32f10x.h.
#define I2C_DR_DR ((uint8_t)0xFF) |
8-bit Data Register
Definition at line 7603 of file stm32f10x.h.
#define I2C_OAR1_ADD0 ((uint16_t)0x0001) |
Bit 0
Definition at line 7585 of file stm32f10x.h.
#define I2C_OAR1_ADD1 ((uint16_t)0x0002) |
Bit 1
Definition at line 7586 of file stm32f10x.h.
#define I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) |
Interface Address
Definition at line 7582 of file stm32f10x.h.
#define I2C_OAR1_ADD2 ((uint16_t)0x0004) |
Bit 2
Definition at line 7587 of file stm32f10x.h.
#define I2C_OAR1_ADD3 ((uint16_t)0x0008) |
Bit 3
Definition at line 7588 of file stm32f10x.h.
#define I2C_OAR1_ADD4 ((uint16_t)0x0010) |
Bit 4
Definition at line 7589 of file stm32f10x.h.
#define I2C_OAR1_ADD5 ((uint16_t)0x0020) |
Bit 5
Definition at line 7590 of file stm32f10x.h.
#define I2C_OAR1_ADD6 ((uint16_t)0x0040) |
Bit 6
Definition at line 7591 of file stm32f10x.h.
#define I2C_OAR1_ADD7 ((uint16_t)0x0080) |
Bit 7
Definition at line 7592 of file stm32f10x.h.
#define I2C_OAR1_ADD8 ((uint16_t)0x0100) |
Bit 8
Definition at line 7593 of file stm32f10x.h.
#define I2C_OAR1_ADD8_9 ((uint16_t)0x0300) |
Interface Address
Definition at line 7583 of file stm32f10x.h.
#define I2C_OAR1_ADD9 ((uint16_t)0x0200) |
Bit 9
Definition at line 7594 of file stm32f10x.h.
#define I2C_OAR1_ADDMODE ((uint16_t)0x8000) |
Addressing Mode (Slave mode)
Definition at line 7596 of file stm32f10x.h.
#define I2C_OAR2_ADD2 ((uint8_t)0xFE) |
Interface address
Definition at line 7600 of file stm32f10x.h.
#define I2C_OAR2_ENDUAL ((uint8_t)0x01) |
Dual addressing mode enable
Definition at line 7599 of file stm32f10x.h.
#define I2C_SR1_ADD10 ((uint16_t)0x0008) |
10-bit header sent (Master mode)
Definition at line 7609 of file stm32f10x.h.
#define I2C_SR1_ADDR ((uint16_t)0x0002) |
Address sent (master mode)/matched (slave mode)
Definition at line 7607 of file stm32f10x.h.
#define I2C_SR1_AF ((uint16_t)0x0400) |
Acknowledge Failure
Definition at line 7615 of file stm32f10x.h.
#define I2C_SR1_ARLO ((uint16_t)0x0200) |
Arbitration Lost (master mode)
Definition at line 7614 of file stm32f10x.h.
#define I2C_SR1_BERR ((uint16_t)0x0100) |
Bus Error
Definition at line 7613 of file stm32f10x.h.
#define I2C_SR1_BTF ((uint16_t)0x0004) |
Byte Transfer Finished
Definition at line 7608 of file stm32f10x.h.
#define I2C_SR1_OVR ((uint16_t)0x0800) |
Overrun/Underrun
Definition at line 7616 of file stm32f10x.h.
#define I2C_SR1_PECERR ((uint16_t)0x1000) |
PEC Error in reception
Definition at line 7617 of file stm32f10x.h.
#define I2C_SR1_RXNE ((uint16_t)0x0040) |
Data Register not Empty (receivers)
Definition at line 7611 of file stm32f10x.h.
#define I2C_SR1_SB ((uint16_t)0x0001) |
Start Bit (Master mode)
Definition at line 7606 of file stm32f10x.h.
#define I2C_SR1_SMBALERT ((uint16_t)0x8000) |
SMBus Alert
Definition at line 7619 of file stm32f10x.h.
#define I2C_SR1_STOPF ((uint16_t)0x0010) |
Stop detection (Slave mode)
Definition at line 7610 of file stm32f10x.h.
#define I2C_SR1_TIMEOUT ((uint16_t)0x4000) |
Timeout or Tlow Error
Definition at line 7618 of file stm32f10x.h.
#define I2C_SR1_TXE ((uint16_t)0x0080) |
Data Register Empty (transmitters)
Definition at line 7612 of file stm32f10x.h.
#define I2C_SR2_BUSY ((uint16_t)0x0002) |
Bus Busy
Definition at line 7623 of file stm32f10x.h.
#define I2C_SR2_DUALF ((uint16_t)0x0080) |
Dual Flag (Slave mode)
Definition at line 7628 of file stm32f10x.h.
#define I2C_SR2_GENCALL ((uint16_t)0x0010) |
General Call Address (Slave mode)
Definition at line 7625 of file stm32f10x.h.
#define I2C_SR2_MSL ((uint16_t)0x0001) |
Master/Slave
Definition at line 7622 of file stm32f10x.h.
#define I2C_SR2_PEC ((uint16_t)0xFF00) |
Packet Error Checking Register
Definition at line 7629 of file stm32f10x.h.
#define I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) |
SMBus Device Default Address (Slave mode)
Definition at line 7626 of file stm32f10x.h.
#define I2C_SR2_SMBHOST ((uint16_t)0x0040) |
SMBus Host Header (Slave mode)
Definition at line 7627 of file stm32f10x.h.
#define I2C_SR2_TRA ((uint16_t)0x0004) |
Transmitter/Receiver
Definition at line 7624 of file stm32f10x.h.
#define I2C_TRISE_TRISE ((uint8_t)0x3F) |
Maximum Rise Time in Fast/Standard mode (Master mode)
Definition at line 7637 of file stm32f10x.h.
#define IWDG_KR_KEY ((uint16_t)0xFFFF) |
Key value (write only, read 0000h)
Definition at line 4526 of file stm32f10x.h.
#define IWDG_PR_PR ((uint8_t)0x07) |
PR[2:0] (Prescaler divider)
Definition at line 4529 of file stm32f10x.h.
#define IWDG_PR_PR_0 ((uint8_t)0x01) |
Bit 0
Definition at line 4530 of file stm32f10x.h.
#define IWDG_PR_PR_1 ((uint8_t)0x02) |
Bit 1
Definition at line 4531 of file stm32f10x.h.
#define IWDG_PR_PR_2 ((uint8_t)0x04) |
Bit 2
Definition at line 4532 of file stm32f10x.h.
#define IWDG_RLR_RL ((uint16_t)0x0FFF) |
Watchdog counter reload value
Definition at line 4535 of file stm32f10x.h.
#define IWDG_SR_PVU ((uint8_t)0x01) |
Watchdog prescaler value update
Definition at line 4538 of file stm32f10x.h.
#define IWDG_SR_RVU ((uint8_t)0x02) |
Watchdog counter reload value update
Definition at line 4539 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) |
Interrupt active flags
Definition at line 3052 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) |
bit 0
Definition at line 3053 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) |
bit 1
Definition at line 3054 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) |
bit 10
Definition at line 3063 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) |
bit 11
Definition at line 3064 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) |
bit 12
Definition at line 3065 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) |
bit 13
Definition at line 3066 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) |
bit 14
Definition at line 3067 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) |
bit 15
Definition at line 3068 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) |
bit 16
Definition at line 3069 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) |
bit 17
Definition at line 3070 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) |
bit 18
Definition at line 3071 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) |
bit 19
Definition at line 3072 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) |
bit 2
Definition at line 3055 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) |
bit 20
Definition at line 3073 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) |
bit 21
Definition at line 3074 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) |
bit 22
Definition at line 3075 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) |
bit 23
Definition at line 3076 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) |
bit 24
Definition at line 3077 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) |
bit 25
Definition at line 3078 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) |
bit 26
Definition at line 3079 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) |
bit 27
Definition at line 3080 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) |
bit 28
Definition at line 3081 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) |
bit 29
Definition at line 3082 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) |
bit 3
Definition at line 3056 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) |
bit 30
Definition at line 3083 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) |
bit 31
Definition at line 3084 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) |
bit 4
Definition at line 3057 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) |
bit 5
Definition at line 3058 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) |
bit 6
Definition at line 3059 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) |
bit 7
Definition at line 3060 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) |
bit 8
Definition at line 3061 of file stm32f10x.h.
#define NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) |
bit 9
Definition at line 3062 of file stm32f10x.h.
#define NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) |
Interrupt clear-enable bits
Definition at line 2947 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) |
bit 0
Definition at line 2948 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) |
bit 1
Definition at line 2949 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) |
bit 10
Definition at line 2958 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) |
bit 11
Definition at line 2959 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) |
bit 12
Definition at line 2960 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) |
bit 13
Definition at line 2961 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) |
bit 14
Definition at line 2962 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) |
bit 15
Definition at line 2963 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) |
bit 16
Definition at line 2964 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) |
bit 17
Definition at line 2965 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) |
bit 18
Definition at line 2966 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) |
bit 19
Definition at line 2967 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) |
bit 2
Definition at line 2950 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) |
bit 20
Definition at line 2968 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) |
bit 21
Definition at line 2969 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) |
bit 22
Definition at line 2970 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) |
bit 23
Definition at line 2971 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) |
bit 24
Definition at line 2972 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) |
bit 25
Definition at line 2973 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) |
bit 26
Definition at line 2974 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) |
bit 27
Definition at line 2975 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) |
bit 28
Definition at line 2976 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) |
bit 29
Definition at line 2977 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) |
bit 3
Definition at line 2951 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) |
bit 30
Definition at line 2978 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) |
bit 31
Definition at line 2979 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) |
bit 4
Definition at line 2952 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) |
bit 5
Definition at line 2953 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) |
bit 6
Definition at line 2954 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) |
bit 7
Definition at line 2955 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) |
bit 8
Definition at line 2956 of file stm32f10x.h.
#define NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) |
bit 9
Definition at line 2957 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) |
Interrupt clear-pending bits
Definition at line 3017 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) |
bit 0
Definition at line 3018 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) |
bit 1
Definition at line 3019 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) |
bit 10
Definition at line 3028 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) |
bit 11
Definition at line 3029 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) |
bit 12
Definition at line 3030 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) |
bit 13
Definition at line 3031 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) |
bit 14
Definition at line 3032 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) |
bit 15
Definition at line 3033 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) |
bit 16
Definition at line 3034 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) |
bit 17
Definition at line 3035 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) |
bit 18
Definition at line 3036 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) |
bit 19
Definition at line 3037 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) |
bit 2
Definition at line 3020 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) |
bit 20
Definition at line 3038 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) |
bit 21
Definition at line 3039 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) |
bit 22
Definition at line 3040 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) |
bit 23
Definition at line 3041 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) |
bit 24
Definition at line 3042 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) |
bit 25
Definition at line 3043 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) |
bit 26
Definition at line 3044 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) |
bit 27
Definition at line 3045 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) |
bit 28
Definition at line 3046 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) |
bit 29
Definition at line 3047 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) |
bit 3
Definition at line 3021 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) |
bit 30
Definition at line 3048 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) |
bit 31
Definition at line 3049 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) |
bit 4
Definition at line 3022 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) |
bit 5
Definition at line 3023 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) |
bit 6
Definition at line 3024 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) |
bit 7
Definition at line 3025 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) |
bit 8
Definition at line 3026 of file stm32f10x.h.
#define NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) |
bit 9
Definition at line 3027 of file stm32f10x.h.
#define NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) |
Priority of interrupt 0
Definition at line 3087 of file stm32f10x.h.
#define NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) |
Priority of interrupt 1
Definition at line 3088 of file stm32f10x.h.
#define NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) |
Priority of interrupt 2
Definition at line 3089 of file stm32f10x.h.
#define NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) |
Priority of interrupt 3
Definition at line 3090 of file stm32f10x.h.
#define NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) |
Priority of interrupt 4
Definition at line 3093 of file stm32f10x.h.
#define NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) |
Priority of interrupt 5
Definition at line 3094 of file stm32f10x.h.
#define NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) |
Priority of interrupt 6
Definition at line 3095 of file stm32f10x.h.
#define NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) |
Priority of interrupt 7
Definition at line 3096 of file stm32f10x.h.
#define NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) |
Priority of interrupt 10
Definition at line 3101 of file stm32f10x.h.
#define NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) |
Priority of interrupt 11
Definition at line 3102 of file stm32f10x.h.
#define NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) |
Priority of interrupt 8
Definition at line 3099 of file stm32f10x.h.
#define NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) |
Priority of interrupt 9
Definition at line 3100 of file stm32f10x.h.
#define NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) |
Priority of interrupt 12
Definition at line 3105 of file stm32f10x.h.
#define NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) |
Priority of interrupt 13
Definition at line 3106 of file stm32f10x.h.
#define NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) |
Priority of interrupt 14
Definition at line 3107 of file stm32f10x.h.
#define NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) |
Priority of interrupt 15
Definition at line 3108 of file stm32f10x.h.
#define NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) |
Priority of interrupt 16
Definition at line 3111 of file stm32f10x.h.
#define NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) |
Priority of interrupt 17
Definition at line 3112 of file stm32f10x.h.
#define NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) |
Priority of interrupt 18
Definition at line 3113 of file stm32f10x.h.
#define NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) |
Priority of interrupt 19
Definition at line 3114 of file stm32f10x.h.
#define NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) |
Priority of interrupt 20
Definition at line 3117 of file stm32f10x.h.
#define NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) |
Priority of interrupt 21
Definition at line 3118 of file stm32f10x.h.
#define NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) |
Priority of interrupt 22
Definition at line 3119 of file stm32f10x.h.
#define NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) |
Priority of interrupt 23
Definition at line 3120 of file stm32f10x.h.
#define NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) |
Priority of interrupt 24
Definition at line 3123 of file stm32f10x.h.
#define NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) |
Priority of interrupt 25
Definition at line 3124 of file stm32f10x.h.
#define NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) |
Priority of interrupt 26
Definition at line 3125 of file stm32f10x.h.
#define NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) |
Priority of interrupt 27
Definition at line 3126 of file stm32f10x.h.
#define NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) |
Priority of interrupt 28
Definition at line 3129 of file stm32f10x.h.
#define NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) |
Priority of interrupt 29
Definition at line 3130 of file stm32f10x.h.
#define NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) |
Priority of interrupt 30
Definition at line 3131 of file stm32f10x.h.
#define NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) |
Priority of interrupt 31
Definition at line 3132 of file stm32f10x.h.
#define NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) |
Interrupt set enable bits
Definition at line 2912 of file stm32f10x.h.
#define NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) |
bit 0
Definition at line 2913 of file stm32f10x.h.
#define NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) |
bit 1
Definition at line 2914 of file stm32f10x.h.
#define NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) |
bit 10
Definition at line 2923 of file stm32f10x.h.
#define NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) |
bit 11
Definition at line 2924 of file stm32f10x.h.
#define NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) |
bit 12
Definition at line 2925 of file stm32f10x.h.
#define NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) |
bit 13
Definition at line 2926 of file stm32f10x.h.
#define NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) |
bit 14
Definition at line 2927 of file stm32f10x.h.
#define NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) |
bit 15
Definition at line 2928 of file stm32f10x.h.
#define NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) |
bit 16
Definition at line 2929 of file stm32f10x.h.
#define NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) |
bit 17
Definition at line 2930 of file stm32f10x.h.
#define NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) |
bit 18
Definition at line 2931 of file stm32f10x.h.
#define NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) |
bit 19
Definition at line 2932 of file stm32f10x.h.
#define NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) |
bit 2
Definition at line 2915 of file stm32f10x.h.
#define NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) |
bit 20
Definition at line 2933 of file stm32f10x.h.
#define NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) |
bit 21
Definition at line 2934 of file stm32f10x.h.
#define NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) |
bit 22
Definition at line 2935 of file stm32f10x.h.
#define NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) |
bit 23
Definition at line 2936 of file stm32f10x.h.
#define NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) |
bit 24
Definition at line 2937 of file stm32f10x.h.
#define NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) |
bit 25
Definition at line 2938 of file stm32f10x.h.
#define NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) |
bit 26
Definition at line 2939 of file stm32f10x.h.
#define NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) |
bit 27
Definition at line 2940 of file stm32f10x.h.
#define NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) |
bit 28
Definition at line 2941 of file stm32f10x.h.
#define NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) |
bit 29
Definition at line 2942 of file stm32f10x.h.
#define NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) |
bit 3
Definition at line 2916 of file stm32f10x.h.
#define NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) |
bit 30
Definition at line 2943 of file stm32f10x.h.
#define NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) |
bit 31
Definition at line 2944 of file stm32f10x.h.
#define NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) |
bit 4
Definition at line 2917 of file stm32f10x.h.
#define NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) |
bit 5
Definition at line 2918 of file stm32f10x.h.
#define NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) |
bit 6
Definition at line 2919 of file stm32f10x.h.
#define NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) |
bit 7
Definition at line 2920 of file stm32f10x.h.
#define NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) |
bit 8
Definition at line 2921 of file stm32f10x.h.
#define NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) |
bit 9
Definition at line 2922 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) |
Interrupt set-pending bits
Definition at line 2982 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) |
bit 0
Definition at line 2983 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) |
bit 1
Definition at line 2984 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) |
bit 10
Definition at line 2993 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) |
bit 11
Definition at line 2994 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) |
bit 12
Definition at line 2995 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) |
bit 13
Definition at line 2996 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) |
bit 14
Definition at line 2997 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) |
bit 15
Definition at line 2998 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) |
bit 16
Definition at line 2999 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) |
bit 17
Definition at line 3000 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) |
bit 18
Definition at line 3001 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) |
bit 19
Definition at line 3002 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) |
bit 2
Definition at line 2985 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) |
bit 20
Definition at line 3003 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) |
bit 21
Definition at line 3004 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) |
bit 22
Definition at line 3005 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) |
bit 23
Definition at line 3006 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) |
bit 24
Definition at line 3007 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) |
bit 25
Definition at line 3008 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) |
bit 26
Definition at line 3009 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) |
bit 27
Definition at line 3010 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) |
bit 28
Definition at line 3011 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) |
bit 29
Definition at line 3012 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) |
bit 3
Definition at line 2986 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) |
bit 30
Definition at line 3013 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) |
bit 31
Definition at line 3014 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) |
bit 4
Definition at line 2987 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) |
bit 5
Definition at line 2988 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) |
bit 6
Definition at line 2989 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) |
bit 7
Definition at line 2990 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) |
bit 8
Definition at line 2991 of file stm32f10x.h.
#define NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) |
bit 9
Definition at line 2992 of file stm32f10x.h.
#define PWR_CR_CSBF ((uint16_t)0x0008) |
Clear Standby Flag
Definition at line 1498 of file stm32f10x.h.
#define PWR_CR_CWUF ((uint16_t)0x0004) |
Clear Wakeup Flag
Definition at line 1497 of file stm32f10x.h.
#define PWR_CR_DBP ((uint16_t)0x0100) |
Disable Backup Domain write protection
Definition at line 1516 of file stm32f10x.h.
#define PWR_CR_LPDS ((uint16_t)0x0001) |
Low-Power Deepsleep
Definition at line 1495 of file stm32f10x.h.
#define PWR_CR_PDDS ((uint16_t)0x0002) |
Power Down Deepsleep
Definition at line 1496 of file stm32f10x.h.
#define PWR_CR_PLS ((uint16_t)0x00E0) |
PLS[2:0] bits (PVD Level Selection)
Definition at line 1501 of file stm32f10x.h.
#define PWR_CR_PLS_0 ((uint16_t)0x0020) |
Bit 0
Definition at line 1502 of file stm32f10x.h.
#define PWR_CR_PLS_1 ((uint16_t)0x0040) |
Bit 1
Definition at line 1503 of file stm32f10x.h.
#define PWR_CR_PLS_2 ((uint16_t)0x0080) |
Bit 2 PVD level configuration
Definition at line 1504 of file stm32f10x.h.
#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) |
PVD level 2.2V
Definition at line 1507 of file stm32f10x.h.
#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) |
PVD level 2.3V
Definition at line 1508 of file stm32f10x.h.
#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) |
PVD level 2.4V
Definition at line 1509 of file stm32f10x.h.
#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) |
PVD level 2.5V
Definition at line 1510 of file stm32f10x.h.
#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) |
PVD level 2.6V
Definition at line 1511 of file stm32f10x.h.
#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) |
PVD level 2.7V
Definition at line 1512 of file stm32f10x.h.
#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) |
PVD level 2.8V
Definition at line 1513 of file stm32f10x.h.
#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) |
PVD level 2.9V
Definition at line 1514 of file stm32f10x.h.
#define PWR_CR_PVDE ((uint16_t)0x0010) |
Power Voltage Detector Enable
Definition at line 1499 of file stm32f10x.h.
#define PWR_CSR_EWUP ((uint16_t)0x0100) |
Enable WKUP pin
Definition at line 1523 of file stm32f10x.h.
#define PWR_CSR_PVDO ((uint16_t)0x0004) |
PVD Output
Definition at line 1522 of file stm32f10x.h.
#define PWR_CSR_SBF ((uint16_t)0x0002) |
Standby Flag
Definition at line 1521 of file stm32f10x.h.
#define PWR_CSR_WUF ((uint16_t)0x0001) |
Wakeup Flag
Definition at line 1520 of file stm32f10x.h.
#define RCC_AHBENR_CRCEN ((uint16_t)0x0040) |
CRC clock enable
Definition at line 2022 of file stm32f10x.h.
#define RCC_AHBENR_DMA1EN ((uint16_t)0x0001) |
DMA1 clock enable
Definition at line 2019 of file stm32f10x.h.
#define RCC_AHBENR_FLITFEN ((uint16_t)0x0010) |
FLITF clock enable
Definition at line 2021 of file stm32f10x.h.
#define RCC_AHBENR_SRAMEN ((uint16_t)0x0004) |
SRAM interface clock enable
Definition at line 2020 of file stm32f10x.h.
#define RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) |
Backup interface clock enable
Definition at line 2099 of file stm32f10x.h.
#define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) |
CAN1 clock enable
Definition at line 2096 of file stm32f10x.h.
#define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) |
I2C 1 clock enable
Definition at line 2093 of file stm32f10x.h.
#define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) |
I2C 2 clock enable
Definition at line 2106 of file stm32f10x.h.
#define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) |
Power interface clock enable
Definition at line 2100 of file stm32f10x.h.
#define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) |
SPI 2 clock enable
Definition at line 2104 of file stm32f10x.h.
#define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) |
Timer 2 clock enabled
Definition at line 2089 of file stm32f10x.h.
#define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) |
Timer 3 clock enable
Definition at line 2090 of file stm32f10x.h.
#define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) |
Timer 4 clock enable
Definition at line 2103 of file stm32f10x.h.
#define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) |
USART 2 clock enable
Definition at line 2092 of file stm32f10x.h.
#define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) |
USART 3 clock enable
Definition at line 2105 of file stm32f10x.h.
#define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) |
Window Watchdog clock enable
Definition at line 2091 of file stm32f10x.h.
#define RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) |
Backup interface reset
Definition at line 1967 of file stm32f10x.h.
#define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) |
CAN1 reset
Definition at line 1964 of file stm32f10x.h.
#define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) |
I2C 1 reset
Definition at line 1961 of file stm32f10x.h.
#define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) |
I2C 2 reset
Definition at line 1974 of file stm32f10x.h.
#define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) |
Power interface reset
Definition at line 1968 of file stm32f10x.h.
#define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) |
SPI 2 reset
Definition at line 1972 of file stm32f10x.h.
#define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) |
Timer 2 reset
Definition at line 1957 of file stm32f10x.h.
#define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) |
Timer 3 reset
Definition at line 1958 of file stm32f10x.h.
#define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) |
Timer 4 reset
Definition at line 1971 of file stm32f10x.h.
#define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) |
USART 2 reset
Definition at line 1960 of file stm32f10x.h.
#define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) |
USART 3 reset
Definition at line 1973 of file stm32f10x.h.
#define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) |
Window Watchdog reset
Definition at line 1959 of file stm32f10x.h.
#define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) |
ADC 1 interface clock enable
Definition at line 2050 of file stm32f10x.h.
#define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) |
ADC 2 interface clock enable
Definition at line 2053 of file stm32f10x.h.
#define RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) |
Alternate Function I/O clock enable
Definition at line 2045 of file stm32f10x.h.
#define RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) |
I/O port A clock enable
Definition at line 2046 of file stm32f10x.h.
#define RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) |
I/O port B clock enable
Definition at line 2047 of file stm32f10x.h.
#define RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) |
I/O port C clock enable
Definition at line 2048 of file stm32f10x.h.
#define RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) |
I/O port D clock enable
Definition at line 2049 of file stm32f10x.h.
#define RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) |
I/O port E clock enable
Definition at line 2067 of file stm32f10x.h.
#define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) |
SPI 1 clock enable
Definition at line 2057 of file stm32f10x.h.
#define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) |
TIM1 Timer clock enable
Definition at line 2056 of file stm32f10x.h.
#define RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) |
USART1 clock enable
Definition at line 2058 of file stm32f10x.h.
#define RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) |
ADC 1 interface reset
Definition at line 1918 of file stm32f10x.h.
#define RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) |
ADC 2 interface reset
Definition at line 1921 of file stm32f10x.h.
#define RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) |
Alternate Function I/O reset
Definition at line 1913 of file stm32f10x.h.
#define RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) |
I/O port A reset
Definition at line 1914 of file stm32f10x.h.
#define RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) |
I/O port B reset
Definition at line 1915 of file stm32f10x.h.
#define RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) |
I/O port C reset
Definition at line 1916 of file stm32f10x.h.
#define RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) |
I/O port D reset
Definition at line 1917 of file stm32f10x.h.
#define RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) |
I/O port E reset
Definition at line 1935 of file stm32f10x.h.
#define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) |
SPI 1 reset
Definition at line 1925 of file stm32f10x.h.
#define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) |
TIM1 Timer reset
Definition at line 1924 of file stm32f10x.h.
#define RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) |
USART1 reset
Definition at line 1926 of file stm32f10x.h.
#define RCC_BDCR_BDRST ((uint32_t)0x00010000) |
Backup domain software reset
Definition at line 2166 of file stm32f10x.h.
#define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) |
External Low Speed oscillator Bypass
Definition at line 2153 of file stm32f10x.h.
#define RCC_BDCR_LSEON ((uint32_t)0x00000001) |
External Low Speed oscillator enable
Definition at line 2151 of file stm32f10x.h.
#define RCC_BDCR_LSERDY ((uint32_t)0x00000002) |
External Low Speed oscillator Ready
Definition at line 2152 of file stm32f10x.h.
#define RCC_BDCR_RTCEN ((uint32_t)0x00008000) |
RTC clock enable
Definition at line 2165 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) |
RTCSEL[1:0] bits (RTC clock source selection)
Definition at line 2155 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 2156 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) |
Bit 1 RTC congiguration
Definition at line 2157 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) |
HSE oscillator clock divided by 128 used as RTC clock
Definition at line 2163 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) |
LSE oscillator clock used as RTC clock
Definition at line 2161 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) |
LSI oscillator clock used as RTC clock
Definition at line 2162 of file stm32f10x.h.
#define RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) |
No clock
Definition at line 2160 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) |
ADCPRE[1:0] bits (ADC prescaler)
Definition at line 1760 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) |
Bit 0
Definition at line 1761 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) |
Bit 1
Definition at line 1762 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) |
PCLK2 divided by 2
Definition at line 1764 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) |
PCLK2 divided by 4
Definition at line 1765 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) |
PCLK2 divided by 6
Definition at line 1766 of file stm32f10x.h.
#define RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) |
PCLK2 divided by 8
Definition at line 1767 of file stm32f10x.h.
#define RCC_CFGR_HPRE ((uint32_t)0x000000F0) |
HPRE[3:0] bits (AHB prescaler)
Definition at line 1719 of file stm32f10x.h.
#define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) |
Bit 0
Definition at line 1720 of file stm32f10x.h.
#define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) |
Bit 1
Definition at line 1721 of file stm32f10x.h.
#define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) |
Bit 2
Definition at line 1722 of file stm32f10x.h.
#define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) |
Bit 3
Definition at line 1723 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) |
SYSCLK not divided
Definition at line 1725 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) |
SYSCLK divided by 128
Definition at line 1731 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) |
SYSCLK divided by 16
Definition at line 1729 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) |
SYSCLK divided by 2
Definition at line 1726 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) |
SYSCLK divided by 256
Definition at line 1732 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) |
SYSCLK divided by 4
Definition at line 1727 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) |
SYSCLK divided by 512 PPRE1 configuration
Definition at line 1733 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) |
SYSCLK divided by 64
Definition at line 1730 of file stm32f10x.h.
#define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) |
SYSCLK divided by 8
Definition at line 1728 of file stm32f10x.h.
#define RCC_CFGR_MCO ((uint32_t)0x07000000) |
MCO[2:0] bits (Microcontroller Clock Output)
Definition at line 1872 of file stm32f10x.h.
#define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) |
Bit 0
Definition at line 1873 of file stm32f10x.h.
#define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) |
Bit 1
Definition at line 1874 of file stm32f10x.h.
#define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) |
Bit 2
Definition at line 1875 of file stm32f10x.h.
#define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) |
HSE clock selected as MCO source
Definition at line 1880 of file stm32f10x.h.
#define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) |
HSI clock selected as MCO source
Definition at line 1879 of file stm32f10x.h.
#define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) |
No clock
Definition at line 1877 of file stm32f10x.h.
#define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) |
PLL clock divided by 2 selected as MCO source
Definition at line 1881 of file stm32f10x.h.
#define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) |
System clock selected as MCO source
Definition at line 1878 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) |
PLLMUL[3:0] bits (PLL multiplication factor)
Definition at line 1774 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) |
PLL input clock10
Definition at line 1862 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) |
PLL input clock*11
Definition at line 1863 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) |
PLL input clock*12
Definition at line 1864 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) |
PLL input clock*13
Definition at line 1865 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) |
PLL input clock*14
Definition at line 1866 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) |
PLL input clock*15
Definition at line 1867 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) |
PLL input clock*16
Definition at line 1868 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) |
PLL input clock*2
Definition at line 1854 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) |
PLL input clock*3
Definition at line 1855 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) |
PLL input clock*4
Definition at line 1856 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) |
PLL input clock*5
Definition at line 1857 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) |
PLL input clock*6
Definition at line 1858 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) |
PLL input clock*7
Definition at line 1859 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) |
PLL input clock*8
Definition at line 1860 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) |
PLL input clock*9
Definition at line 1861 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) |
Bit 0
Definition at line 1775 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) |
Bit 1
Definition at line 1776 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) |
Bit 2
Definition at line 1777 of file stm32f10x.h.
#define RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) |
Bit 3
Definition at line 1778 of file stm32f10x.h.
#define RCC_CFGR_PLLSRC ((uint32_t)0x00010000) |
PLL entry clock source
Definition at line 1769 of file stm32f10x.h.
#define RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) |
HSE clock selected as PLL entry clock source
Definition at line 1849 of file stm32f10x.h.
#define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) |
HSI clock divided by 2 selected as PLL entry clock source
Definition at line 1848 of file stm32f10x.h.
#define RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) |
HSE divider for PLL entry PLLMUL configuration
Definition at line 1771 of file stm32f10x.h.
#define RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) |
HSE clock not divided for PLL entry
Definition at line 1851 of file stm32f10x.h.
#define RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) |
HSE clock divided by 2 for PLL entry
Definition at line 1852 of file stm32f10x.h.
#define RCC_CFGR_PPRE1 ((uint32_t)0x00000700) |
PRE1[2:0] bits (APB1 prescaler)
Definition at line 1736 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 1737 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 1738 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 1739 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) |
HCLK not divided
Definition at line 1741 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) |
HCLK divided by 16 PPRE2 configuration
Definition at line 1745 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) |
HCLK divided by 2
Definition at line 1742 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) |
HCLK divided by 4
Definition at line 1743 of file stm32f10x.h.
#define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) |
HCLK divided by 8
Definition at line 1744 of file stm32f10x.h.
#define RCC_CFGR_PPRE2 ((uint32_t)0x00003800) |
PRE2[2:0] bits (APB2 prescaler)
Definition at line 1748 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) |
Bit 0
Definition at line 1749 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) |
Bit 1
Definition at line 1750 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) |
Bit 2
Definition at line 1751 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) |
HCLK not divided
Definition at line 1753 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) |
HCLK divided by 16 ADCPPRE configuration
Definition at line 1757 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) |
HCLK divided by 2
Definition at line 1754 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) |
HCLK divided by 4
Definition at line 1755 of file stm32f10x.h.
#define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) |
HCLK divided by 8
Definition at line 1756 of file stm32f10x.h.
#define RCC_CFGR_SW ((uint32_t)0x00000003) |
< SW configuration SW[1:0] bits (System clock Switch)
Definition at line 1701 of file stm32f10x.h.
#define RCC_CFGR_SW_0 ((uint32_t)0x00000001) |
Bit 0
Definition at line 1702 of file stm32f10x.h.
#define RCC_CFGR_SW_1 ((uint32_t)0x00000002) |
Bit 1
Definition at line 1703 of file stm32f10x.h.
#define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) |
HSE selected as system clock
Definition at line 1706 of file stm32f10x.h.
#define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) |
HSI selected as system clock
Definition at line 1705 of file stm32f10x.h.
#define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) |
PLL selected as system clock SWS configuration
Definition at line 1707 of file stm32f10x.h.
#define RCC_CFGR_SWS ((uint32_t)0x0000000C) |
SWS[1:0] bits (System Clock Switch Status)
Definition at line 1710 of file stm32f10x.h.
#define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) |
Bit 0
Definition at line 1711 of file stm32f10x.h.
#define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) |
Bit 1
Definition at line 1712 of file stm32f10x.h.
#define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) |
HSE oscillator used as system clock
Definition at line 1715 of file stm32f10x.h.
#define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) |
HSI oscillator used as system clock
Definition at line 1714 of file stm32f10x.h.
#define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) |
PLL used as system clock HPRE configuration
Definition at line 1716 of file stm32f10x.h.
#define RCC_CFGR_USBPRE ((uint32_t)0x00400000) |
USB Device prescaler MCO configuration
Definition at line 1869 of file stm32f10x.h.
#define RCC_CIR_CSSC ((uint32_t)0x00800000) |
Clock Security System Interrupt Clear
Definition at line 1901 of file stm32f10x.h.
#define RCC_CIR_CSSF ((uint32_t)0x00000080) |
Clock Security System Interrupt flag
Definition at line 1890 of file stm32f10x.h.
#define RCC_CIR_HSERDYC ((uint32_t)0x00080000) |
HSE Ready Interrupt Clear
Definition at line 1899 of file stm32f10x.h.
#define RCC_CIR_HSERDYF ((uint32_t)0x00000008) |
HSE Ready Interrupt flag
Definition at line 1888 of file stm32f10x.h.
#define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) |
HSE Ready Interrupt Enable
Definition at line 1894 of file stm32f10x.h.
#define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) |
HSI Ready Interrupt Clear
Definition at line 1898 of file stm32f10x.h.
#define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) |
HSI Ready Interrupt flag
Definition at line 1887 of file stm32f10x.h.
#define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) |
HSI Ready Interrupt Enable
Definition at line 1893 of file stm32f10x.h.
#define RCC_CIR_LSERDYC ((uint32_t)0x00020000) |
LSE Ready Interrupt Clear
Definition at line 1897 of file stm32f10x.h.
#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) |
LSE Ready Interrupt flag
Definition at line 1886 of file stm32f10x.h.
#define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) |
LSE Ready Interrupt Enable
Definition at line 1892 of file stm32f10x.h.
#define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) |
LSI Ready Interrupt Clear
Definition at line 1896 of file stm32f10x.h.
#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) |
<****************** Bit definition for RCC_CIR register LSI Ready Interrupt flag
Definition at line 1885 of file stm32f10x.h.
#define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) |
LSI Ready Interrupt Enable
Definition at line 1891 of file stm32f10x.h.
#define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) |
PLL Ready Interrupt Clear
Definition at line 1900 of file stm32f10x.h.
#define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) |
PLL Ready Interrupt flag
Definition at line 1889 of file stm32f10x.h.
#define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) |
PLL Ready Interrupt Enable
Definition at line 1895 of file stm32f10x.h.
#define RCC_CR_CSSON ((uint32_t)0x00080000) |
Clock Security System enable
Definition at line 1688 of file stm32f10x.h.
#define RCC_CR_HSEBYP ((uint32_t)0x00040000) |
External High Speed clock Bypass
Definition at line 1687 of file stm32f10x.h.
#define RCC_CR_HSEON ((uint32_t)0x00010000) |
External High Speed clock enable
Definition at line 1685 of file stm32f10x.h.
#define RCC_CR_HSERDY ((uint32_t)0x00020000) |
External High Speed clock ready flag
Definition at line 1686 of file stm32f10x.h.
#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) |
Internal High Speed clock Calibration
Definition at line 1684 of file stm32f10x.h.
#define RCC_CR_HSION ((uint32_t)0x00000001) |
Internal High Speed clock enable
Definition at line 1681 of file stm32f10x.h.
#define RCC_CR_HSIRDY ((uint32_t)0x00000002) |
Internal High Speed clock ready flag
Definition at line 1682 of file stm32f10x.h.
#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) |
Internal High Speed clock trimming
Definition at line 1683 of file stm32f10x.h.
#define RCC_CR_PLLON ((uint32_t)0x01000000) |
PLL enable
Definition at line 1689 of file stm32f10x.h.
#define RCC_CR_PLLRDY ((uint32_t)0x02000000) |
PLL clock ready flag
Definition at line 1690 of file stm32f10x.h.
#define RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) |
Independent Watchdog reset flag
Definition at line 2175 of file stm32f10x.h.
#define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) |
Low-Power reset flag
Definition at line 2177 of file stm32f10x.h.
#define RCC_CSR_LSION ((uint32_t)0x00000001) |
Internal Low Speed oscillator enable
Definition at line 2169 of file stm32f10x.h.
#define RCC_CSR_LSIRDY ((uint32_t)0x00000002) |
Internal Low Speed oscillator Ready
Definition at line 2170 of file stm32f10x.h.
#define RCC_CSR_PINRSTF ((uint32_t)0x04000000) |
PIN reset flag
Definition at line 2172 of file stm32f10x.h.
#define RCC_CSR_PORRSTF ((uint32_t)0x08000000) |
POR/PDR reset flag
Definition at line 2173 of file stm32f10x.h.
#define RCC_CSR_RMVF ((uint32_t)0x01000000) |
Remove reset flag
Definition at line 2171 of file stm32f10x.h.
#define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) |
Software Reset flag
Definition at line 2174 of file stm32f10x.h.
#define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) |
Window watchdog reset flag
Definition at line 2176 of file stm32f10x.h.
#define RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF) |
RTC Alarm High
Definition at line 4514 of file stm32f10x.h.
#define RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF) |
RTC Alarm Low
Definition at line 4517 of file stm32f10x.h.
#define RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) |
RTC Counter High
Definition at line 4508 of file stm32f10x.h.
#define RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) |
RTC Counter Low
Definition at line 4511 of file stm32f10x.h.
#define RTC_CRH_ALRIE ((uint8_t)0x02) |
Alarm Interrupt Enable
Definition at line 4484 of file stm32f10x.h.
#define RTC_CRH_OWIE ((uint8_t)0x04) |
OverfloW Interrupt Enable
Definition at line 4485 of file stm32f10x.h.
#define RTC_CRH_SECIE ((uint8_t)0x01) |
Second Interrupt Enable
Definition at line 4483 of file stm32f10x.h.
#define RTC_CRL_ALRF ((uint8_t)0x02) |
Alarm Flag
Definition at line 4489 of file stm32f10x.h.
#define RTC_CRL_CNF ((uint8_t)0x10) |
Configuration Flag
Definition at line 4492 of file stm32f10x.h.
#define RTC_CRL_OWF ((uint8_t)0x04) |
OverfloW Flag
Definition at line 4490 of file stm32f10x.h.
#define RTC_CRL_RSF ((uint8_t)0x08) |
Registers Synchronized Flag
Definition at line 4491 of file stm32f10x.h.
#define RTC_CRL_RTOFF ((uint8_t)0x20) |
RTC operation OFF
Definition at line 4493 of file stm32f10x.h.
#define RTC_CRL_SECF ((uint8_t)0x01) |
Second Flag
Definition at line 4488 of file stm32f10x.h.
#define RTC_DIVH_RTC_DIV ((uint16_t)0x000F) |
RTC Clock Divider High
Definition at line 4502 of file stm32f10x.h.
#define RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) |
RTC Clock Divider Low
Definition at line 4505 of file stm32f10x.h.
#define RTC_PRLH_PRL ((uint16_t)0x000F) |
RTC Prescaler Reload Value High
Definition at line 4496 of file stm32f10x.h.
#define RTC_PRLL_PRL ((uint16_t)0xFFFF) |
RTC Prescaler Reload Value Low
Definition at line 4499 of file stm32f10x.h.
#define SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) |
Implementation defined
Definition at line 3256 of file stm32f10x.h.
#define SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) |
Data endianness bit
Definition at line 3177 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) |
PRIGROUP[2:0] bits (Priority group)
Definition at line 3162 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) |
Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority)
Definition at line 3168 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) |
Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority)
Definition at line 3169 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) |
Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority)
Definition at line 3170 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) |
Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority)
Definition at line 3171 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) |
Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority)
Definition at line 3172 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) |
Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority)
Definition at line 3173 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) |
Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority)
Definition at line 3174 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) |
Priority group=7 (no pre-emption priority, 8 bits of subpriority)
Definition at line 3175 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) |
Bit 0
Definition at line 3163 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) |
Bit 1
Definition at line 3164 of file stm32f10x.h.
#define SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) |
Bit 2
Definition at line 3165 of file stm32f10x.h.
#define SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) |
Requests chip control logic to generate a reset
Definition at line 3160 of file stm32f10x.h.
#define SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) |
Clear active vector bit
Definition at line 3159 of file stm32f10x.h.
#define SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) |
Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT)
Definition at line 3178 of file stm32f10x.h.
#define SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) |
System Reset bit
Definition at line 3158 of file stm32f10x.h.
#define SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) |
Bus fault address field
Definition at line 3253 of file stm32f10x.h.
#define SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) |
Handlers running at priority -1 and -2
Definition at line 3190 of file stm32f10x.h.
#define SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) |
Trap on Divide by 0
Definition at line 3189 of file stm32f10x.h.
#define SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) |
Thread mode can be entered from any level in Handler mode by controlled return value
Definition at line 3186 of file stm32f10x.h.
#define SCB_CCR_STKALIGN ((uint16_t)0x0200) |
On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned
Definition at line 3191 of file stm32f10x.h.
#define SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) |
Trap for unaligned access
Definition at line 3188 of file stm32f10x.h.
#define SCB_CCR_USERSETMPEND ((uint16_t)0x0002) |
Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception
Definition at line 3187 of file stm32f10x.h.
#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000) |
Bus Fault Address Register address valid flag UFSR
Definition at line 3228 of file stm32f10x.h.
#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) |
Data access violation
Definition at line 3218 of file stm32f10x.h.
#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) |
Fault occurs when SDIV or DIV instruction is used with a divisor of 0
Definition at line 3235 of file stm32f10x.h.
#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) |
< MFSR Instruction access violation
Definition at line 3217 of file stm32f10x.h.
#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100) |
Instruction bus error flag
Definition at line 3223 of file stm32f10x.h.
#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) |
Imprecise data bus error
Definition at line 3225 of file stm32f10x.h.
#define SCB_CFSR_INVPC ((uint32_t)0x00040000) |
Attempt to load EXC_RETURN into pc illegally
Definition at line 3232 of file stm32f10x.h.
#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000) |
Invalid combination of EPSR and instruction
Definition at line 3231 of file stm32f10x.h.
#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080) |
Memory Manage Address Register address valid flag BFSR
Definition at line 3221 of file stm32f10x.h.
#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010) |
Stacking error
Definition at line 3220 of file stm32f10x.h.
#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) |
Unstacking error
Definition at line 3219 of file stm32f10x.h.
#define SCB_CFSR_NOCP ((uint32_t)0x00080000) |
Attempt to use a coprocessor instruction
Definition at line 3233 of file stm32f10x.h.
#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200) |
Precise data bus error
Definition at line 3224 of file stm32f10x.h.
#define SCB_CFSR_STKERR ((uint32_t)0x00001000) |
Stacking error
Definition at line 3227 of file stm32f10x.h.
#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) |
Fault occurs when there is an attempt to make an unaligned memory access
Definition at line 3234 of file stm32f10x.h.
#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) |
The processor attempt to execute an undefined instruction
Definition at line 3230 of file stm32f10x.h.
#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) |
Unstacking error
Definition at line 3226 of file stm32f10x.h.
#define SCB_CPUID_Constant ((uint32_t)0x000F0000) |
Reads as 0x0F
Definition at line 3137 of file stm32f10x.h.
#define SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) |
Implementer code. ARM is 0x41
Definition at line 3139 of file stm32f10x.h.
#define SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) |
Number of processor within family
Definition at line 3136 of file stm32f10x.h.
#define SCB_CPUID_REVISION ((uint32_t)0x0000000F) |
Implementation defined revision number
Definition at line 3135 of file stm32f10x.h.
#define SCB_CPUID_VARIANT ((uint32_t)0x00F00000) |
Implementation defined variant number
Definition at line 3138 of file stm32f10x.h.
#define SCB_DFSR_BKPT ((uint8_t)0x02) |
BKPT flag
Definition at line 3244 of file stm32f10x.h.
#define SCB_DFSR_DWTTRAP ((uint8_t)0x04) |
Data Watchpoint and Trace (DWT) flag
Definition at line 3245 of file stm32f10x.h.
#define SCB_DFSR_EXTERNAL ((uint8_t)0x10) |
External debug request flag
Definition at line 3247 of file stm32f10x.h.
#define SCB_DFSR_HALTED ((uint8_t)0x01) |
Halt request flag
Definition at line 3243 of file stm32f10x.h.
#define SCB_DFSR_VCATCH ((uint8_t)0x08) |
Vector catch flag
Definition at line 3246 of file stm32f10x.h.
#define SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) |
Fault related to debug
Definition at line 3240 of file stm32f10x.h.
#define SCB_HFSR_FORCED ((uint32_t)0x40000000) |
Hard Fault activated when a configurable Fault was received and cannot activate
Definition at line 3239 of file stm32f10x.h.
#define SCB_HFSR_VECTTBL ((uint32_t)0x00000002) |
Fault occurs because of vector table read on exception processing
Definition at line 3238 of file stm32f10x.h.
#define SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) |
Interrupt pending flag
Definition at line 3145 of file stm32f10x.h.
#define SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) |
It indicates that a pending interrupt becomes active in the next running cycle
Definition at line 3146 of file stm32f10x.h.
#define SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) |
Set pending NMI bit
Definition at line 3151 of file stm32f10x.h.
#define SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) |
Clear pending SysTick bit
Definition at line 3147 of file stm32f10x.h.
#define SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) |
Set pending SysTick bit
Definition at line 3148 of file stm32f10x.h.
#define SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) |
Clear pending pendSV bit
Definition at line 3149 of file stm32f10x.h.
#define SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) |
Set pending pendSV bit
Definition at line 3150 of file stm32f10x.h.
#define SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) |
All active exceptions minus the IPSR_current_exception yields the empty set
Definition at line 3143 of file stm32f10x.h.
#define SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) |
Active ISR number field
Definition at line 3142 of file stm32f10x.h.
#define SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) |
Pending ISR number field
Definition at line 3144 of file stm32f10x.h.
#define SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) |
Mem Manage fault address field
Definition at line 3250 of file stm32f10x.h.
#define SCB_SCR_SEVONPEND ((uint8_t)0x10) |
Wake up from WFE
Definition at line 3183 of file stm32f10x.h.
#define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) |
Sleep deep bit
Definition at line 3182 of file stm32f10x.h.
#define SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) |
Sleep on exit bit
Definition at line 3181 of file stm32f10x.h.
#define SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) |
BusFault is active
Definition at line 3201 of file stm32f10x.h.
#define SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) |
Bus Fault enable
Definition at line 3212 of file stm32f10x.h.
#define SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) |
Bus Fault is pended
Definition at line 3209 of file stm32f10x.h.
#define SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) |
MemManage is active
Definition at line 3200 of file stm32f10x.h.
#define SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) |
MemManage enable
Definition at line 3211 of file stm32f10x.h.
#define SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) |
MemManage is pended
Definition at line 3208 of file stm32f10x.h.
#define SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) |
Monitor is active
Definition at line 3204 of file stm32f10x.h.
#define SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) |
PendSV is active
Definition at line 3205 of file stm32f10x.h.
#define SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) |
SVCall is active
Definition at line 3203 of file stm32f10x.h.
#define SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) |
SVCall is pended
Definition at line 3210 of file stm32f10x.h.
#define SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) |
SysTick is active
Definition at line 3206 of file stm32f10x.h.
#define SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) |
UsageFault is active
Definition at line 3202 of file stm32f10x.h.
#define SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) |
UsageFault enable
Definition at line 3213 of file stm32f10x.h.
#define SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) |
Usage Fault is pended
Definition at line 3207 of file stm32f10x.h.
#define SCB_SHPR_PRI_N ((uint32_t)0x000000FF) |
Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor
Definition at line 3194 of file stm32f10x.h.
#define SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) |
Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved
Definition at line 3195 of file stm32f10x.h.
#define SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) |
Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV
Definition at line 3196 of file stm32f10x.h.
#define SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) |
Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick
Definition at line 3197 of file stm32f10x.h.
#define SCB_VTOR_TBLBASE ((uint32_t)0x20000000) |
Table base in code(0) or RAM(1) ***************** Bit definition for SCB_AIRCR register
Definition at line 3155 of file stm32f10x.h.
#define SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) |
Vector table base offset field
Definition at line 3154 of file stm32f10x.h.
#define SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) |
Command argument
Definition at line 5409 of file stm32f10x.h.
#define SDIO_CLKCR_BYPASS ((uint16_t)0x0400) |
Clock divider bypass enable bit
Definition at line 5399 of file stm32f10x.h.
#define SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) |
Clock divide factor
Definition at line 5396 of file stm32f10x.h.
#define SDIO_CLKCR_CLKEN ((uint16_t)0x0100) |
Clock enable bit
Definition at line 5397 of file stm32f10x.h.
#define SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) |
HW Flow Control enable
Definition at line 5406 of file stm32f10x.h.
#define SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) |
SDIO_CK dephasing selection bit
Definition at line 5405 of file stm32f10x.h.
#define SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) |
Power saving configuration bit
Definition at line 5398 of file stm32f10x.h.
#define SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) |
WIDBUS[1:0] bits (Wide bus mode enable bit)
Definition at line 5401 of file stm32f10x.h.
#define SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) |
Bit 0
Definition at line 5402 of file stm32f10x.h.
#define SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) |
Bit 1
Definition at line 5403 of file stm32f10x.h.
#define SDIO_CMD_CEATACMD ((uint16_t)0x4000) |
CE-ATA command
Definition at line 5424 of file stm32f10x.h.
#define SDIO_CMD_CMDINDEX ((uint16_t)0x003F) |
Command Index
Definition at line 5412 of file stm32f10x.h.
#define SDIO_CMD_CPSMEN ((uint16_t)0x0400) |
Command path state machine (CPSM) Enable bit
Definition at line 5420 of file stm32f10x.h.
#define SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) |
Enable CMD completion
Definition at line 5422 of file stm32f10x.h.
#define SDIO_CMD_NIEN ((uint16_t)0x2000) |
Not Interrupt Enable
Definition at line 5423 of file stm32f10x.h.
#define SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) |
SD I/O suspend command
Definition at line 5421 of file stm32f10x.h.
#define SDIO_CMD_WAITINT ((uint16_t)0x0100) |
CPSM Waits for Interrupt Request
Definition at line 5418 of file stm32f10x.h.
#define SDIO_CMD_WAITPEND ((uint16_t)0x0200) |
CPSM Waits for ends of data transfer (CmdPend internal signal)
Definition at line 5419 of file stm32f10x.h.
#define SDIO_CMD_WAITRESP ((uint16_t)0x00C0) |
WAITRESP[1:0] bits (Wait for response bits)
Definition at line 5414 of file stm32f10x.h.
#define SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) |
Bit 0
Definition at line 5415 of file stm32f10x.h.
#define SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) |
Bit 1
Definition at line 5416 of file stm32f10x.h.
#define SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) |
Data count value
Definition at line 5468 of file stm32f10x.h.
#define SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) |
DBLOCKSIZE[3:0] bits (Data block size)
Definition at line 5456 of file stm32f10x.h.
#define SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5457 of file stm32f10x.h.
#define SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5458 of file stm32f10x.h.
#define SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 5459 of file stm32f10x.h.
#define SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) |
Bit 3
Definition at line 5460 of file stm32f10x.h.
#define SDIO_DCTRL_DMAEN ((uint16_t)0x0008) |
DMA enabled bit
Definition at line 5454 of file stm32f10x.h.
#define SDIO_DCTRL_DTDIR ((uint16_t)0x0002) |
Data transfer direction selection
Definition at line 5452 of file stm32f10x.h.
#define SDIO_DCTRL_DTEN ((uint16_t)0x0001) |
Data transfer enabled bit
Definition at line 5451 of file stm32f10x.h.
#define SDIO_DCTRL_DTMODE ((uint16_t)0x0004) |
Data transfer mode selection
Definition at line 5453 of file stm32f10x.h.
#define SDIO_DCTRL_RWMOD ((uint16_t)0x0400) |
Read wait mode
Definition at line 5464 of file stm32f10x.h.
#define SDIO_DCTRL_RWSTART ((uint16_t)0x0100) |
Read wait start
Definition at line 5462 of file stm32f10x.h.
#define SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) |
Read wait stop
Definition at line 5463 of file stm32f10x.h.
#define SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) |
SD I/O enable functions
Definition at line 5465 of file stm32f10x.h.
#define SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) |
Data length value
Definition at line 5448 of file stm32f10x.h.
#define SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) |
Data timeout period.
Definition at line 5445 of file stm32f10x.h.
#define SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) |
Receive and transmit FIFO data
Definition at line 5541 of file stm32f10x.h.
#define SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) |
Remaining number of words to be written to or read from the FIFO
Definition at line 5538 of file stm32f10x.h.
#define SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) |
CCRCFAIL flag clear bit
Definition at line 5497 of file stm32f10x.h.
#define SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) |
CEATAEND flag clear bit
Definition at line 5509 of file stm32f10x.h.
#define SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) |
CMDREND flag clear bit
Definition at line 5503 of file stm32f10x.h.
#define SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) |
CMDSENT flag clear bit
Definition at line 5504 of file stm32f10x.h.
#define SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) |
CTIMEOUT flag clear bit
Definition at line 5499 of file stm32f10x.h.
#define SDIO_ICR_DATAENDC ((uint32_t)0x00000100) |
DATAEND flag clear bit
Definition at line 5505 of file stm32f10x.h.
#define SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) |
DBCKEND flag clear bit
Definition at line 5507 of file stm32f10x.h.
#define SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) |
DCRCFAIL flag clear bit
Definition at line 5498 of file stm32f10x.h.
#define SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) |
DTIMEOUT flag clear bit
Definition at line 5500 of file stm32f10x.h.
#define SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) |
RXOVERR flag clear bit
Definition at line 5502 of file stm32f10x.h.
#define SDIO_ICR_SDIOITC ((uint32_t)0x00400000) |
SDIOIT flag clear bit
Definition at line 5508 of file stm32f10x.h.
#define SDIO_ICR_STBITERRC ((uint32_t)0x00000200) |
STBITERR flag clear bit
Definition at line 5506 of file stm32f10x.h.
#define SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) |
TXUNDERR flag clear bit
Definition at line 5501 of file stm32f10x.h.
#define SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) |
Command CRC Fail Interrupt Enable
Definition at line 5512 of file stm32f10x.h.
#define SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) |
CE-ATA command completion signal received Interrupt Enable
Definition at line 5535 of file stm32f10x.h.
#define SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) |
Command Acting Interrupt Enable
Definition at line 5523 of file stm32f10x.h.
#define SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) |
Command Response Received Interrupt Enable
Definition at line 5518 of file stm32f10x.h.
#define SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) |
Command Sent Interrupt Enable
Definition at line 5519 of file stm32f10x.h.
#define SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) |
Command TimeOut Interrupt Enable
Definition at line 5514 of file stm32f10x.h.
#define SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) |
Data End Interrupt Enable
Definition at line 5520 of file stm32f10x.h.
#define SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) |
Data Block End Interrupt Enable
Definition at line 5522 of file stm32f10x.h.
#define SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) |
Data CRC Fail Interrupt Enable
Definition at line 5513 of file stm32f10x.h.
#define SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) |
Data TimeOut Interrupt Enable
Definition at line 5515 of file stm32f10x.h.
#define SDIO_MASK_RXACTIE ((uint32_t)0x00002000) |
Data receive acting interrupt enabled
Definition at line 5525 of file stm32f10x.h.
#define SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) |
Data available in Rx FIFO interrupt Enable
Definition at line 5533 of file stm32f10x.h.
#define SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) |
Rx FIFO Empty interrupt Enable
Definition at line 5531 of file stm32f10x.h.
#define SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) |
Rx FIFO Full interrupt Enable
Definition at line 5529 of file stm32f10x.h.
#define SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) |
Rx FIFO Half Full interrupt Enable
Definition at line 5527 of file stm32f10x.h.
#define SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) |
Rx FIFO OverRun Error Interrupt Enable
Definition at line 5517 of file stm32f10x.h.
#define SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) |
SDIO Mode Interrupt Received interrupt Enable
Definition at line 5534 of file stm32f10x.h.
#define SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) |
Start Bit Error Interrupt Enable
Definition at line 5521 of file stm32f10x.h.
#define SDIO_MASK_TXACTIE ((uint32_t)0x00001000) |
Data Transmit Acting Interrupt Enable
Definition at line 5524 of file stm32f10x.h.
#define SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) |
Data available in Tx FIFO interrupt Enable
Definition at line 5532 of file stm32f10x.h.
#define SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) |
Tx FIFO Empty interrupt Enable
Definition at line 5530 of file stm32f10x.h.
#define SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) |
Tx FIFO Full interrupt Enable
Definition at line 5528 of file stm32f10x.h.
#define SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) |
Tx FIFO Half Empty interrupt Enable
Definition at line 5526 of file stm32f10x.h.
#define SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) |
Tx FIFO UnderRun Error Interrupt Enable
Definition at line 5516 of file stm32f10x.h.
#define SDIO_POWER_PWRCTRL ((uint8_t)0x03) |
PWRCTRL[1:0] bits (Power supply control bits)
Definition at line 5391 of file stm32f10x.h.
#define SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) |
Bit 0
Definition at line 5392 of file stm32f10x.h.
#define SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) |
Bit 1
Definition at line 5393 of file stm32f10x.h.
#define SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) |
Card Status
Definition at line 5430 of file stm32f10x.h.
#define SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) |
Card Status
Definition at line 5433 of file stm32f10x.h.
#define SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) |
Card Status
Definition at line 5436 of file stm32f10x.h.
#define SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) |
Card Status
Definition at line 5439 of file stm32f10x.h.
#define SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) |
Card Status
Definition at line 5442 of file stm32f10x.h.
#define SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) |
Response command index
Definition at line 5427 of file stm32f10x.h.
#define SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) |
Command response received (CRC check failed)
Definition at line 5471 of file stm32f10x.h.
#define SDIO_STA_CEATAEND ((uint32_t)0x00800000) |
CE-ATA command completion signal received for CMD61
Definition at line 5494 of file stm32f10x.h.
#define SDIO_STA_CMDACT ((uint32_t)0x00000800) |
Command transfer in progress
Definition at line 5482 of file stm32f10x.h.
#define SDIO_STA_CMDREND ((uint32_t)0x00000040) |
Command response received (CRC check passed)
Definition at line 5477 of file stm32f10x.h.
#define SDIO_STA_CMDSENT ((uint32_t)0x00000080) |
Command sent (no response required)
Definition at line 5478 of file stm32f10x.h.
#define SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) |
Command response timeout
Definition at line 5473 of file stm32f10x.h.
#define SDIO_STA_DATAEND ((uint32_t)0x00000100) |
Data end (data counter, SDIDCOUNT, is zero)
Definition at line 5479 of file stm32f10x.h.
#define SDIO_STA_DBCKEND ((uint32_t)0x00000400) |
Data block sent/received (CRC check passed)
Definition at line 5481 of file stm32f10x.h.
#define SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) |
Data block sent/received (CRC check failed)
Definition at line 5472 of file stm32f10x.h.
#define SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) |
Data timeout
Definition at line 5474 of file stm32f10x.h.
#define SDIO_STA_RXACT ((uint32_t)0x00002000) |
Data receive in progress
Definition at line 5484 of file stm32f10x.h.
#define SDIO_STA_RXDAVL ((uint32_t)0x00200000) |
Data available in receive FIFO
Definition at line 5492 of file stm32f10x.h.
#define SDIO_STA_RXFIFOE ((uint32_t)0x00080000) |
Receive FIFO empty
Definition at line 5490 of file stm32f10x.h.
#define SDIO_STA_RXFIFOF ((uint32_t)0x00020000) |
Receive FIFO full
Definition at line 5488 of file stm32f10x.h.
#define SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) |
Receive FIFO Half Full: there are at least 8 words in the FIFO
Definition at line 5486 of file stm32f10x.h.
#define SDIO_STA_RXOVERR ((uint32_t)0x00000020) |
Received FIFO overrun error
Definition at line 5476 of file stm32f10x.h.
#define SDIO_STA_SDIOIT ((uint32_t)0x00400000) |
SDIO interrupt received
Definition at line 5493 of file stm32f10x.h.
#define SDIO_STA_STBITERR ((uint32_t)0x00000200) |
Start bit not detected on all data signals in wide bus mode
Definition at line 5480 of file stm32f10x.h.
#define SDIO_STA_TXACT ((uint32_t)0x00001000) |
Data transmit in progress
Definition at line 5483 of file stm32f10x.h.
#define SDIO_STA_TXDAVL ((uint32_t)0x00100000) |
Data available in transmit FIFO
Definition at line 5491 of file stm32f10x.h.
#define SDIO_STA_TXFIFOE ((uint32_t)0x00040000) |
Transmit FIFO empty
Definition at line 5489 of file stm32f10x.h.
#define SDIO_STA_TXFIFOF ((uint32_t)0x00010000) |
Transmit FIFO full
Definition at line 5487 of file stm32f10x.h.
#define SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) |
Transmit FIFO Half Empty: at least 8 words can be written into the FIFO
Definition at line 5485 of file stm32f10x.h.
#define SDIO_STA_TXUNDERR ((uint32_t)0x00000010) |
Transmit FIFO underrun error
Definition at line 5475 of file stm32f10x.h.
#define SPI_CR1_BIDIMODE ((uint16_t)0x8000) |
Bidirectional data mode enable
Definition at line 7485 of file stm32f10x.h.
#define SPI_CR1_BIDIOE ((uint16_t)0x4000) |
Output enable in bidirectional mode
Definition at line 7484 of file stm32f10x.h.
#define SPI_CR1_BR ((uint16_t)0x0038) |
BR[2:0] bits (Baud Rate Control)
Definition at line 7471 of file stm32f10x.h.
#define SPI_CR1_BR_0 ((uint16_t)0x0008) |
Bit 0
Definition at line 7472 of file stm32f10x.h.
#define SPI_CR1_BR_1 ((uint16_t)0x0010) |
Bit 1
Definition at line 7473 of file stm32f10x.h.
#define SPI_CR1_BR_2 ((uint16_t)0x0020) |
Bit 2
Definition at line 7474 of file stm32f10x.h.
#define SPI_CR1_CPHA ((uint16_t)0x0001) |
Clock Phase
Definition at line 7467 of file stm32f10x.h.
#define SPI_CR1_CPOL ((uint16_t)0x0002) |
Clock Polarity
Definition at line 7468 of file stm32f10x.h.
#define SPI_CR1_CRCEN ((uint16_t)0x2000) |
Hardware CRC calculation enable
Definition at line 7483 of file stm32f10x.h.
#define SPI_CR1_CRCNEXT ((uint16_t)0x1000) |
Transmit CRC next
Definition at line 7482 of file stm32f10x.h.
#define SPI_CR1_DFF ((uint16_t)0x0800) |
Data Frame Format
Definition at line 7481 of file stm32f10x.h.
#define SPI_CR1_LSBFIRST ((uint16_t)0x0080) |
Frame Format
Definition at line 7477 of file stm32f10x.h.
#define SPI_CR1_MSTR ((uint16_t)0x0004) |
Master Selection
Definition at line 7469 of file stm32f10x.h.
#define SPI_CR1_RXONLY ((uint16_t)0x0400) |
Receive only
Definition at line 7480 of file stm32f10x.h.
#define SPI_CR1_SPE ((uint16_t)0x0040) |
SPI Enable
Definition at line 7476 of file stm32f10x.h.
#define SPI_CR1_SSI ((uint16_t)0x0100) |
Internal slave select
Definition at line 7478 of file stm32f10x.h.
#define SPI_CR1_SSM ((uint16_t)0x0200) |
Software slave management
Definition at line 7479 of file stm32f10x.h.
#define SPI_CR2_ERRIE ((uint8_t)0x20) |
Error Interrupt Enable
Definition at line 7491 of file stm32f10x.h.
#define SPI_CR2_RXDMAEN ((uint8_t)0x01) |
Rx Buffer DMA Enable
Definition at line 7488 of file stm32f10x.h.
#define SPI_CR2_RXNEIE ((uint8_t)0x40) |
RX buffer Not Empty Interrupt Enable
Definition at line 7492 of file stm32f10x.h.
#define SPI_CR2_SSOE ((uint8_t)0x04) |
SS Output Enable
Definition at line 7490 of file stm32f10x.h.
#define SPI_CR2_TXDMAEN ((uint8_t)0x02) |
Tx Buffer DMA Enable
Definition at line 7489 of file stm32f10x.h.
#define SPI_CR2_TXEIE ((uint8_t)0x80) |
Tx buffer Empty Interrupt Enable
Definition at line 7493 of file stm32f10x.h.
#define SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) |
CRC polynomial register
Definition at line 7509 of file stm32f10x.h.
#define SPI_DR_DR ((uint16_t)0xFFFF) |
Data Register
Definition at line 7506 of file stm32f10x.h.
#define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) |
Channel length (number of bits per audio channel)
Definition at line 7518 of file stm32f10x.h.
#define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) |
steady state clock polarity
Definition at line 7524 of file stm32f10x.h.
#define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) |
DATLEN[1:0] bits (Data length to be transferred)
Definition at line 7520 of file stm32f10x.h.
#define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) |
Bit 0
Definition at line 7521 of file stm32f10x.h.
#define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) |
Bit 1
Definition at line 7522 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) |
I2SCFG[1:0] bits (I2S configuration mode)
Definition at line 7532 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 7533 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 7534 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) |
I2S Enable
Definition at line 7536 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) |
I2S mode selection
Definition at line 7537 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) |
I2SSTD[1:0] bits (I2S standard selection)
Definition at line 7526 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 7527 of file stm32f10x.h.
#define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 7528 of file stm32f10x.h.
#define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) |
PCM frame synchronization
Definition at line 7530 of file stm32f10x.h.
#define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) |
I2S Linear prescaler
Definition at line 7540 of file stm32f10x.h.
#define SPI_I2SPR_MCKOE ((uint16_t)0x0200) |
Master Clock Output Enable
Definition at line 7542 of file stm32f10x.h.
#define SPI_I2SPR_ODD ((uint16_t)0x0100) |
Odd factor for the prescaler
Definition at line 7541 of file stm32f10x.h.
#define SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) |
Rx CRC Register
Definition at line 7512 of file stm32f10x.h.
#define SPI_SR_BSY ((uint8_t)0x80) |
Busy flag
Definition at line 7503 of file stm32f10x.h.
#define SPI_SR_CHSIDE ((uint8_t)0x04) |
Channel side
Definition at line 7498 of file stm32f10x.h.
#define SPI_SR_CRCERR ((uint8_t)0x10) |
CRC Error flag
Definition at line 7500 of file stm32f10x.h.
#define SPI_SR_MODF ((uint8_t)0x20) |
Mode fault
Definition at line 7501 of file stm32f10x.h.
#define SPI_SR_OVR ((uint8_t)0x40) |
Overrun flag
Definition at line 7502 of file stm32f10x.h.
#define SPI_SR_RXNE ((uint8_t)0x01) |
Receive buffer Not Empty
Definition at line 7496 of file stm32f10x.h.
#define SPI_SR_TXE ((uint8_t)0x02) |
Transmit buffer Empty
Definition at line 7497 of file stm32f10x.h.
#define SPI_SR_UDR ((uint8_t)0x08) |
Underrun flag
Definition at line 7499 of file stm32f10x.h.
#define SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) |
Tx CRC Register
Definition at line 7515 of file stm32f10x.h.
#define SysTick_CALIB_NOREF ((uint32_t)0x80000000) |
The reference clock is not provided
Definition at line 2903 of file stm32f10x.h.
#define SysTick_CALIB_SKEW ((uint32_t)0x40000000) |
Calibration value is not exactly 10 ms
Definition at line 2902 of file stm32f10x.h.
#define SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) |
Reload value to use for 10ms timing
Definition at line 2901 of file stm32f10x.h.
#define SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) |
Clock source
Definition at line 2891 of file stm32f10x.h.
#define SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) |
Count Flag
Definition at line 2892 of file stm32f10x.h.
#define SysTick_CTRL_ENABLE ((uint32_t)0x00000001) |
Counter enable
Definition at line 2889 of file stm32f10x.h.
#define SysTick_CTRL_TICKINT ((uint32_t)0x00000002) |
Counting down to 0 pends the SysTick handler
Definition at line 2890 of file stm32f10x.h.
#define SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) |
Value to load into the SysTick Current Value Register when the counter reaches 0
Definition at line 2895 of file stm32f10x.h.
#define SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) |
Current value at the time the register is accessed
Definition at line 2898 of file stm32f10x.h.
#define TIM_ARR_ARR ((uint16_t)0xFFFF) |
actual auto-reload Value
Definition at line 4419 of file stm32f10x.h.
#define TIM_BDTR_AOE ((uint16_t)0x4000) |
Automatic Output enable
Definition at line 4455 of file stm32f10x.h.
#define TIM_BDTR_BKE ((uint16_t)0x1000) |
Break enable
Definition at line 4453 of file stm32f10x.h.
#define TIM_BDTR_BKP ((uint16_t)0x2000) |
Break Polarity
Definition at line 4454 of file stm32f10x.h.
#define TIM_BDTR_DTG ((uint16_t)0x00FF) |
DTG[0:7] bits (Dead-Time Generator set-up)
Definition at line 4437 of file stm32f10x.h.
#define TIM_BDTR_DTG_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4438 of file stm32f10x.h.
#define TIM_BDTR_DTG_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4439 of file stm32f10x.h.
#define TIM_BDTR_DTG_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 4440 of file stm32f10x.h.
#define TIM_BDTR_DTG_3 ((uint16_t)0x0008) |
Bit 3
Definition at line 4441 of file stm32f10x.h.
#define TIM_BDTR_DTG_4 ((uint16_t)0x0010) |
Bit 4
Definition at line 4442 of file stm32f10x.h.
#define TIM_BDTR_DTG_5 ((uint16_t)0x0020) |
Bit 5
Definition at line 4443 of file stm32f10x.h.
#define TIM_BDTR_DTG_6 ((uint16_t)0x0040) |
Bit 6
Definition at line 4444 of file stm32f10x.h.
#define TIM_BDTR_DTG_7 ((uint16_t)0x0080) |
Bit 7
Definition at line 4445 of file stm32f10x.h.
#define TIM_BDTR_LOCK ((uint16_t)0x0300) |
LOCK[1:0] bits (Lock Configuration)
Definition at line 4447 of file stm32f10x.h.
#define TIM_BDTR_LOCK_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4448 of file stm32f10x.h.
#define TIM_BDTR_LOCK_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4449 of file stm32f10x.h.
#define TIM_BDTR_MOE ((uint16_t)0x8000) |
Main Output enable
Definition at line 4456 of file stm32f10x.h.
#define TIM_BDTR_OSSI ((uint16_t)0x0400) |
Off-State Selection for Idle mode
Definition at line 4451 of file stm32f10x.h.
#define TIM_BDTR_OSSR ((uint16_t)0x0800) |
Off-State Selection for Run mode
Definition at line 4452 of file stm32f10x.h.
#define TIM_CCER_CC1E ((uint16_t)0x0001) |
Capture/Compare 1 output enable
Definition at line 4396 of file stm32f10x.h.
#define TIM_CCER_CC1NE ((uint16_t)0x0004) |
Capture/Compare 1 Complementary output enable
Definition at line 4398 of file stm32f10x.h.
#define TIM_CCER_CC1NP ((uint16_t)0x0008) |
Capture/Compare 1 Complementary output Polarity
Definition at line 4399 of file stm32f10x.h.
#define TIM_CCER_CC1P ((uint16_t)0x0002) |
Capture/Compare 1 output Polarity
Definition at line 4397 of file stm32f10x.h.
#define TIM_CCER_CC2E ((uint16_t)0x0010) |
Capture/Compare 2 output enable
Definition at line 4400 of file stm32f10x.h.
#define TIM_CCER_CC2NE ((uint16_t)0x0040) |
Capture/Compare 2 Complementary output enable
Definition at line 4402 of file stm32f10x.h.
#define TIM_CCER_CC2NP ((uint16_t)0x0080) |
Capture/Compare 2 Complementary output Polarity
Definition at line 4403 of file stm32f10x.h.
#define TIM_CCER_CC2P ((uint16_t)0x0020) |
Capture/Compare 2 output Polarity
Definition at line 4401 of file stm32f10x.h.
#define TIM_CCER_CC3E ((uint16_t)0x0100) |
Capture/Compare 3 output enable
Definition at line 4404 of file stm32f10x.h.
#define TIM_CCER_CC3NE ((uint16_t)0x0400) |
Capture/Compare 3 Complementary output enable
Definition at line 4406 of file stm32f10x.h.
#define TIM_CCER_CC3NP ((uint16_t)0x0800) |
Capture/Compare 3 Complementary output Polarity
Definition at line 4407 of file stm32f10x.h.
#define TIM_CCER_CC3P ((uint16_t)0x0200) |
Capture/Compare 3 output Polarity
Definition at line 4405 of file stm32f10x.h.
#define TIM_CCER_CC4E ((uint16_t)0x1000) |
Capture/Compare 4 output enable
Definition at line 4408 of file stm32f10x.h.
#define TIM_CCER_CC4NP ((uint16_t)0x8000) |
Capture/Compare 4 Complementary output Polarity
Definition at line 4410 of file stm32f10x.h.
#define TIM_CCER_CC4P ((uint16_t)0x2000) |
Capture/Compare 4 output Polarity
Definition at line 4409 of file stm32f10x.h.
#define TIM_CCMR1_CC1S ((uint16_t)0x0003) |
CC1S[1:0] bits (Capture/Compare 1 Selection)
Definition at line 4294 of file stm32f10x.h.
#define TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4295 of file stm32f10x.h.
#define TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4296 of file stm32f10x.h.
#define TIM_CCMR1_CC2S ((uint16_t)0x0300) |
CC2S[1:0] bits (Capture/Compare 2 Selection)
Definition at line 4308 of file stm32f10x.h.
#define TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4309 of file stm32f10x.h.
#define TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4310 of file stm32f10x.h.
#define TIM_CCMR1_IC1F ((uint16_t)0x00F0) |
IC1F[3:0] bits (Input Capture 1 Filter)
Definition at line 4328 of file stm32f10x.h.
#define TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4329 of file stm32f10x.h.
#define TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4330 of file stm32f10x.h.
#define TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4331 of file stm32f10x.h.
#define TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) |
Bit 3
Definition at line 4332 of file stm32f10x.h.
#define TIM_CCMR1_IC1PSC ((uint16_t)0x000C) |
IC1PSC[1:0] bits (Input Capture 1 Prescaler)
Definition at line 4324 of file stm32f10x.h.
#define TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) |
Bit 0
Definition at line 4325 of file stm32f10x.h.
#define TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) |
Bit 1
Definition at line 4326 of file stm32f10x.h.
#define TIM_CCMR1_IC2F ((uint16_t)0xF000) |
IC2F[3:0] bits (Input Capture 2 Filter)
Definition at line 4338 of file stm32f10x.h.
#define TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 4339 of file stm32f10x.h.
#define TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 4340 of file stm32f10x.h.
#define TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) |
Bit 2
Definition at line 4341 of file stm32f10x.h.
#define TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) |
Bit 3
Definition at line 4342 of file stm32f10x.h.
#define TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) |
IC2PSC[1:0] bits (Input Capture 2 Prescaler)
Definition at line 4334 of file stm32f10x.h.
#define TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 4335 of file stm32f10x.h.
#define TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 4336 of file stm32f10x.h.
#define TIM_CCMR1_OC1CE ((uint16_t)0x0080) |
Output Compare 1Clear Enable
Definition at line 4306 of file stm32f10x.h.
#define TIM_CCMR1_OC1FE ((uint16_t)0x0004) |
Output Compare 1 Fast enable
Definition at line 4298 of file stm32f10x.h.
#define TIM_CCMR1_OC1M ((uint16_t)0x0070) |
OC1M[2:0] bits (Output Compare 1 Mode)
Definition at line 4301 of file stm32f10x.h.
#define TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4302 of file stm32f10x.h.
#define TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4303 of file stm32f10x.h.
#define TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4304 of file stm32f10x.h.
#define TIM_CCMR1_OC1PE ((uint16_t)0x0008) |
Output Compare 1 Preload enable
Definition at line 4299 of file stm32f10x.h.
#define TIM_CCMR1_OC2CE ((uint16_t)0x8000) |
Output Compare 2 Clear Enable
Definition at line 4320 of file stm32f10x.h.
#define TIM_CCMR1_OC2FE ((uint16_t)0x0400) |
Output Compare 2 Fast enable
Definition at line 4312 of file stm32f10x.h.
#define TIM_CCMR1_OC2M ((uint16_t)0x7000) |
OC2M[2:0] bits (Output Compare 2 Mode)
Definition at line 4315 of file stm32f10x.h.
#define TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 4316 of file stm32f10x.h.
#define TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 4317 of file stm32f10x.h.
#define TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) |
Bit 2
Definition at line 4318 of file stm32f10x.h.
#define TIM_CCMR1_OC2PE ((uint16_t)0x0800) |
Output Compare 2 Preload enable
Definition at line 4313 of file stm32f10x.h.
#define TIM_CCMR2_CC3S ((uint16_t)0x0003) |
CC3S[1:0] bits (Capture/Compare 3 Selection)
Definition at line 4345 of file stm32f10x.h.
#define TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4346 of file stm32f10x.h.
#define TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4347 of file stm32f10x.h.
#define TIM_CCMR2_CC4S ((uint16_t)0x0300) |
CC4S[1:0] bits (Capture/Compare 4 Selection)
Definition at line 4359 of file stm32f10x.h.
#define TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4360 of file stm32f10x.h.
#define TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4361 of file stm32f10x.h.
#define TIM_CCMR2_IC3F ((uint16_t)0x00F0) |
IC3F[3:0] bits (Input Capture 3 Filter)
Definition at line 4379 of file stm32f10x.h.
#define TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4380 of file stm32f10x.h.
#define TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4381 of file stm32f10x.h.
#define TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4382 of file stm32f10x.h.
#define TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) |
Bit 3
Definition at line 4383 of file stm32f10x.h.
#define TIM_CCMR2_IC3PSC ((uint16_t)0x000C) |
IC3PSC[1:0] bits (Input Capture 3 Prescaler)
Definition at line 4375 of file stm32f10x.h.
#define TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) |
Bit 0
Definition at line 4376 of file stm32f10x.h.
#define TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) |
Bit 1
Definition at line 4377 of file stm32f10x.h.
#define TIM_CCMR2_IC4F ((uint16_t)0xF000) |
IC4F[3:0] bits (Input Capture 4 Filter)
Definition at line 4389 of file stm32f10x.h.
#define TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 4390 of file stm32f10x.h.
#define TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 4391 of file stm32f10x.h.
#define TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) |
Bit 2
Definition at line 4392 of file stm32f10x.h.
#define TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) |
Bit 3
Definition at line 4393 of file stm32f10x.h.
#define TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) |
IC4PSC[1:0] bits (Input Capture 4 Prescaler)
Definition at line 4385 of file stm32f10x.h.
#define TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 4386 of file stm32f10x.h.
#define TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 4387 of file stm32f10x.h.
#define TIM_CCMR2_OC3CE ((uint16_t)0x0080) |
Output Compare 3 Clear Enable
Definition at line 4357 of file stm32f10x.h.
#define TIM_CCMR2_OC3FE ((uint16_t)0x0004) |
Output Compare 3 Fast enable
Definition at line 4349 of file stm32f10x.h.
#define TIM_CCMR2_OC3M ((uint16_t)0x0070) |
OC3M[2:0] bits (Output Compare 3 Mode)
Definition at line 4352 of file stm32f10x.h.
#define TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4353 of file stm32f10x.h.
#define TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4354 of file stm32f10x.h.
#define TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4355 of file stm32f10x.h.
#define TIM_CCMR2_OC3PE ((uint16_t)0x0008) |
Output Compare 3 Preload enable
Definition at line 4350 of file stm32f10x.h.
#define TIM_CCMR2_OC4CE ((uint16_t)0x8000) |
Output Compare 4 Clear Enable
Definition at line 4371 of file stm32f10x.h.
#define TIM_CCMR2_OC4FE ((uint16_t)0x0400) |
Output Compare 4 Fast enable
Definition at line 4363 of file stm32f10x.h.
#define TIM_CCMR2_OC4M ((uint16_t)0x7000) |
OC4M[2:0] bits (Output Compare 4 Mode)
Definition at line 4366 of file stm32f10x.h.
#define TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 4367 of file stm32f10x.h.
#define TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 4368 of file stm32f10x.h.
#define TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) |
Bit 2
Definition at line 4369 of file stm32f10x.h.
#define TIM_CCMR2_OC4PE ((uint16_t)0x0800) |
Output Compare 4 Preload enable
Definition at line 4364 of file stm32f10x.h.
#define TIM_CCR1_CCR1 ((uint16_t)0xFFFF) |
Capture/Compare 1 Value
Definition at line 4425 of file stm32f10x.h.
#define TIM_CCR2_CCR2 ((uint16_t)0xFFFF) |
Capture/Compare 2 Value
Definition at line 4428 of file stm32f10x.h.
#define TIM_CCR3_CCR3 ((uint16_t)0xFFFF) |
Capture/Compare 3 Value
Definition at line 4431 of file stm32f10x.h.
#define TIM_CCR4_CCR4 ((uint16_t)0xFFFF) |
Capture/Compare 4 Value
Definition at line 4434 of file stm32f10x.h.
#define TIM_CNT_CNT ((uint16_t)0xFFFF) |
Counter Value
Definition at line 4413 of file stm32f10x.h.
#define TIM_CR1_ARPE ((uint16_t)0x0080) |
Auto-reload preload enable
Definition at line 4201 of file stm32f10x.h.
#define TIM_CR1_CEN ((uint16_t)0x0001) |
Counter enable
Definition at line 4191 of file stm32f10x.h.
#define TIM_CR1_CKD ((uint16_t)0x0300) |
CKD[1:0] bits (clock division)
Definition at line 4203 of file stm32f10x.h.
#define TIM_CR1_CKD_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4204 of file stm32f10x.h.
#define TIM_CR1_CKD_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4205 of file stm32f10x.h.
#define TIM_CR1_CMS ((uint16_t)0x0060) |
CMS[1:0] bits (Center-aligned mode selection)
Definition at line 4197 of file stm32f10x.h.
#define TIM_CR1_CMS_0 ((uint16_t)0x0020) |
Bit 0
Definition at line 4198 of file stm32f10x.h.
#define TIM_CR1_CMS_1 ((uint16_t)0x0040) |
Bit 1
Definition at line 4199 of file stm32f10x.h.
#define TIM_CR1_DIR ((uint16_t)0x0010) |
Direction
Definition at line 4195 of file stm32f10x.h.
#define TIM_CR1_OPM ((uint16_t)0x0008) |
One pulse mode
Definition at line 4194 of file stm32f10x.h.
#define TIM_CR1_UDIS ((uint16_t)0x0002) |
Update disable
Definition at line 4192 of file stm32f10x.h.
#define TIM_CR1_URS ((uint16_t)0x0004) |
Update request source
Definition at line 4193 of file stm32f10x.h.
#define TIM_CR2_CCDS ((uint16_t)0x0008) |
Capture/Compare DMA Selection
Definition at line 4210 of file stm32f10x.h.
#define TIM_CR2_CCPC ((uint16_t)0x0001) |
Capture/Compare Preloaded Control
Definition at line 4208 of file stm32f10x.h.
#define TIM_CR2_CCUS ((uint16_t)0x0004) |
Capture/Compare Control Update Selection
Definition at line 4209 of file stm32f10x.h.
#define TIM_CR2_MMS ((uint16_t)0x0070) |
MMS[2:0] bits (Master Mode Selection)
Definition at line 4212 of file stm32f10x.h.
#define TIM_CR2_MMS_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4213 of file stm32f10x.h.
#define TIM_CR2_MMS_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4214 of file stm32f10x.h.
#define TIM_CR2_MMS_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4215 of file stm32f10x.h.
#define TIM_CR2_OIS1 ((uint16_t)0x0100) |
Output Idle state 1 (OC1 output)
Definition at line 4218 of file stm32f10x.h.
#define TIM_CR2_OIS1N ((uint16_t)0x0200) |
Output Idle state 1 (OC1N output)
Definition at line 4219 of file stm32f10x.h.
#define TIM_CR2_OIS2 ((uint16_t)0x0400) |
Output Idle state 2 (OC2 output)
Definition at line 4220 of file stm32f10x.h.
#define TIM_CR2_OIS2N ((uint16_t)0x0800) |
Output Idle state 2 (OC2N output)
Definition at line 4221 of file stm32f10x.h.
#define TIM_CR2_OIS3 ((uint16_t)0x1000) |
Output Idle state 3 (OC3 output)
Definition at line 4222 of file stm32f10x.h.
#define TIM_CR2_OIS3N ((uint16_t)0x2000) |
Output Idle state 3 (OC3N output)
Definition at line 4223 of file stm32f10x.h.
#define TIM_CR2_OIS4 ((uint16_t)0x4000) |
Output Idle state 4 (OC4 output)
Definition at line 4224 of file stm32f10x.h.
#define TIM_CR2_TI1S ((uint16_t)0x0080) |
TI1 Selection
Definition at line 4217 of file stm32f10x.h.
#define TIM_DCR_DBA ((uint16_t)0x001F) |
DBA[4:0] bits (DMA Base Address)
Definition at line 4459 of file stm32f10x.h.
#define TIM_DCR_DBA_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4460 of file stm32f10x.h.
#define TIM_DCR_DBA_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4461 of file stm32f10x.h.
#define TIM_DCR_DBA_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 4462 of file stm32f10x.h.
#define TIM_DCR_DBA_3 ((uint16_t)0x0008) |
Bit 3
Definition at line 4463 of file stm32f10x.h.
#define TIM_DCR_DBA_4 ((uint16_t)0x0010) |
Bit 4
Definition at line 4464 of file stm32f10x.h.
#define TIM_DCR_DBL ((uint16_t)0x1F00) |
DBL[4:0] bits (DMA Burst Length)
Definition at line 4466 of file stm32f10x.h.
#define TIM_DCR_DBL_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4467 of file stm32f10x.h.
#define TIM_DCR_DBL_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4468 of file stm32f10x.h.
#define TIM_DCR_DBL_2 ((uint16_t)0x0400) |
Bit 2
Definition at line 4469 of file stm32f10x.h.
#define TIM_DCR_DBL_3 ((uint16_t)0x0800) |
Bit 3
Definition at line 4470 of file stm32f10x.h.
#define TIM_DCR_DBL_4 ((uint16_t)0x1000) |
Bit 4
Definition at line 4471 of file stm32f10x.h.
#define TIM_DIER_BIE ((uint16_t)0x0080) |
Break interrupt enable
Definition at line 4260 of file stm32f10x.h.
#define TIM_DIER_CC1DE ((uint16_t)0x0200) |
Capture/Compare 1 DMA request enable
Definition at line 4262 of file stm32f10x.h.
#define TIM_DIER_CC1IE ((uint16_t)0x0002) |
Capture/Compare 1 interrupt enable
Definition at line 4254 of file stm32f10x.h.
#define TIM_DIER_CC2DE ((uint16_t)0x0400) |
Capture/Compare 2 DMA request enable
Definition at line 4263 of file stm32f10x.h.
#define TIM_DIER_CC2IE ((uint16_t)0x0004) |
Capture/Compare 2 interrupt enable
Definition at line 4255 of file stm32f10x.h.
#define TIM_DIER_CC3DE ((uint16_t)0x0800) |
Capture/Compare 3 DMA request enable
Definition at line 4264 of file stm32f10x.h.
#define TIM_DIER_CC3IE ((uint16_t)0x0008) |
Capture/Compare 3 interrupt enable
Definition at line 4256 of file stm32f10x.h.
#define TIM_DIER_CC4DE ((uint16_t)0x1000) |
Capture/Compare 4 DMA request enable
Definition at line 4265 of file stm32f10x.h.
#define TIM_DIER_CC4IE ((uint16_t)0x0010) |
Capture/Compare 4 interrupt enable
Definition at line 4257 of file stm32f10x.h.
#define TIM_DIER_COMDE ((uint16_t)0x2000) |
COM DMA request enable
Definition at line 4266 of file stm32f10x.h.
#define TIM_DIER_COMIE ((uint16_t)0x0020) |
COM interrupt enable
Definition at line 4258 of file stm32f10x.h.
#define TIM_DIER_TDE ((uint16_t)0x4000) |
Trigger DMA request enable
Definition at line 4267 of file stm32f10x.h.
#define TIM_DIER_TIE ((uint16_t)0x0040) |
Trigger interrupt enable
Definition at line 4259 of file stm32f10x.h.
#define TIM_DIER_UDE ((uint16_t)0x0100) |
Update DMA request enable
Definition at line 4261 of file stm32f10x.h.
#define TIM_DIER_UIE ((uint16_t)0x0001) |
Update interrupt enable
Definition at line 4253 of file stm32f10x.h.
#define TIM_DMAR_DMAB ((uint16_t)0xFFFF) |
DMA register for burst accesses
Definition at line 4474 of file stm32f10x.h.
#define TIM_EGR_BG ((uint8_t)0x80) |
Break Generation
Definition at line 4291 of file stm32f10x.h.
#define TIM_EGR_CC1G ((uint8_t)0x02) |
Capture/Compare 1 Generation
Definition at line 4285 of file stm32f10x.h.
#define TIM_EGR_CC2G ((uint8_t)0x04) |
Capture/Compare 2 Generation
Definition at line 4286 of file stm32f10x.h.
#define TIM_EGR_CC3G ((uint8_t)0x08) |
Capture/Compare 3 Generation
Definition at line 4287 of file stm32f10x.h.
#define TIM_EGR_CC4G ((uint8_t)0x10) |
Capture/Compare 4 Generation
Definition at line 4288 of file stm32f10x.h.
#define TIM_EGR_COMG ((uint8_t)0x20) |
Capture/Compare Control Update Generation
Definition at line 4289 of file stm32f10x.h.
#define TIM_EGR_TG ((uint8_t)0x40) |
Trigger Generation
Definition at line 4290 of file stm32f10x.h.
#define TIM_EGR_UG ((uint8_t)0x01) |
Update Generation
Definition at line 4284 of file stm32f10x.h.
#define TIM_PSC_PSC ((uint16_t)0xFFFF) |
Prescaler Value
Definition at line 4416 of file stm32f10x.h.
#define TIM_RCR_REP ((uint8_t)0xFF) |
Repetition Counter Value
Definition at line 4422 of file stm32f10x.h.
#define TIM_SMCR_ECE ((uint16_t)0x4000) |
External clock enable
Definition at line 4249 of file stm32f10x.h.
#define TIM_SMCR_ETF ((uint16_t)0x0F00) |
ETF[3:0] bits (External trigger filter)
Definition at line 4239 of file stm32f10x.h.
#define TIM_SMCR_ETF_0 ((uint16_t)0x0100) |
Bit 0
Definition at line 4240 of file stm32f10x.h.
#define TIM_SMCR_ETF_1 ((uint16_t)0x0200) |
Bit 1
Definition at line 4241 of file stm32f10x.h.
#define TIM_SMCR_ETF_2 ((uint16_t)0x0400) |
Bit 2
Definition at line 4242 of file stm32f10x.h.
#define TIM_SMCR_ETF_3 ((uint16_t)0x0800) |
Bit 3
Definition at line 4243 of file stm32f10x.h.
#define TIM_SMCR_ETP ((uint16_t)0x8000) |
External trigger polarity
Definition at line 4250 of file stm32f10x.h.
#define TIM_SMCR_ETPS ((uint16_t)0x3000) |
ETPS[1:0] bits (External trigger prescaler)
Definition at line 4245 of file stm32f10x.h.
#define TIM_SMCR_ETPS_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 4246 of file stm32f10x.h.
#define TIM_SMCR_ETPS_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 4247 of file stm32f10x.h.
#define TIM_SMCR_MSM ((uint16_t)0x0080) |
Master/slave mode
Definition at line 4237 of file stm32f10x.h.
#define TIM_SMCR_SMS ((uint16_t)0x0007) |
SMS[2:0] bits (Slave mode selection)
Definition at line 4227 of file stm32f10x.h.
#define TIM_SMCR_SMS_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4228 of file stm32f10x.h.
#define TIM_SMCR_SMS_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4229 of file stm32f10x.h.
#define TIM_SMCR_SMS_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 4230 of file stm32f10x.h.
#define TIM_SMCR_TS ((uint16_t)0x0070) |
TS[2:0] bits (Trigger selection)
Definition at line 4232 of file stm32f10x.h.
#define TIM_SMCR_TS_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 4233 of file stm32f10x.h.
#define TIM_SMCR_TS_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 4234 of file stm32f10x.h.
#define TIM_SMCR_TS_2 ((uint16_t)0x0040) |
Bit 2
Definition at line 4235 of file stm32f10x.h.
#define TIM_SR_BIF ((uint16_t)0x0080) |
Break interrupt Flag
Definition at line 4277 of file stm32f10x.h.
#define TIM_SR_CC1IF ((uint16_t)0x0002) |
Capture/Compare 1 interrupt Flag
Definition at line 4271 of file stm32f10x.h.
#define TIM_SR_CC1OF ((uint16_t)0x0200) |
Capture/Compare 1 Overcapture Flag
Definition at line 4278 of file stm32f10x.h.
#define TIM_SR_CC2IF ((uint16_t)0x0004) |
Capture/Compare 2 interrupt Flag
Definition at line 4272 of file stm32f10x.h.
#define TIM_SR_CC2OF ((uint16_t)0x0400) |
Capture/Compare 2 Overcapture Flag
Definition at line 4279 of file stm32f10x.h.
#define TIM_SR_CC3IF ((uint16_t)0x0008) |
Capture/Compare 3 interrupt Flag
Definition at line 4273 of file stm32f10x.h.
#define TIM_SR_CC3OF ((uint16_t)0x0800) |
Capture/Compare 3 Overcapture Flag
Definition at line 4280 of file stm32f10x.h.
#define TIM_SR_CC4IF ((uint16_t)0x0010) |
Capture/Compare 4 interrupt Flag
Definition at line 4274 of file stm32f10x.h.
#define TIM_SR_CC4OF ((uint16_t)0x1000) |
Capture/Compare 4 Overcapture Flag
Definition at line 4281 of file stm32f10x.h.
#define TIM_SR_COMIF ((uint16_t)0x0020) |
COM interrupt Flag
Definition at line 4275 of file stm32f10x.h.
#define TIM_SR_TIF ((uint16_t)0x0040) |
Trigger interrupt Flag
Definition at line 4276 of file stm32f10x.h.
#define TIM_SR_UIF ((uint16_t)0x0001) |
Update interrupt Flag
Definition at line 4270 of file stm32f10x.h.
#define USART_BRR_DIV_Fraction ((uint16_t)0x000F) |
Fraction of USARTDIV
Definition at line 7661 of file stm32f10x.h.
#define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) |
Mantissa of USARTDIV
Definition at line 7662 of file stm32f10x.h.
#define USART_CR1_IDLEIE ((uint16_t)0x0010) |
IDLE Interrupt Enable
Definition at line 7669 of file stm32f10x.h.
#define USART_CR1_M ((uint16_t)0x1000) |
Word length
Definition at line 7677 of file stm32f10x.h.
#define USART_CR1_OVER8 ((uint16_t)0x8000) |
USART Oversmapling 8-bits
Definition at line 7679 of file stm32f10x.h.
#define USART_CR1_PCE ((uint16_t)0x0400) |
Parity Control Enable
Definition at line 7675 of file stm32f10x.h.
#define USART_CR1_PEIE ((uint16_t)0x0100) |
PE Interrupt Enable
Definition at line 7673 of file stm32f10x.h.
#define USART_CR1_PS ((uint16_t)0x0200) |
Parity Selection
Definition at line 7674 of file stm32f10x.h.
#define USART_CR1_RE ((uint16_t)0x0004) |
Receiver Enable
Definition at line 7667 of file stm32f10x.h.
#define USART_CR1_RWU ((uint16_t)0x0002) |
Receiver wakeup
Definition at line 7666 of file stm32f10x.h.
#define USART_CR1_RXNEIE ((uint16_t)0x0020) |
RXNE Interrupt Enable
Definition at line 7670 of file stm32f10x.h.
#define USART_CR1_SBK ((uint16_t)0x0001) |
Send Break
Definition at line 7665 of file stm32f10x.h.
#define USART_CR1_TCIE ((uint16_t)0x0040) |
Transmission Complete Interrupt Enable
Definition at line 7671 of file stm32f10x.h.
#define USART_CR1_TE ((uint16_t)0x0008) |
Transmitter Enable
Definition at line 7668 of file stm32f10x.h.
#define USART_CR1_TXEIE ((uint16_t)0x0080) |
PE Interrupt Enable
Definition at line 7672 of file stm32f10x.h.
#define USART_CR1_UE ((uint16_t)0x2000) |
USART Enable
Definition at line 7678 of file stm32f10x.h.
#define USART_CR1_WAKE ((uint16_t)0x0800) |
Wakeup method
Definition at line 7676 of file stm32f10x.h.
#define USART_CR2_ADD ((uint16_t)0x000F) |
Address of the USART node
Definition at line 7682 of file stm32f10x.h.
#define USART_CR2_CLKEN ((uint16_t)0x0800) |
Clock Enable
Definition at line 7688 of file stm32f10x.h.
#define USART_CR2_CPHA ((uint16_t)0x0200) |
Clock Phase
Definition at line 7686 of file stm32f10x.h.
#define USART_CR2_CPOL ((uint16_t)0x0400) |
Clock Polarity
Definition at line 7687 of file stm32f10x.h.
#define USART_CR2_LBCL ((uint16_t)0x0100) |
Last Bit Clock pulse
Definition at line 7685 of file stm32f10x.h.
#define USART_CR2_LBDIE ((uint16_t)0x0040) |
LIN Break Detection Interrupt Enable
Definition at line 7684 of file stm32f10x.h.
#define USART_CR2_LBDL ((uint16_t)0x0020) |
LIN Break Detection Length
Definition at line 7683 of file stm32f10x.h.
#define USART_CR2_LINEN ((uint16_t)0x4000) |
LIN mode enable
Definition at line 7694 of file stm32f10x.h.
#define USART_CR2_STOP ((uint16_t)0x3000) |
STOP[1:0] bits (STOP bits)
Definition at line 7690 of file stm32f10x.h.
#define USART_CR2_STOP_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 7691 of file stm32f10x.h.
#define USART_CR2_STOP_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 7692 of file stm32f10x.h.
#define USART_CR3_CTSE ((uint16_t)0x0200) |
CTS Enable
Definition at line 7706 of file stm32f10x.h.
#define USART_CR3_CTSIE ((uint16_t)0x0400) |
CTS Interrupt Enable
Definition at line 7707 of file stm32f10x.h.
#define USART_CR3_DMAR ((uint16_t)0x0040) |
DMA Enable Receiver
Definition at line 7703 of file stm32f10x.h.
#define USART_CR3_DMAT ((uint16_t)0x0080) |
DMA Enable Transmitter
Definition at line 7704 of file stm32f10x.h.
#define USART_CR3_EIE ((uint16_t)0x0001) |
Error Interrupt Enable
Definition at line 7697 of file stm32f10x.h.
#define USART_CR3_HDSEL ((uint16_t)0x0008) |
Half-Duplex Selection
Definition at line 7700 of file stm32f10x.h.
#define USART_CR3_IREN ((uint16_t)0x0002) |
IrDA mode Enable
Definition at line 7698 of file stm32f10x.h.
#define USART_CR3_IRLP ((uint16_t)0x0004) |
IrDA Low-Power
Definition at line 7699 of file stm32f10x.h.
#define USART_CR3_NACK ((uint16_t)0x0010) |
Smartcard NACK enable
Definition at line 7701 of file stm32f10x.h.
#define USART_CR3_ONEBIT ((uint16_t)0x0800) |
One Bit method
Definition at line 7708 of file stm32f10x.h.
#define USART_CR3_RTSE ((uint16_t)0x0100) |
RTS Enable
Definition at line 7705 of file stm32f10x.h.
#define USART_CR3_SCEN ((uint16_t)0x0020) |
Smartcard mode enable
Definition at line 7702 of file stm32f10x.h.
#define USART_DR_DR ((uint16_t)0x01FF) |
Data value
Definition at line 7658 of file stm32f10x.h.
#define USART_GTPR_GT ((uint16_t)0xFF00) |
Guard time value
Definition at line 7721 of file stm32f10x.h.
#define USART_GTPR_PSC ((uint16_t)0x00FF) |
PSC[7:0] bits (Prescaler value)
Definition at line 7711 of file stm32f10x.h.
#define USART_GTPR_PSC_0 ((uint16_t)0x0001) |
Bit 0
Definition at line 7712 of file stm32f10x.h.
#define USART_GTPR_PSC_1 ((uint16_t)0x0002) |
Bit 1
Definition at line 7713 of file stm32f10x.h.
#define USART_GTPR_PSC_2 ((uint16_t)0x0004) |
Bit 2
Definition at line 7714 of file stm32f10x.h.
#define USART_GTPR_PSC_3 ((uint16_t)0x0008) |
Bit 3
Definition at line 7715 of file stm32f10x.h.
#define USART_GTPR_PSC_4 ((uint16_t)0x0010) |
Bit 4
Definition at line 7716 of file stm32f10x.h.
#define USART_GTPR_PSC_5 ((uint16_t)0x0020) |
Bit 5
Definition at line 7717 of file stm32f10x.h.
#define USART_GTPR_PSC_6 ((uint16_t)0x0040) |
Bit 6
Definition at line 7718 of file stm32f10x.h.
#define USART_GTPR_PSC_7 ((uint16_t)0x0080) |
Bit 7
Definition at line 7719 of file stm32f10x.h.
#define USART_SR_CTS ((uint16_t)0x0200) |
CTS Flag
Definition at line 7655 of file stm32f10x.h.
#define USART_SR_FE ((uint16_t)0x0002) |
Framing Error
Definition at line 7647 of file stm32f10x.h.
#define USART_SR_IDLE ((uint16_t)0x0010) |
IDLE line detected
Definition at line 7650 of file stm32f10x.h.
#define USART_SR_LBD ((uint16_t)0x0100) |
LIN Break Detection Flag
Definition at line 7654 of file stm32f10x.h.
#define USART_SR_NE ((uint16_t)0x0004) |
Noise Error Flag
Definition at line 7648 of file stm32f10x.h.
#define USART_SR_ORE ((uint16_t)0x0008) |
OverRun Error
Definition at line 7649 of file stm32f10x.h.
#define USART_SR_PE ((uint16_t)0x0001) |
Parity Error
Definition at line 7646 of file stm32f10x.h.
#define USART_SR_RXNE ((uint16_t)0x0020) |
Read Data Register Not Empty
Definition at line 7651 of file stm32f10x.h.
#define USART_SR_TC ((uint16_t)0x0040) |
Transmission Complete
Definition at line 7652 of file stm32f10x.h.
#define USART_SR_TXE ((uint16_t)0x0080) |
Transmit Data Register Empty
Definition at line 7653 of file stm32f10x.h.
#define USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 0
Definition at line 5896 of file stm32f10x.h.
#define USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 0
Definition at line 5794 of file stm32f10x.h.
#define USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 1
Definition at line 5899 of file stm32f10x.h.
#define USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 1
Definition at line 5797 of file stm32f10x.h.
#define USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 2
Definition at line 5902 of file stm32f10x.h.
#define USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 2
Definition at line 5800 of file stm32f10x.h.
#define USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 3
Definition at line 5905 of file stm32f10x.h.
#define USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 3
Definition at line 5803 of file stm32f10x.h.
#define USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 4
Definition at line 5908 of file stm32f10x.h.
#define USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 4
Definition at line 5806 of file stm32f10x.h.
#define USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 5
Definition at line 5911 of file stm32f10x.h.
#define USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 5
Definition at line 5809 of file stm32f10x.h.
#define USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 6
Definition at line 5914 of file stm32f10x.h.
#define USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 6
Definition at line 5812 of file stm32f10x.h.
#define USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE) |
Reception Buffer Address 7
Definition at line 5917 of file stm32f10x.h.
#define USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE) |
Transmission Buffer Address 7
Definition at line 5815 of file stm32f10x.h.
#define USB_BTABLE_BTABLE ((uint16_t)0xFFF8) |
Buffer Table Buffer descriptor table
Definition at line 5790 of file stm32f10x.h.
#define USB_CNTR_CTRM ((uint16_t)0x8000) |
Correct Transfer Interrupt Mask
Definition at line 5756 of file stm32f10x.h.
#define USB_CNTR_ERRM ((uint16_t)0x2000) |
Error Interrupt Mask
Definition at line 5754 of file stm32f10x.h.
#define USB_CNTR_ESOFM ((uint16_t)0x0100) |
Expected Start Of Frame Interrupt Mask
Definition at line 5749 of file stm32f10x.h.
#define USB_CNTR_FRES ((uint16_t)0x0001) |
Force USB Reset
Definition at line 5744 of file stm32f10x.h.
#define USB_CNTR_FSUSP ((uint16_t)0x0008) |
Force suspend
Definition at line 5747 of file stm32f10x.h.
#define USB_CNTR_LP_MODE ((uint16_t)0x0004) |
Low-power mode
Definition at line 5746 of file stm32f10x.h.
#define USB_CNTR_PDWN ((uint16_t)0x0002) |
Power down
Definition at line 5745 of file stm32f10x.h.
#define USB_CNTR_PMAOVRM ((uint16_t)0x4000) |
Packet Memory Area Over / Underrun Interrupt Mask
Definition at line 5755 of file stm32f10x.h.
#define USB_CNTR_RESETM ((uint16_t)0x0400) |
RESET Interrupt Mask
Definition at line 5751 of file stm32f10x.h.
#define USB_CNTR_RESUME ((uint16_t)0x0010) |
Resume request
Definition at line 5748 of file stm32f10x.h.
#define USB_CNTR_SOFM ((uint16_t)0x0200) |
Start Of Frame Interrupt Mask
Definition at line 5750 of file stm32f10x.h.
#define USB_CNTR_SUSPM ((uint16_t)0x0800) |
Suspend mode Interrupt Mask
Definition at line 5752 of file stm32f10x.h.
#define USB_CNTR_WKUPM ((uint16_t)0x1000) |
Wakeup Interrupt Mask
Definition at line 5753 of file stm32f10x.h.
#define USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6029 of file stm32f10x.h.
#define USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6020 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6022 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6023 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6024 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6025 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6026 of file stm32f10x.h.
#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6027 of file stm32f10x.h.
#define USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6041 of file stm32f10x.h.
#define USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6032 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6034 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 1
Definition at line 6035 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6036 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6037 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6038 of file stm32f10x.h.
#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6039 of file stm32f10x.h.
#define USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5931 of file stm32f10x.h.
#define USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5922 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5924 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5925 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5926 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5927 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5928 of file stm32f10x.h.
#define USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5929 of file stm32f10x.h.
#define USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 0 (low)
Definition at line 5846 of file stm32f10x.h.
#define USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 0 (high)
Definition at line 5849 of file stm32f10x.h.
#define USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF) |
Transmission Byte Count 0
Definition at line 5820 of file stm32f10x.h.
#define USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6053 of file stm32f10x.h.
#define USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6044 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6046 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6047 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6048 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6049 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6050 of file stm32f10x.h.
#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6051 of file stm32f10x.h.
#define USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6065 of file stm32f10x.h.
#define USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6056 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6058 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6059 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6060 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6061 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6062 of file stm32f10x.h.
#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6063 of file stm32f10x.h.
#define USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5943 of file stm32f10x.h.
#define USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5934 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5936 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5937 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5938 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5939 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5940 of file stm32f10x.h.
#define USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5941 of file stm32f10x.h.
#define USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 1 (low)
Definition at line 5852 of file stm32f10x.h.
#define USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 1 (high)
Definition at line 5855 of file stm32f10x.h.
#define USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF) |
Transmission Byte Count 1
Definition at line 5823 of file stm32f10x.h.
#define USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6077 of file stm32f10x.h.
#define USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6068 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6070 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6071 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6072 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6073 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6074 of file stm32f10x.h.
#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6075 of file stm32f10x.h.
#define USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6089 of file stm32f10x.h.
#define USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6080 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6082 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6083 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6084 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6085 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6086 of file stm32f10x.h.
#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6087 of file stm32f10x.h.
#define USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5955 of file stm32f10x.h.
#define USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5946 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5948 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5949 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5950 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5951 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5952 of file stm32f10x.h.
#define USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5953 of file stm32f10x.h.
#define USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 2 (low)
Definition at line 5858 of file stm32f10x.h.
#define USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 2 (high)
Definition at line 5861 of file stm32f10x.h.
#define USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF) |
Transmission Byte Count 2
Definition at line 5826 of file stm32f10x.h.
#define USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6101 of file stm32f10x.h.
#define USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6092 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6094 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6095 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6096 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6097 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6098 of file stm32f10x.h.
#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6099 of file stm32f10x.h.
#define USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6113 of file stm32f10x.h.
#define USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6104 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6106 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6107 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6108 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6109 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6110 of file stm32f10x.h.
#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6111 of file stm32f10x.h.
#define USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5967 of file stm32f10x.h.
#define USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5958 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5960 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5961 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5962 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5963 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5964 of file stm32f10x.h.
#define USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5965 of file stm32f10x.h.
#define USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF) |
Transmission Byte Count 3 (low)
Definition at line 5864 of file stm32f10x.h.
#define USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000) |
Transmission Byte Count 3 (high)
Definition at line 5867 of file stm32f10x.h.
#define USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF) |
Transmission Byte Count 3
Definition at line 5829 of file stm32f10x.h.
#define USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6125 of file stm32f10x.h.
#define USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6116 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6118 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6119 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6120 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6121 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6122 of file stm32f10x.h.
#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6123 of file stm32f10x.h.
#define USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6137 of file stm32f10x.h.
#define USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6128 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6130 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6131 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6132 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6133 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6134 of file stm32f10x.h.
#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6135 of file stm32f10x.h.
#define USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5979 of file stm32f10x.h.
#define USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5970 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5972 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5973 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5974 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5975 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5976 of file stm32f10x.h.
#define USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5977 of file stm32f10x.h.
#define USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 4 (low)
Definition at line 5870 of file stm32f10x.h.
#define USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 4 (high)
Definition at line 5873 of file stm32f10x.h.
#define USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF) |
Transmission Byte Count 4
Definition at line 5832 of file stm32f10x.h.
#define USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6149 of file stm32f10x.h.
#define USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6140 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6142 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6143 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6144 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6145 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6146 of file stm32f10x.h.
#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6147 of file stm32f10x.h.
#define USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6161 of file stm32f10x.h.
#define USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6152 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6154 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6155 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6156 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6157 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6158 of file stm32f10x.h.
#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6159 of file stm32f10x.h.
#define USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 5991 of file stm32f10x.h.
#define USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5982 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5984 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5985 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5986 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5987 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 5988 of file stm32f10x.h.
#define USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 5989 of file stm32f10x.h.
#define USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 5 (low)
Definition at line 5876 of file stm32f10x.h.
#define USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 5 (high)
Definition at line 5879 of file stm32f10x.h.
#define USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF) |
Transmission Byte Count 5
Definition at line 5835 of file stm32f10x.h.
#define USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6173 of file stm32f10x.h.
#define USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6164 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6166 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6167 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6168 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6169 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6170 of file stm32f10x.h.
#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6171 of file stm32f10x.h.
#define USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6185 of file stm32f10x.h.
#define USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6176 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6178 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6179 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6180 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6181 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6182 of file stm32f10x.h.
#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6183 of file stm32f10x.h.
#define USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 6003 of file stm32f10x.h.
#define USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 5994 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 5996 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 5997 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 5998 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 5999 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 6000 of file stm32f10x.h.
#define USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 6001 of file stm32f10x.h.
#define USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 6 (low)
Definition at line 5882 of file stm32f10x.h.
#define USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 6 (high)
Definition at line 5885 of file stm32f10x.h.
#define USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF) |
Transmission Byte Count 6
Definition at line 5838 of file stm32f10x.h.
#define USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000) |
BLock SIZE (low)
Definition at line 6197 of file stm32f10x.h.
#define USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF) |
Reception Byte Count (low)
Definition at line 6188 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) |
NUM_BLOCK_0[4:0] bits (Number of blocks) (low)
Definition at line 6190 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) |
Bit 0
Definition at line 6191 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) |
Bit 1
Definition at line 6192 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) |
Bit 2
Definition at line 6193 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) |
Bit 3
Definition at line 6194 of file stm32f10x.h.
#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) |
Bit 4
Definition at line 6195 of file stm32f10x.h.
#define USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000) |
BLock SIZE (high)
Definition at line 6209 of file stm32f10x.h.
#define USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000) |
Reception Byte Count (high)
Definition at line 6200 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) |
NUM_BLOCK_1[4:0] bits (Number of blocks) (high)
Definition at line 6202 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) |
Bit 0
Definition at line 6203 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) |
Bit 1
Definition at line 6204 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) |
Bit 2
Definition at line 6205 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) |
Bit 3
Definition at line 6206 of file stm32f10x.h.
#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) |
Bit 4
Definition at line 6207 of file stm32f10x.h.
#define USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000) |
BLock SIZE
Definition at line 6015 of file stm32f10x.h.
#define USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF) |
Reception Byte Count
Definition at line 6006 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00) |
NUM_BLOCK[4:0] bits (Number of blocks)
Definition at line 6008 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400) |
Bit 0
Definition at line 6009 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800) |
Bit 1
Definition at line 6010 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000) |
Bit 2
Definition at line 6011 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000) |
Bit 3
Definition at line 6012 of file stm32f10x.h.
#define USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000) |
Bit 4
Definition at line 6013 of file stm32f10x.h.
#define USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF) |
Transmission Byte Count 7 (low)
Definition at line 5888 of file stm32f10x.h.
#define USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000) |
Transmission Byte Count 7 (high)
Definition at line 5891 of file stm32f10x.h.
#define USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF) |
Transmission Byte Count 7
Definition at line 5841 of file stm32f10x.h.
#define USB_DADDR_ADD ((uint8_t)0x7F) |
ADD[6:0] bits (Device Address)
Definition at line 5778 of file stm32f10x.h.
#define USB_DADDR_ADD0 ((uint8_t)0x01) |
Bit 0
Definition at line 5779 of file stm32f10x.h.
#define USB_DADDR_ADD1 ((uint8_t)0x02) |
Bit 1
Definition at line 5780 of file stm32f10x.h.
#define USB_DADDR_ADD2 ((uint8_t)0x04) |
Bit 2
Definition at line 5781 of file stm32f10x.h.
#define USB_DADDR_ADD3 ((uint8_t)0x08) |
Bit 3
Definition at line 5782 of file stm32f10x.h.
#define USB_DADDR_ADD4 ((uint8_t)0x10) |
Bit 4
Definition at line 5783 of file stm32f10x.h.
#define USB_DADDR_ADD5 ((uint8_t)0x20) |
Bit 5
Definition at line 5784 of file stm32f10x.h.
#define USB_DADDR_ADD6 ((uint8_t)0x40) |
Bit 6
Definition at line 5785 of file stm32f10x.h.
#define USB_DADDR_EF ((uint8_t)0x80) |
Enable Function
Definition at line 5787 of file stm32f10x.h.
#define USB_EP0R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5572 of file stm32f10x.h.
#define USB_EP0R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5558 of file stm32f10x.h.
#define USB_EP0R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5571 of file stm32f10x.h.
#define USB_EP0R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5557 of file stm32f10x.h.
#define USB_EP0R_EA ((uint16_t)0x000F) |
< Endpoint-specific registers Endpoint Address
Definition at line 5551 of file stm32f10x.h.
#define USB_EP0R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5559 of file stm32f10x.h.
#define USB_EP0R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5561 of file stm32f10x.h.
#define USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5562 of file stm32f10x.h.
#define USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5563 of file stm32f10x.h.
#define USB_EP0R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5565 of file stm32f10x.h.
#define USB_EP0R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5567 of file stm32f10x.h.
#define USB_EP0R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5568 of file stm32f10x.h.
#define USB_EP0R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5569 of file stm32f10x.h.
#define USB_EP0R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5553 of file stm32f10x.h.
#define USB_EP0R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5554 of file stm32f10x.h.
#define USB_EP0R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5555 of file stm32f10x.h.
#define USB_EP1R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5596 of file stm32f10x.h.
#define USB_EP1R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5582 of file stm32f10x.h.
#define USB_EP1R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5595 of file stm32f10x.h.
#define USB_EP1R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5581 of file stm32f10x.h.
#define USB_EP1R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5575 of file stm32f10x.h.
#define USB_EP1R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5583 of file stm32f10x.h.
#define USB_EP1R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5585 of file stm32f10x.h.
#define USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5586 of file stm32f10x.h.
#define USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5587 of file stm32f10x.h.
#define USB_EP1R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5589 of file stm32f10x.h.
#define USB_EP1R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5591 of file stm32f10x.h.
#define USB_EP1R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5592 of file stm32f10x.h.
#define USB_EP1R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5593 of file stm32f10x.h.
#define USB_EP1R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5577 of file stm32f10x.h.
#define USB_EP1R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5578 of file stm32f10x.h.
#define USB_EP1R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5579 of file stm32f10x.h.
#define USB_EP2R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5620 of file stm32f10x.h.
#define USB_EP2R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5606 of file stm32f10x.h.
#define USB_EP2R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5619 of file stm32f10x.h.
#define USB_EP2R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5605 of file stm32f10x.h.
#define USB_EP2R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5599 of file stm32f10x.h.
#define USB_EP2R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5607 of file stm32f10x.h.
#define USB_EP2R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5609 of file stm32f10x.h.
#define USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5610 of file stm32f10x.h.
#define USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5611 of file stm32f10x.h.
#define USB_EP2R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5613 of file stm32f10x.h.
#define USB_EP2R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5615 of file stm32f10x.h.
#define USB_EP2R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5616 of file stm32f10x.h.
#define USB_EP2R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5617 of file stm32f10x.h.
#define USB_EP2R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5601 of file stm32f10x.h.
#define USB_EP2R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5602 of file stm32f10x.h.
#define USB_EP2R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5603 of file stm32f10x.h.
#define USB_EP3R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5644 of file stm32f10x.h.
#define USB_EP3R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5630 of file stm32f10x.h.
#define USB_EP3R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5643 of file stm32f10x.h.
#define USB_EP3R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5629 of file stm32f10x.h.
#define USB_EP3R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5623 of file stm32f10x.h.
#define USB_EP3R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5631 of file stm32f10x.h.
#define USB_EP3R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5633 of file stm32f10x.h.
#define USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5634 of file stm32f10x.h.
#define USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5635 of file stm32f10x.h.
#define USB_EP3R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5637 of file stm32f10x.h.
#define USB_EP3R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5639 of file stm32f10x.h.
#define USB_EP3R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5640 of file stm32f10x.h.
#define USB_EP3R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5641 of file stm32f10x.h.
#define USB_EP3R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5625 of file stm32f10x.h.
#define USB_EP3R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5626 of file stm32f10x.h.
#define USB_EP3R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5627 of file stm32f10x.h.
#define USB_EP4R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5668 of file stm32f10x.h.
#define USB_EP4R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5654 of file stm32f10x.h.
#define USB_EP4R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5667 of file stm32f10x.h.
#define USB_EP4R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5653 of file stm32f10x.h.
#define USB_EP4R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5647 of file stm32f10x.h.
#define USB_EP4R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5655 of file stm32f10x.h.
#define USB_EP4R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5657 of file stm32f10x.h.
#define USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5658 of file stm32f10x.h.
#define USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5659 of file stm32f10x.h.
#define USB_EP4R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5661 of file stm32f10x.h.
#define USB_EP4R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5663 of file stm32f10x.h.
#define USB_EP4R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5664 of file stm32f10x.h.
#define USB_EP4R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5665 of file stm32f10x.h.
#define USB_EP4R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5649 of file stm32f10x.h.
#define USB_EP4R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5650 of file stm32f10x.h.
#define USB_EP4R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5651 of file stm32f10x.h.
#define USB_EP5R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5692 of file stm32f10x.h.
#define USB_EP5R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5678 of file stm32f10x.h.
#define USB_EP5R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5691 of file stm32f10x.h.
#define USB_EP5R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5677 of file stm32f10x.h.
#define USB_EP5R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5671 of file stm32f10x.h.
#define USB_EP5R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5679 of file stm32f10x.h.
#define USB_EP5R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5681 of file stm32f10x.h.
#define USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5682 of file stm32f10x.h.
#define USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5683 of file stm32f10x.h.
#define USB_EP5R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5685 of file stm32f10x.h.
#define USB_EP5R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5687 of file stm32f10x.h.
#define USB_EP5R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5688 of file stm32f10x.h.
#define USB_EP5R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5689 of file stm32f10x.h.
#define USB_EP5R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5673 of file stm32f10x.h.
#define USB_EP5R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5674 of file stm32f10x.h.
#define USB_EP5R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5675 of file stm32f10x.h.
#define USB_EP6R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception
Definition at line 5716 of file stm32f10x.h.
#define USB_EP6R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5702 of file stm32f10x.h.
#define USB_EP6R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5715 of file stm32f10x.h.
#define USB_EP6R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5701 of file stm32f10x.h.
#define USB_EP6R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5695 of file stm32f10x.h.
#define USB_EP6R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5703 of file stm32f10x.h.
#define USB_EP6R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5705 of file stm32f10x.h.
#define USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5706 of file stm32f10x.h.
#define USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5707 of file stm32f10x.h.
#define USB_EP6R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5709 of file stm32f10x.h.
#define USB_EP6R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5711 of file stm32f10x.h.
#define USB_EP6R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5712 of file stm32f10x.h.
#define USB_EP6R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5713 of file stm32f10x.h.
#define USB_EP6R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5697 of file stm32f10x.h.
#define USB_EP6R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5698 of file stm32f10x.h.
#define USB_EP6R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5699 of file stm32f10x.h.
#define USB_EP7R_CTR_RX ((uint16_t)0x8000) |
Correct Transfer for reception Common registers
Definition at line 5740 of file stm32f10x.h.
#define USB_EP7R_CTR_TX ((uint16_t)0x0080) |
Correct Transfer for transmission
Definition at line 5726 of file stm32f10x.h.
#define USB_EP7R_DTOG_RX ((uint16_t)0x4000) |
Data Toggle, for reception transfers
Definition at line 5739 of file stm32f10x.h.
#define USB_EP7R_DTOG_TX ((uint16_t)0x0040) |
Data Toggle, for transmission transfers
Definition at line 5725 of file stm32f10x.h.
#define USB_EP7R_EA ((uint16_t)0x000F) |
Endpoint Address
Definition at line 5719 of file stm32f10x.h.
#define USB_EP7R_EP_KIND ((uint16_t)0x0100) |
Endpoint Kind
Definition at line 5727 of file stm32f10x.h.
#define USB_EP7R_EP_TYPE ((uint16_t)0x0600) |
EP_TYPE[1:0] bits (Endpoint type)
Definition at line 5729 of file stm32f10x.h.
#define USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200) |
Bit 0
Definition at line 5730 of file stm32f10x.h.
#define USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400) |
Bit 1
Definition at line 5731 of file stm32f10x.h.
#define USB_EP7R_SETUP ((uint16_t)0x0800) |
Setup transaction completed
Definition at line 5733 of file stm32f10x.h.
#define USB_EP7R_STAT_RX ((uint16_t)0x3000) |
STAT_RX[1:0] bits (Status bits, for reception transfers)
Definition at line 5735 of file stm32f10x.h.
#define USB_EP7R_STAT_RX_0 ((uint16_t)0x1000) |
Bit 0
Definition at line 5736 of file stm32f10x.h.
#define USB_EP7R_STAT_RX_1 ((uint16_t)0x2000) |
Bit 1
Definition at line 5737 of file stm32f10x.h.
#define USB_EP7R_STAT_TX ((uint16_t)0x0030) |
STAT_TX[1:0] bits (Status bits, for transmission transfers)
Definition at line 5721 of file stm32f10x.h.
#define USB_EP7R_STAT_TX_0 ((uint16_t)0x0010) |
Bit 0
Definition at line 5722 of file stm32f10x.h.
#define USB_EP7R_STAT_TX_1 ((uint16_t)0x0020) |
Bit 1
Definition at line 5723 of file stm32f10x.h.
#define USB_FNR_FN ((uint16_t)0x07FF) |
Frame Number
Definition at line 5771 of file stm32f10x.h.
#define USB_FNR_LCK ((uint16_t)0x2000) |
Locked
Definition at line 5773 of file stm32f10x.h.
#define USB_FNR_LSOF ((uint16_t)0x1800) |
Lost SOF
Definition at line 5772 of file stm32f10x.h.
#define USB_FNR_RXDM ((uint16_t)0x4000) |
Receive Data - Line Status
Definition at line 5774 of file stm32f10x.h.
#define USB_FNR_RXDP ((uint16_t)0x8000) |
Receive Data + Line Status
Definition at line 5775 of file stm32f10x.h.
#define USB_ISTR_CTR ((uint16_t)0x8000) |
Correct Transfer
Definition at line 5768 of file stm32f10x.h.
#define USB_ISTR_DIR ((uint16_t)0x0010) |
Direction of transaction
Definition at line 5760 of file stm32f10x.h.
#define USB_ISTR_EP_ID ((uint16_t)0x000F) |
Endpoint Identifier
Definition at line 5759 of file stm32f10x.h.
#define USB_ISTR_ERR ((uint16_t)0x2000) |
Error
Definition at line 5766 of file stm32f10x.h.
#define USB_ISTR_ESOF ((uint16_t)0x0100) |
Expected Start Of Frame
Definition at line 5761 of file stm32f10x.h.
#define USB_ISTR_PMAOVR ((uint16_t)0x4000) |
Packet Memory Area Over / Underrun
Definition at line 5767 of file stm32f10x.h.
#define USB_ISTR_RESET ((uint16_t)0x0400) |
USB RESET request
Definition at line 5763 of file stm32f10x.h.
#define USB_ISTR_SOF ((uint16_t)0x0200) |
Start Of Frame
Definition at line 5762 of file stm32f10x.h.
#define USB_ISTR_SUSP ((uint16_t)0x0800) |
Suspend mode request
Definition at line 5764 of file stm32f10x.h.
#define USB_ISTR_WKUP ((uint16_t)0x1000) |
Wake up
Definition at line 5765 of file stm32f10x.h.
#define WWDG_CFR_EWI ((uint16_t)0x0200) |
Early Wakeup Interrupt
Definition at line 4573 of file stm32f10x.h.
#define WWDG_CFR_W ((uint16_t)0x007F) |
W[6:0] bits (7-bit window value)
Definition at line 4560 of file stm32f10x.h.
#define WWDG_CFR_W0 ((uint16_t)0x0001) |
Bit 0
Definition at line 4561 of file stm32f10x.h.
#define WWDG_CFR_W1 ((uint16_t)0x0002) |
Bit 1
Definition at line 4562 of file stm32f10x.h.
#define WWDG_CFR_W2 ((uint16_t)0x0004) |
Bit 2
Definition at line 4563 of file stm32f10x.h.
#define WWDG_CFR_W3 ((uint16_t)0x0008) |
Bit 3
Definition at line 4564 of file stm32f10x.h.
#define WWDG_CFR_W4 ((uint16_t)0x0010) |
Bit 4
Definition at line 4565 of file stm32f10x.h.
#define WWDG_CFR_W5 ((uint16_t)0x0020) |
Bit 5
Definition at line 4566 of file stm32f10x.h.
#define WWDG_CFR_W6 ((uint16_t)0x0040) |
Bit 6
Definition at line 4567 of file stm32f10x.h.
#define WWDG_CFR_WDGTB ((uint16_t)0x0180) |
WDGTB[1:0] bits (Timer Base)
Definition at line 4569 of file stm32f10x.h.
#define WWDG_CFR_WDGTB0 ((uint16_t)0x0080) |
Bit 0
Definition at line 4570 of file stm32f10x.h.
#define WWDG_CFR_WDGTB1 ((uint16_t)0x0100) |
Bit 1
Definition at line 4571 of file stm32f10x.h.
#define WWDG_CR_T ((uint8_t)0x7F) |
T[6:0] bits (7-Bit counter (MSB to LSB))
Definition at line 4548 of file stm32f10x.h.
#define WWDG_CR_T0 ((uint8_t)0x01) |
Bit 0
Definition at line 4549 of file stm32f10x.h.
#define WWDG_CR_T1 ((uint8_t)0x02) |
Bit 1
Definition at line 4550 of file stm32f10x.h.
#define WWDG_CR_T2 ((uint8_t)0x04) |
Bit 2
Definition at line 4551 of file stm32f10x.h.
#define WWDG_CR_T3 ((uint8_t)0x08) |
Bit 3
Definition at line 4552 of file stm32f10x.h.
#define WWDG_CR_T4 ((uint8_t)0x10) |
Bit 4
Definition at line 4553 of file stm32f10x.h.
#define WWDG_CR_T5 ((uint8_t)0x20) |
Bit 5
Definition at line 4554 of file stm32f10x.h.
#define WWDG_CR_T6 ((uint8_t)0x40) |
Bit 6
Definition at line 4555 of file stm32f10x.h.
#define WWDG_CR_WDGA ((uint8_t)0x80) |
Activation bit
Definition at line 4557 of file stm32f10x.h.
#define WWDG_SR_EWIF ((uint8_t)0x01) |
Early Wakeup Interrupt Flag
Definition at line 4576 of file stm32f10x.h.