STM32F10x Standard Peripherals Library  3.5.0
FSMC_NORSRAMTimingInitTypeDef Struct Reference

Timing parameters For NOR/SRAM Banks. More...

#include <stm32f10x_fsmc.h>

Data Fields

uint32_t FSMC_AddressSetupTime
uint32_t FSMC_AddressHoldTime
uint32_t FSMC_DataSetupTime
uint32_t FSMC_BusTurnAroundDuration
uint32_t FSMC_CLKDivision
uint32_t FSMC_DataLatency
uint32_t FSMC_AccessMode

Detailed Description

Timing parameters For NOR/SRAM Banks.


Field Documentation

uint32_t FSMC_AccessMode

Specifies the asynchronous access mode. This parameter can be a value of FSMC_Access_Mode

Definition at line 84 of file stm32f10x_fsmc.h.

Defines the number of HCLK cycles to configure the duration of the address hold time. This parameter can be a value between 0 and 0xF.

Note:
: It is not used with synchronous NOR Flash memories.

Definition at line 57 of file stm32f10x_fsmc.h.

Defines the number of HCLK cycles to configure the duration of the address setup time. This parameter can be a value between 0 and 0xF.

Note:
: It is not used with synchronous NOR Flash memories.

Definition at line 52 of file stm32f10x_fsmc.h.

Defines the number of HCLK cycles to configure the duration of the bus turnaround. This parameter can be a value between 0 and 0xF.

Note:
: It is only used for multiplexed NOR Flash memories.

Definition at line 67 of file stm32f10x_fsmc.h.

uint32_t FSMC_CLKDivision

Defines the period of CLK clock output signal, expressed in number of HCLK cycles. This parameter can be a value between 1 and 0xF.

Note:
: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses.

Definition at line 72 of file stm32f10x_fsmc.h.

uint32_t FSMC_DataLatency

Defines the number of memory clock cycles to issue to the memory before getting the first data. The value of this parameter depends on the memory type as shown below:

  • It must be set to 0 in case of a CRAM
  • It is don't care in asynchronous NOR, SRAM or ROM accesses
  • It may assume a value between 0 and 0xF in NOR Flash memories with synchronous burst mode enable

Definition at line 76 of file stm32f10x_fsmc.h.

Defines the number of HCLK cycles to configure the duration of the data setup time. This parameter can be a value between 0 and 0xFF.

Note:
: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories.

Definition at line 62 of file stm32f10x_fsmc.h.


The documentation for this struct was generated from the following file: