STM32F10x Standard Peripherals Library  3.5.0
/opt/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c
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00001 
00022 /* Includes ------------------------------------------------------------------*/
00023 #include "stm32f10x_flash.h"
00024 
00046 /* Flash Access Control Register bits */
00047 #define ACR_LATENCY_Mask         ((uint32_t)0x00000038)
00048 #define ACR_HLFCYA_Mask          ((uint32_t)0xFFFFFFF7)
00049 #define ACR_PRFTBE_Mask          ((uint32_t)0xFFFFFFEF)
00050 
00051 /* Flash Access Control Register bits */
00052 #define ACR_PRFTBS_Mask          ((uint32_t)0x00000020) 
00053 
00054 /* Flash Control Register bits */
00055 #define CR_PG_Set                ((uint32_t)0x00000001)
00056 #define CR_PG_Reset              ((uint32_t)0x00001FFE) 
00057 #define CR_PER_Set               ((uint32_t)0x00000002)
00058 #define CR_PER_Reset             ((uint32_t)0x00001FFD)
00059 #define CR_MER_Set               ((uint32_t)0x00000004)
00060 #define CR_MER_Reset             ((uint32_t)0x00001FFB)
00061 #define CR_OPTPG_Set             ((uint32_t)0x00000010)
00062 #define CR_OPTPG_Reset           ((uint32_t)0x00001FEF)
00063 #define CR_OPTER_Set             ((uint32_t)0x00000020)
00064 #define CR_OPTER_Reset           ((uint32_t)0x00001FDF)
00065 #define CR_STRT_Set              ((uint32_t)0x00000040)
00066 #define CR_LOCK_Set              ((uint32_t)0x00000080)
00067 
00068 /* FLASH Mask */
00069 #define RDPRT_Mask               ((uint32_t)0x00000002)
00070 #define WRP0_Mask                ((uint32_t)0x000000FF)
00071 #define WRP1_Mask                ((uint32_t)0x0000FF00)
00072 #define WRP2_Mask                ((uint32_t)0x00FF0000)
00073 #define WRP3_Mask                ((uint32_t)0xFF000000)
00074 #define OB_USER_BFB2             ((uint16_t)0x0008)
00075 
00076 /* FLASH Keys */
00077 #define RDP_Key                  ((uint16_t)0x00A5)
00078 #define FLASH_KEY1               ((uint32_t)0x45670123)
00079 #define FLASH_KEY2               ((uint32_t)0xCDEF89AB)
00080 
00081 /* FLASH BANK address */
00082 #define FLASH_BANK1_END_ADDRESS   ((uint32_t)0x807FFFF)
00083 
00084 /* Delay definition */   
00085 #define EraseTimeout          ((uint32_t)0x000B0000)
00086 #define ProgramTimeout        ((uint32_t)0x00002000)
00087 
00254 void FLASH_SetLatency(uint32_t FLASH_Latency)
00255 {
00256   uint32_t tmpreg = 0;
00257   
00258   /* Check the parameters */
00259   assert_param(IS_FLASH_LATENCY(FLASH_Latency));
00260   
00261   /* Read the ACR register */
00262   tmpreg = FLASH->ACR;  
00263   
00264   /* Sets the Latency value */
00265   tmpreg &= ACR_LATENCY_Mask;
00266   tmpreg |= FLASH_Latency;
00267   
00268   /* Write the ACR register */
00269   FLASH->ACR = tmpreg;
00270 }
00271 
00281 void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess)
00282 {
00283   /* Check the parameters */
00284   assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess));
00285   
00286   /* Enable or disable the Half cycle access */
00287   FLASH->ACR &= ACR_HLFCYA_Mask;
00288   FLASH->ACR |= FLASH_HalfCycleAccess;
00289 }
00290 
00300 void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer)
00301 {
00302   /* Check the parameters */
00303   assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer));
00304   
00305   /* Enable or disable the Prefetch Buffer */
00306   FLASH->ACR &= ACR_PRFTBE_Mask;
00307   FLASH->ACR |= FLASH_PrefetchBuffer;
00308 }
00309 
00319 void FLASH_Unlock(void)
00320 {
00321   /* Authorize the FPEC of Bank1 Access */
00322   FLASH->KEYR = FLASH_KEY1;
00323   FLASH->KEYR = FLASH_KEY2;
00324 
00325 #ifdef STM32F10X_XL
00326   /* Authorize the FPEC of Bank2 Access */
00327   FLASH->KEYR2 = FLASH_KEY1;
00328   FLASH->KEYR2 = FLASH_KEY2;
00329 #endif /* STM32F10X_XL */
00330 }
00340 void FLASH_UnlockBank1(void)
00341 {
00342   /* Authorize the FPEC of Bank1 Access */
00343   FLASH->KEYR = FLASH_KEY1;
00344   FLASH->KEYR = FLASH_KEY2;
00345 }
00346 
00347 #ifdef STM32F10X_XL
00348 
00354 void FLASH_UnlockBank2(void)
00355 {
00356   /* Authorize the FPEC of Bank2 Access */
00357   FLASH->KEYR2 = FLASH_KEY1;
00358   FLASH->KEYR2 = FLASH_KEY2;
00359 
00360 }
00361 #endif /* STM32F10X_XL */
00362 
00372 void FLASH_Lock(void)
00373 {
00374   /* Set the Lock Bit to lock the FPEC and the CR of  Bank1 */
00375   FLASH->CR |= CR_LOCK_Set;
00376 
00377 #ifdef STM32F10X_XL
00378   /* Set the Lock Bit to lock the FPEC and the CR of  Bank2 */
00379   FLASH->CR2 |= CR_LOCK_Set;
00380 #endif /* STM32F10X_XL */
00381 }
00382 
00392 void FLASH_LockBank1(void)
00393 {
00394   /* Set the Lock Bit to lock the FPEC and the CR of  Bank1 */
00395   FLASH->CR |= CR_LOCK_Set;
00396 }
00397 
00398 #ifdef STM32F10X_XL
00399 
00405 void FLASH_LockBank2(void)
00406 {
00407   /* Set the Lock Bit to lock the FPEC and the CR of  Bank2 */
00408   FLASH->CR2 |= CR_LOCK_Set;
00409 }
00410 #endif /* STM32F10X_XL */
00411 
00419 FLASH_Status FLASH_ErasePage(uint32_t Page_Address)
00420 {
00421   FLASH_Status status = FLASH_COMPLETE;
00422   /* Check the parameters */
00423   assert_param(IS_FLASH_ADDRESS(Page_Address));
00424 
00425 #ifdef STM32F10X_XL
00426   if(Page_Address < FLASH_BANK1_END_ADDRESS)  
00427   {
00428     /* Wait for last operation to be completed */
00429     status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00430     if(status == FLASH_COMPLETE)
00431     { 
00432       /* if the previous operation is completed, proceed to erase the page */
00433       FLASH->CR|= CR_PER_Set;
00434       FLASH->AR = Page_Address; 
00435       FLASH->CR|= CR_STRT_Set;
00436     
00437       /* Wait for last operation to be completed */
00438       status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00439 
00440       /* Disable the PER Bit */
00441       FLASH->CR &= CR_PER_Reset;
00442     }
00443   }
00444   else
00445   {
00446     /* Wait for last operation to be completed */
00447     status = FLASH_WaitForLastBank2Operation(EraseTimeout);
00448     if(status == FLASH_COMPLETE)
00449     { 
00450       /* if the previous operation is completed, proceed to erase the page */
00451       FLASH->CR2|= CR_PER_Set;
00452       FLASH->AR2 = Page_Address; 
00453       FLASH->CR2|= CR_STRT_Set;
00454     
00455       /* Wait for last operation to be completed */
00456       status = FLASH_WaitForLastBank2Operation(EraseTimeout);
00457       
00458       /* Disable the PER Bit */
00459       FLASH->CR2 &= CR_PER_Reset;
00460     }
00461   }
00462 #else
00463   /* Wait for last operation to be completed */
00464   status = FLASH_WaitForLastOperation(EraseTimeout);
00465   
00466   if(status == FLASH_COMPLETE)
00467   { 
00468     /* if the previous operation is completed, proceed to erase the page */
00469     FLASH->CR|= CR_PER_Set;
00470     FLASH->AR = Page_Address; 
00471     FLASH->CR|= CR_STRT_Set;
00472     
00473     /* Wait for last operation to be completed */
00474     status = FLASH_WaitForLastOperation(EraseTimeout);
00475     
00476     /* Disable the PER Bit */
00477     FLASH->CR &= CR_PER_Reset;
00478   }
00479 #endif /* STM32F10X_XL */
00480 
00481   /* Return the Erase Status */
00482   return status;
00483 }
00484 
00492 FLASH_Status FLASH_EraseAllPages(void)
00493 {
00494   FLASH_Status status = FLASH_COMPLETE;
00495 
00496 #ifdef STM32F10X_XL
00497   /* Wait for last operation to be completed */
00498   status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00499   
00500   if(status == FLASH_COMPLETE)
00501   {
00502     /* if the previous operation is completed, proceed to erase all pages */
00503      FLASH->CR |= CR_MER_Set;
00504      FLASH->CR |= CR_STRT_Set;
00505     
00506     /* Wait for last operation to be completed */
00507     status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00508     
00509     /* Disable the MER Bit */
00510     FLASH->CR &= CR_MER_Reset;
00511   }    
00512   if(status == FLASH_COMPLETE)
00513   {
00514     /* if the previous operation is completed, proceed to erase all pages */
00515      FLASH->CR2 |= CR_MER_Set;
00516      FLASH->CR2 |= CR_STRT_Set;
00517     
00518     /* Wait for last operation to be completed */
00519     status = FLASH_WaitForLastBank2Operation(EraseTimeout);
00520     
00521     /* Disable the MER Bit */
00522     FLASH->CR2 &= CR_MER_Reset;
00523   }
00524 #else
00525   /* Wait for last operation to be completed */
00526   status = FLASH_WaitForLastOperation(EraseTimeout);
00527   if(status == FLASH_COMPLETE)
00528   {
00529     /* if the previous operation is completed, proceed to erase all pages */
00530      FLASH->CR |= CR_MER_Set;
00531      FLASH->CR |= CR_STRT_Set;
00532     
00533     /* Wait for last operation to be completed */
00534     status = FLASH_WaitForLastOperation(EraseTimeout);
00535 
00536     /* Disable the MER Bit */
00537     FLASH->CR &= CR_MER_Reset;
00538   }
00539 #endif /* STM32F10X_XL */
00540 
00541   /* Return the Erase Status */
00542   return status;
00543 }
00544 
00555 FLASH_Status FLASH_EraseAllBank1Pages(void)
00556 {
00557   FLASH_Status status = FLASH_COMPLETE;
00558   /* Wait for last operation to be completed */
00559   status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00560   
00561   if(status == FLASH_COMPLETE)
00562   {
00563     /* if the previous operation is completed, proceed to erase all pages */
00564      FLASH->CR |= CR_MER_Set;
00565      FLASH->CR |= CR_STRT_Set;
00566     
00567     /* Wait for last operation to be completed */
00568     status = FLASH_WaitForLastBank1Operation(EraseTimeout);
00569     
00570     /* Disable the MER Bit */
00571     FLASH->CR &= CR_MER_Reset;
00572   }    
00573   /* Return the Erase Status */
00574   return status;
00575 }
00576 
00577 #ifdef STM32F10X_XL
00578 
00585 FLASH_Status FLASH_EraseAllBank2Pages(void)
00586 {
00587   FLASH_Status status = FLASH_COMPLETE;
00588   /* Wait for last operation to be completed */
00589   status = FLASH_WaitForLastBank2Operation(EraseTimeout);
00590   
00591   if(status == FLASH_COMPLETE)
00592   {
00593     /* if the previous operation is completed, proceed to erase all pages */
00594      FLASH->CR2 |= CR_MER_Set;
00595      FLASH->CR2 |= CR_STRT_Set;
00596     
00597     /* Wait for last operation to be completed */
00598     status = FLASH_WaitForLastBank2Operation(EraseTimeout);
00599 
00600     /* Disable the MER Bit */
00601     FLASH->CR2 &= CR_MER_Reset;
00602   }    
00603   /* Return the Erase Status */
00604   return status;
00605 }
00606 #endif /* STM32F10X_XL */
00607 
00616 FLASH_Status FLASH_EraseOptionBytes(void)
00617 {
00618   uint16_t rdptmp = RDP_Key;
00619 
00620   FLASH_Status status = FLASH_COMPLETE;
00621 
00622   /* Get the actual read protection Option Byte value */ 
00623   if(FLASH_GetReadOutProtectionStatus() != RESET)
00624   {
00625     rdptmp = 0x00;  
00626   }
00627 
00628   /* Wait for last operation to be completed */
00629   status = FLASH_WaitForLastOperation(EraseTimeout);
00630   if(status == FLASH_COMPLETE)
00631   {
00632     /* Authorize the small information block programming */
00633     FLASH->OPTKEYR = FLASH_KEY1;
00634     FLASH->OPTKEYR = FLASH_KEY2;
00635     
00636     /* if the previous operation is completed, proceed to erase the option bytes */
00637     FLASH->CR |= CR_OPTER_Set;
00638     FLASH->CR |= CR_STRT_Set;
00639     /* Wait for last operation to be completed */
00640     status = FLASH_WaitForLastOperation(EraseTimeout);
00641     
00642     if(status == FLASH_COMPLETE)
00643     {
00644       /* if the erase operation is completed, disable the OPTER Bit */
00645       FLASH->CR &= CR_OPTER_Reset;
00646        
00647       /* Enable the Option Bytes Programming operation */
00648       FLASH->CR |= CR_OPTPG_Set;
00649       /* Restore the last read protection Option Byte value */
00650       OB->RDP = (uint16_t)rdptmp; 
00651       /* Wait for last operation to be completed */
00652       status = FLASH_WaitForLastOperation(ProgramTimeout);
00653  
00654       if(status != FLASH_TIMEOUT)
00655       {
00656         /* if the program operation is completed, disable the OPTPG Bit */
00657         FLASH->CR &= CR_OPTPG_Reset;
00658       }
00659     }
00660     else
00661     {
00662       if (status != FLASH_TIMEOUT)
00663       {
00664         /* Disable the OPTPG Bit */
00665         FLASH->CR &= CR_OPTPG_Reset;
00666       }
00667     }  
00668   }
00669   /* Return the erase status */
00670   return status;
00671 }
00672 
00681 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
00682 {
00683   FLASH_Status status = FLASH_COMPLETE;
00684   __IO uint32_t tmp = 0;
00685 
00686   /* Check the parameters */
00687   assert_param(IS_FLASH_ADDRESS(Address));
00688 
00689 #ifdef STM32F10X_XL
00690   if(Address < FLASH_BANK1_END_ADDRESS - 2)
00691   { 
00692     /* Wait for last operation to be completed */
00693     status = FLASH_WaitForLastBank1Operation(ProgramTimeout); 
00694     if(status == FLASH_COMPLETE)
00695     {
00696       /* if the previous operation is completed, proceed to program the new first 
00697         half word */
00698       FLASH->CR |= CR_PG_Set;
00699   
00700       *(__IO uint16_t*)Address = (uint16_t)Data;
00701       /* Wait for last operation to be completed */
00702       status = FLASH_WaitForLastOperation(ProgramTimeout);
00703  
00704       if(status == FLASH_COMPLETE)
00705       {
00706         /* if the previous operation is completed, proceed to program the new second 
00707         half word */
00708         tmp = Address + 2;
00709 
00710         *(__IO uint16_t*) tmp = Data >> 16;
00711     
00712         /* Wait for last operation to be completed */
00713         status = FLASH_WaitForLastOperation(ProgramTimeout);
00714         
00715         /* Disable the PG Bit */
00716         FLASH->CR &= CR_PG_Reset;
00717       }
00718       else
00719       {
00720         /* Disable the PG Bit */
00721         FLASH->CR &= CR_PG_Reset;
00722        }
00723     }
00724   }
00725   else if(Address == (FLASH_BANK1_END_ADDRESS - 1))
00726   {
00727     /* Wait for last operation to be completed */
00728     status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
00729 
00730     if(status == FLASH_COMPLETE)
00731     {
00732       /* if the previous operation is completed, proceed to program the new first 
00733         half word */
00734       FLASH->CR |= CR_PG_Set;
00735   
00736       *(__IO uint16_t*)Address = (uint16_t)Data;
00737 
00738       /* Wait for last operation to be completed */
00739       status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
00740       
00741           /* Disable the PG Bit */
00742       FLASH->CR &= CR_PG_Reset;
00743     }
00744     else
00745     {
00746       /* Disable the PG Bit */
00747       FLASH->CR &= CR_PG_Reset;
00748     }
00749 
00750     /* Wait for last operation to be completed */
00751     status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00752 
00753     if(status == FLASH_COMPLETE)
00754     {
00755       /* if the previous operation is completed, proceed to program the new second 
00756       half word */
00757       FLASH->CR2 |= CR_PG_Set;
00758       tmp = Address + 2;
00759 
00760       *(__IO uint16_t*) tmp = Data >> 16;
00761     
00762       /* Wait for last operation to be completed */
00763       status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00764         
00765       /* Disable the PG Bit */
00766       FLASH->CR2 &= CR_PG_Reset;
00767     }
00768     else
00769     {
00770       /* Disable the PG Bit */
00771       FLASH->CR2 &= CR_PG_Reset;
00772     }
00773   }
00774   else
00775   {
00776     /* Wait for last operation to be completed */
00777     status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00778 
00779     if(status == FLASH_COMPLETE)
00780     {
00781       /* if the previous operation is completed, proceed to program the new first 
00782         half word */
00783       FLASH->CR2 |= CR_PG_Set;
00784   
00785       *(__IO uint16_t*)Address = (uint16_t)Data;
00786       /* Wait for last operation to be completed */
00787       status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00788  
00789       if(status == FLASH_COMPLETE)
00790       {
00791         /* if the previous operation is completed, proceed to program the new second 
00792         half word */
00793         tmp = Address + 2;
00794 
00795         *(__IO uint16_t*) tmp = Data >> 16;
00796     
00797         /* Wait for last operation to be completed */
00798         status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00799         
00800         /* Disable the PG Bit */
00801         FLASH->CR2 &= CR_PG_Reset;
00802       }
00803       else
00804       {
00805         /* Disable the PG Bit */
00806         FLASH->CR2 &= CR_PG_Reset;
00807       }
00808     }
00809   }
00810 #else
00811   /* Wait for last operation to be completed */
00812   status = FLASH_WaitForLastOperation(ProgramTimeout);
00813   
00814   if(status == FLASH_COMPLETE)
00815   {
00816     /* if the previous operation is completed, proceed to program the new first 
00817     half word */
00818     FLASH->CR |= CR_PG_Set;
00819   
00820     *(__IO uint16_t*)Address = (uint16_t)Data;
00821     /* Wait for last operation to be completed */
00822     status = FLASH_WaitForLastOperation(ProgramTimeout);
00823  
00824     if(status == FLASH_COMPLETE)
00825     {
00826       /* if the previous operation is completed, proceed to program the new second 
00827       half word */
00828       tmp = Address + 2;
00829 
00830       *(__IO uint16_t*) tmp = Data >> 16;
00831     
00832       /* Wait for last operation to be completed */
00833       status = FLASH_WaitForLastOperation(ProgramTimeout);
00834         
00835       /* Disable the PG Bit */
00836       FLASH->CR &= CR_PG_Reset;
00837     }
00838     else
00839     {
00840       /* Disable the PG Bit */
00841       FLASH->CR &= CR_PG_Reset;
00842     }
00843   }         
00844 #endif /* STM32F10X_XL */
00845    
00846   /* Return the Program Status */
00847   return status;
00848 }
00849 
00858 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
00859 {
00860   FLASH_Status status = FLASH_COMPLETE;
00861   /* Check the parameters */
00862   assert_param(IS_FLASH_ADDRESS(Address));
00863 
00864 #ifdef STM32F10X_XL
00865   /* Wait for last operation to be completed */
00866   status = FLASH_WaitForLastOperation(ProgramTimeout);
00867   
00868   if(Address < FLASH_BANK1_END_ADDRESS)
00869   {
00870     if(status == FLASH_COMPLETE)
00871     {
00872       /* if the previous operation is completed, proceed to program the new data */
00873       FLASH->CR |= CR_PG_Set;
00874   
00875       *(__IO uint16_t*)Address = Data;
00876       /* Wait for last operation to be completed */
00877       status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
00878 
00879       /* Disable the PG Bit */
00880       FLASH->CR &= CR_PG_Reset;
00881     }
00882   }
00883   else
00884   {
00885     if(status == FLASH_COMPLETE)
00886     {
00887       /* if the previous operation is completed, proceed to program the new data */
00888       FLASH->CR2 |= CR_PG_Set;
00889   
00890       *(__IO uint16_t*)Address = Data;
00891       /* Wait for last operation to be completed */
00892       status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
00893 
00894       /* Disable the PG Bit */
00895       FLASH->CR2 &= CR_PG_Reset;
00896     }
00897   }
00898 #else
00899   /* Wait for last operation to be completed */
00900   status = FLASH_WaitForLastOperation(ProgramTimeout);
00901   
00902   if(status == FLASH_COMPLETE)
00903   {
00904     /* if the previous operation is completed, proceed to program the new data */
00905     FLASH->CR |= CR_PG_Set;
00906   
00907     *(__IO uint16_t*)Address = Data;
00908     /* Wait for last operation to be completed */
00909     status = FLASH_WaitForLastOperation(ProgramTimeout);
00910     
00911     /* Disable the PG Bit */
00912     FLASH->CR &= CR_PG_Reset;
00913   } 
00914 #endif  /* STM32F10X_XL */
00915   
00916   /* Return the Program Status */
00917   return status;
00918 }
00919 
00929 FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data)
00930 {
00931   FLASH_Status status = FLASH_COMPLETE;
00932   /* Check the parameters */
00933   assert_param(IS_OB_DATA_ADDRESS(Address));
00934   status = FLASH_WaitForLastOperation(ProgramTimeout);
00935 
00936   if(status == FLASH_COMPLETE)
00937   {
00938     /* Authorize the small information block programming */
00939     FLASH->OPTKEYR = FLASH_KEY1;
00940     FLASH->OPTKEYR = FLASH_KEY2;
00941     /* Enables the Option Bytes Programming operation */
00942     FLASH->CR |= CR_OPTPG_Set; 
00943     *(__IO uint16_t*)Address = Data;
00944     
00945     /* Wait for last operation to be completed */
00946     status = FLASH_WaitForLastOperation(ProgramTimeout);
00947     if(status != FLASH_TIMEOUT)
00948     {
00949       /* if the program operation is completed, disable the OPTPG Bit */
00950       FLASH->CR &= CR_OPTPG_Reset;
00951     }
00952   }
00953   /* Return the Option Byte Data Program Status */
00954   return status;
00955 }
00956 
00975 FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages)
00976 {
00977   uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
00978   
00979   FLASH_Status status = FLASH_COMPLETE;
00980   
00981   /* Check the parameters */
00982   assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages));
00983   
00984   FLASH_Pages = (uint32_t)(~FLASH_Pages);
00985   WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask);
00986   WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8);
00987   WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16);
00988   WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24);
00989   
00990   /* Wait for last operation to be completed */
00991   status = FLASH_WaitForLastOperation(ProgramTimeout);
00992   
00993   if(status == FLASH_COMPLETE)
00994   {
00995     /* Authorizes the small information block programming */
00996     FLASH->OPTKEYR = FLASH_KEY1;
00997     FLASH->OPTKEYR = FLASH_KEY2;
00998     FLASH->CR |= CR_OPTPG_Set;
00999     if(WRP0_Data != 0xFF)
01000     {
01001       OB->WRP0 = WRP0_Data;
01002       
01003       /* Wait for last operation to be completed */
01004       status = FLASH_WaitForLastOperation(ProgramTimeout);
01005     }
01006     if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF))
01007     {
01008       OB->WRP1 = WRP1_Data;
01009       
01010       /* Wait for last operation to be completed */
01011       status = FLASH_WaitForLastOperation(ProgramTimeout);
01012     }
01013     if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF))
01014     {
01015       OB->WRP2 = WRP2_Data;
01016       
01017       /* Wait for last operation to be completed */
01018       status = FLASH_WaitForLastOperation(ProgramTimeout);
01019     }
01020     
01021     if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF))
01022     {
01023       OB->WRP3 = WRP3_Data;
01024      
01025       /* Wait for last operation to be completed */
01026       status = FLASH_WaitForLastOperation(ProgramTimeout);
01027     }
01028           
01029     if(status != FLASH_TIMEOUT)
01030     {
01031       /* if the program operation is completed, disable the OPTPG Bit */
01032       FLASH->CR &= CR_OPTPG_Reset;
01033     }
01034   } 
01035   /* Return the write protection operation Status */
01036   return status;       
01037 }
01038 
01049 FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState)
01050 {
01051   FLASH_Status status = FLASH_COMPLETE;
01052   /* Check the parameters */
01053   assert_param(IS_FUNCTIONAL_STATE(NewState));
01054   status = FLASH_WaitForLastOperation(EraseTimeout);
01055   if(status == FLASH_COMPLETE)
01056   {
01057     /* Authorizes the small information block programming */
01058     FLASH->OPTKEYR = FLASH_KEY1;
01059     FLASH->OPTKEYR = FLASH_KEY2;
01060     FLASH->CR |= CR_OPTER_Set;
01061     FLASH->CR |= CR_STRT_Set;
01062     /* Wait for last operation to be completed */
01063     status = FLASH_WaitForLastOperation(EraseTimeout);
01064     if(status == FLASH_COMPLETE)
01065     {
01066       /* if the erase operation is completed, disable the OPTER Bit */
01067       FLASH->CR &= CR_OPTER_Reset;
01068       /* Enable the Option Bytes Programming operation */
01069       FLASH->CR |= CR_OPTPG_Set; 
01070       if(NewState != DISABLE)
01071       {
01072         OB->RDP = 0x00;
01073       }
01074       else
01075       {
01076         OB->RDP = RDP_Key;  
01077       }
01078       /* Wait for last operation to be completed */
01079       status = FLASH_WaitForLastOperation(EraseTimeout); 
01080     
01081       if(status != FLASH_TIMEOUT)
01082       {
01083         /* if the program operation is completed, disable the OPTPG Bit */
01084         FLASH->CR &= CR_OPTPG_Reset;
01085       }
01086     }
01087     else 
01088     {
01089       if(status != FLASH_TIMEOUT)
01090       {
01091         /* Disable the OPTER Bit */
01092         FLASH->CR &= CR_OPTER_Reset;
01093       }
01094     }
01095   }
01096   /* Return the protection operation Status */
01097   return status;       
01098 }
01099 
01118 FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY)
01119 {
01120   FLASH_Status status = FLASH_COMPLETE; 
01121 
01122   /* Check the parameters */
01123   assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
01124   assert_param(IS_OB_STOP_SOURCE(OB_STOP));
01125   assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
01126 
01127   /* Authorize the small information block programming */
01128   FLASH->OPTKEYR = FLASH_KEY1;
01129   FLASH->OPTKEYR = FLASH_KEY2;
01130   
01131   /* Wait for last operation to be completed */
01132   status = FLASH_WaitForLastOperation(ProgramTimeout);
01133   
01134   if(status == FLASH_COMPLETE)
01135   {  
01136     /* Enable the Option Bytes Programming operation */
01137     FLASH->CR |= CR_OPTPG_Set; 
01138            
01139     OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); 
01140   
01141     /* Wait for last operation to be completed */
01142     status = FLASH_WaitForLastOperation(ProgramTimeout);
01143     if(status != FLASH_TIMEOUT)
01144     {
01145       /* if the program operation is completed, disable the OPTPG Bit */
01146       FLASH->CR &= CR_OPTPG_Reset;
01147     }
01148   }    
01149   /* Return the Option Byte program Status */
01150   return status;
01151 }
01152 
01153 #ifdef STM32F10X_XL
01154 
01172 FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT)
01173 { 
01174   FLASH_Status status = FLASH_COMPLETE; 
01175   assert_param(IS_FLASH_BOOT(FLASH_BOOT));
01176   /* Authorize the small information block programming */
01177   FLASH->OPTKEYR = FLASH_KEY1;
01178   FLASH->OPTKEYR = FLASH_KEY2;
01179   
01180   /* Wait for last operation to be completed */
01181   status = FLASH_WaitForLastOperation(ProgramTimeout);
01182   
01183   if(status == FLASH_COMPLETE)
01184   {  
01185     /* Enable the Option Bytes Programming operation */
01186     FLASH->CR |= CR_OPTPG_Set; 
01187 
01188     if(FLASH_BOOT == FLASH_BOOT_Bank1)
01189     {
01190       OB->USER |= OB_USER_BFB2;
01191     }
01192     else
01193     {
01194       OB->USER &= (uint16_t)(~(uint16_t)(OB_USER_BFB2));
01195     }
01196     /* Wait for last operation to be completed */
01197     status = FLASH_WaitForLastOperation(ProgramTimeout);
01198     if(status != FLASH_TIMEOUT)
01199     {
01200       /* if the program operation is completed, disable the OPTPG Bit */
01201       FLASH->CR &= CR_OPTPG_Reset;
01202     }
01203   }    
01204   /* Return the Option Byte program Status */
01205   return status;
01206 }
01207 #endif /* STM32F10X_XL */
01208 
01216 uint32_t FLASH_GetUserOptionByte(void)
01217 {
01218   /* Return the User Option Byte */
01219   return (uint32_t)(FLASH->OBR >> 2);
01220 }
01221 
01228 uint32_t FLASH_GetWriteProtectionOptionByte(void)
01229 {
01230   /* Return the Flash write protection Register value */
01231   return (uint32_t)(FLASH->WRPR);
01232 }
01233 
01240 FlagStatus FLASH_GetReadOutProtectionStatus(void)
01241 {
01242   FlagStatus readoutstatus = RESET;
01243   if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET)
01244   {
01245     readoutstatus = SET;
01246   }
01247   else
01248   {
01249     readoutstatus = RESET;
01250   }
01251   return readoutstatus;
01252 }
01253 
01260 FlagStatus FLASH_GetPrefetchBufferStatus(void)
01261 {
01262   FlagStatus bitstatus = RESET;
01263   
01264   if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET)
01265   {
01266     bitstatus = SET;
01267   }
01268   else
01269   {
01270     bitstatus = RESET;
01271   }
01272   /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */
01273   return bitstatus; 
01274 }
01275 
01290 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
01291 {
01292 #ifdef STM32F10X_XL
01293   /* Check the parameters */
01294   assert_param(IS_FLASH_IT(FLASH_IT)); 
01295   assert_param(IS_FUNCTIONAL_STATE(NewState));
01296 
01297   if((FLASH_IT & 0x80000000) != 0x0)
01298   {
01299     if(NewState != DISABLE)
01300     {
01301       /* Enable the interrupt sources */
01302       FLASH->CR2 |= (FLASH_IT & 0x7FFFFFFF);
01303     }
01304     else
01305     {
01306       /* Disable the interrupt sources */
01307       FLASH->CR2 &= ~(uint32_t)(FLASH_IT & 0x7FFFFFFF);
01308     }
01309   }
01310   else
01311   {
01312     if(NewState != DISABLE)
01313     {
01314       /* Enable the interrupt sources */
01315       FLASH->CR |= FLASH_IT;
01316     }
01317     else
01318     {
01319       /* Disable the interrupt sources */
01320       FLASH->CR &= ~(uint32_t)FLASH_IT;
01321     }
01322   }
01323 #else
01324   /* Check the parameters */
01325   assert_param(IS_FLASH_IT(FLASH_IT)); 
01326   assert_param(IS_FUNCTIONAL_STATE(NewState));
01327 
01328   if(NewState != DISABLE)
01329   {
01330     /* Enable the interrupt sources */
01331     FLASH->CR |= FLASH_IT;
01332   }
01333   else
01334   {
01335     /* Disable the interrupt sources */
01336     FLASH->CR &= ~(uint32_t)FLASH_IT;
01337   }
01338 #endif /* STM32F10X_XL */
01339 }
01340 
01357 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
01358 {
01359   FlagStatus bitstatus = RESET;
01360 
01361 #ifdef STM32F10X_XL
01362   /* Check the parameters */
01363   assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
01364   if(FLASH_FLAG == FLASH_FLAG_OPTERR) 
01365   {
01366     if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET)
01367     {
01368       bitstatus = SET;
01369     }
01370     else
01371     {
01372       bitstatus = RESET;
01373     }
01374   }
01375   else
01376   {
01377     if((FLASH_FLAG & 0x80000000) != 0x0)
01378     {
01379       if((FLASH->SR2 & FLASH_FLAG) != (uint32_t)RESET)
01380       {
01381         bitstatus = SET;
01382       }
01383       else
01384       {
01385         bitstatus = RESET;
01386       }
01387     }
01388     else
01389     {
01390       if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
01391       {
01392         bitstatus = SET;
01393       }
01394       else
01395       {
01396         bitstatus = RESET;
01397       }
01398     }
01399   }
01400 #else
01401   /* Check the parameters */
01402   assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
01403   if(FLASH_FLAG == FLASH_FLAG_OPTERR) 
01404   {
01405     if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET)
01406     {
01407       bitstatus = SET;
01408     }
01409     else
01410     {
01411       bitstatus = RESET;
01412     }
01413   }
01414   else
01415   {
01416    if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
01417     {
01418       bitstatus = SET;
01419     }
01420     else
01421     {
01422       bitstatus = RESET;
01423     }
01424   }
01425 #endif /* STM32F10X_XL */
01426 
01427   /* Return the new state of FLASH_FLAG (SET or RESET) */
01428   return bitstatus;
01429 }
01430 
01443 void FLASH_ClearFlag(uint32_t FLASH_FLAG)
01444 {
01445 #ifdef STM32F10X_XL
01446   /* Check the parameters */
01447   assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
01448 
01449   if((FLASH_FLAG & 0x80000000) != 0x0)
01450   {
01451     /* Clear the flags */
01452     FLASH->SR2 = FLASH_FLAG;
01453   }
01454   else
01455   {
01456     /* Clear the flags */
01457     FLASH->SR = FLASH_FLAG;
01458   }  
01459 
01460 #else
01461   /* Check the parameters */
01462   assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
01463   
01464   /* Clear the flags */
01465   FLASH->SR = FLASH_FLAG;
01466 #endif /* STM32F10X_XL */
01467 }
01468 
01477 FLASH_Status FLASH_GetStatus(void)
01478 {
01479   FLASH_Status flashstatus = FLASH_COMPLETE;
01480   
01481   if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) 
01482   {
01483     flashstatus = FLASH_BUSY;
01484   }
01485   else 
01486   {  
01487     if((FLASH->SR & FLASH_FLAG_PGERR) != 0)
01488     { 
01489       flashstatus = FLASH_ERROR_PG;
01490     }
01491     else 
01492     {
01493       if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 )
01494       {
01495         flashstatus = FLASH_ERROR_WRP;
01496       }
01497       else
01498       {
01499         flashstatus = FLASH_COMPLETE;
01500       }
01501     }
01502   }
01503   /* Return the Flash Status */
01504   return flashstatus;
01505 }
01506 
01515 FLASH_Status FLASH_GetBank1Status(void)
01516 {
01517   FLASH_Status flashstatus = FLASH_COMPLETE;
01518   
01519   if((FLASH->SR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY) 
01520   {
01521     flashstatus = FLASH_BUSY;
01522   }
01523   else 
01524   {  
01525     if((FLASH->SR & FLASH_FLAG_BANK1_PGERR) != 0)
01526     { 
01527       flashstatus = FLASH_ERROR_PG;
01528     }
01529     else 
01530     {
01531       if((FLASH->SR & FLASH_FLAG_BANK1_WRPRTERR) != 0 )
01532       {
01533         flashstatus = FLASH_ERROR_WRP;
01534       }
01535       else
01536       {
01537         flashstatus = FLASH_COMPLETE;
01538       }
01539     }
01540   }
01541   /* Return the Flash Status */
01542   return flashstatus;
01543 }
01544 
01545 #ifdef STM32F10X_XL
01546 
01553 FLASH_Status FLASH_GetBank2Status(void)
01554 {
01555   FLASH_Status flashstatus = FLASH_COMPLETE;
01556   
01557   if((FLASH->SR2 & (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) 
01558   {
01559     flashstatus = FLASH_BUSY;
01560   }
01561   else 
01562   {  
01563     if((FLASH->SR2 & (FLASH_FLAG_BANK2_PGERR & 0x7FFFFFFF)) != 0)
01564     { 
01565       flashstatus = FLASH_ERROR_PG;
01566     }
01567     else 
01568     {
01569       if((FLASH->SR2 & (FLASH_FLAG_BANK2_WRPRTERR & 0x7FFFFFFF)) != 0 )
01570       {
01571         flashstatus = FLASH_ERROR_WRP;
01572       }
01573       else
01574       {
01575         flashstatus = FLASH_COMPLETE;
01576       }
01577     }
01578   }
01579   /* Return the Flash Status */
01580   return flashstatus;
01581 }
01582 #endif /* STM32F10X_XL */
01583 
01595 FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout)
01596 { 
01597   FLASH_Status status = FLASH_COMPLETE;
01598    
01599   /* Check for the Flash Status */
01600   status = FLASH_GetBank1Status();
01601   /* Wait for a Flash operation to complete or a TIMEOUT to occur */
01602   while((status == FLASH_BUSY) && (Timeout != 0x00))
01603   {
01604     status = FLASH_GetBank1Status();
01605     Timeout--;
01606   }
01607   if(Timeout == 0x00 )
01608   {
01609     status = FLASH_TIMEOUT;
01610   }
01611   /* Return the operation status */
01612   return status;
01613 }
01614 
01623 FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout)
01624 { 
01625   FLASH_Status status = FLASH_COMPLETE;
01626    
01627   /* Check for the Flash Status */
01628   status = FLASH_GetBank1Status();
01629   /* Wait for a Flash operation to complete or a TIMEOUT to occur */
01630   while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00))
01631   {
01632     status = FLASH_GetBank1Status();
01633     Timeout--;
01634   }
01635   if(Timeout == 0x00 )
01636   {
01637     status = FLASH_TIMEOUT;
01638   }
01639   /* Return the operation status */
01640   return status;
01641 }
01642 
01643 #ifdef STM32F10X_XL
01644 
01651 FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout)
01652 { 
01653   FLASH_Status status = FLASH_COMPLETE;
01654    
01655   /* Check for the Flash Status */
01656   status = FLASH_GetBank2Status();
01657   /* Wait for a Flash operation to complete or a TIMEOUT to occur */
01658   while((status == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) && (Timeout != 0x00))
01659   {
01660     status = FLASH_GetBank2Status();
01661     Timeout--;
01662   }
01663   if(Timeout == 0x00 )
01664   {
01665     status = FLASH_TIMEOUT;
01666   }
01667   /* Return the operation status */
01668   return status;
01669 }
01670 #endif /* STM32F10X_XL */
01671 
01684 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/