Defines
#define	CEC_OFFSET (CEC_BASE - PERIPH_BASE)
#define	CFGR_OFFSET (CEC_OFFSET + 0x00)
#define	PE_BitNumber 0x00
#define	CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4))
#define	IE_BitNumber 0x01
#define	CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4))
#define	CSR_OFFSET (CEC_OFFSET + 0x10)
#define	TSOM_BitNumber 0x00
#define	CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4))
#define	TEOM_BitNumber 0x01
#define	CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4))
#define	CFGR_CLEAR_Mask (uint8_t)(0xF3)
#define	FLAG_Mask ((uint32_t)0x00FFFFFF)

Define Documentation

#define CEC_OFFSET (CEC_BASE - PERIPH_BASE)

Definition at line 49 of file stm32f10x_cec.c.

#define CFGR_CLEAR_Mask (uint8_t)(0xF3)

Definition at line 73 of file stm32f10x_cec.c.

#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4))

Definition at line 60 of file stm32f10x_cec.c.

#define CFGR_OFFSET (CEC_OFFSET + 0x00)

Definition at line 54 of file stm32f10x_cec.c.

#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4))

Definition at line 56 of file stm32f10x_cec.c.

#define CSR_OFFSET (CEC_OFFSET + 0x10)

Definition at line 65 of file stm32f10x_cec.c.

#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4))

Definition at line 71 of file stm32f10x_cec.c.

#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4))

Definition at line 67 of file stm32f10x_cec.c.

#define FLAG_Mask ((uint32_t)0x00FFFFFF)

Definition at line 74 of file stm32f10x_cec.c.

#define IE_BitNumber 0x01

Definition at line 59 of file stm32f10x_cec.c.

#define PE_BitNumber 0x00

Definition at line 55 of file stm32f10x_cec.c.

#define TEOM_BitNumber 0x01

Definition at line 70 of file stm32f10x_cec.c.

#define TSOM_BitNumber 0x00

Definition at line 66 of file stm32f10x_cec.c.

Defines