STM32F10x Standard Peripherals Library  3.5.0
/opt/STM32F10x_StdPeriph_Lib_V3.5.0/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c
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00001 
00022 /* Includes ------------------------------------------------------------------*/
00023 #include "stm32f10x_gpio.h"
00024 #include "stm32f10x_rcc.h"
00025 
00047 /* ------------ RCC registers bit address in the alias region ----------------*/
00048 #define AFIO_OFFSET                 (AFIO_BASE - PERIPH_BASE)
00049 
00050 /* --- EVENTCR Register -----*/
00051 
00052 /* Alias word address of EVOE bit */
00053 #define EVCR_OFFSET                 (AFIO_OFFSET + 0x00)
00054 #define EVOE_BitNumber              ((uint8_t)0x07)
00055 #define EVCR_EVOE_BB                (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
00056 
00057 
00058 /* ---  MAPR Register ---*/ 
00059 /* Alias word address of MII_RMII_SEL bit */ 
00060 #define MAPR_OFFSET                 (AFIO_OFFSET + 0x04) 
00061 #define MII_RMII_SEL_BitNumber      ((u8)0x17) 
00062 #define MAPR_MII_RMII_SEL_BB        (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
00063 
00064 
00065 #define EVCR_PORTPINCONFIG_MASK     ((uint16_t)0xFF80)
00066 #define LSB_MASK                    ((uint16_t)0xFFFF)
00067 #define DBGAFR_POSITION_MASK        ((uint32_t)0x000F0000)
00068 #define DBGAFR_SWJCFG_MASK          ((uint32_t)0xF0FFFFFF)
00069 #define DBGAFR_LOCATION_MASK        ((uint32_t)0x00200000)
00070 #define DBGAFR_NUMBITS_MASK         ((uint32_t)0x00100000)
00071 
00108 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
00109 {
00110   /* Check the parameters */
00111   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00112   
00113   if (GPIOx == GPIOA)
00114   {
00115     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
00116     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
00117   }
00118   else if (GPIOx == GPIOB)
00119   {
00120     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
00121     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
00122   }
00123   else if (GPIOx == GPIOC)
00124   {
00125     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
00126     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
00127   }
00128   else if (GPIOx == GPIOD)
00129   {
00130     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
00131     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
00132   }    
00133   else if (GPIOx == GPIOE)
00134   {
00135     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
00136     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
00137   } 
00138   else if (GPIOx == GPIOF)
00139   {
00140     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
00141     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
00142   }
00143   else
00144   {
00145     if (GPIOx == GPIOG)
00146     {
00147       RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
00148       RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
00149     }
00150   }
00151 }
00152 
00159 void GPIO_AFIODeInit(void)
00160 {
00161   RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
00162   RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
00163 }
00164 
00173 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
00174 {
00175   uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
00176   uint32_t tmpreg = 0x00, pinmask = 0x00;
00177   /* Check the parameters */
00178   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00179   assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
00180   assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));  
00181   
00182 /*---------------------------- GPIO Mode Configuration -----------------------*/
00183   currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
00184   if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
00185   { 
00186     /* Check the parameters */
00187     assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
00188     /* Output mode */
00189     currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
00190   }
00191 /*---------------------------- GPIO CRL Configuration ------------------------*/
00192   /* Configure the eight low port pins */
00193   if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
00194   {
00195     tmpreg = GPIOx->CRL;
00196     for (pinpos = 0x00; pinpos < 0x08; pinpos++)
00197     {
00198       pos = ((uint32_t)0x01) << pinpos;
00199       /* Get the port pins position */
00200       currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
00201       if (currentpin == pos)
00202       {
00203         pos = pinpos << 2;
00204         /* Clear the corresponding low control register bits */
00205         pinmask = ((uint32_t)0x0F) << pos;
00206         tmpreg &= ~pinmask;
00207         /* Write the mode configuration in the corresponding bits */
00208         tmpreg |= (currentmode << pos);
00209         /* Reset the corresponding ODR bit */
00210         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00211         {
00212           GPIOx->BRR = (((uint32_t)0x01) << pinpos);
00213         }
00214         else
00215         {
00216           /* Set the corresponding ODR bit */
00217           if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00218           {
00219             GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
00220           }
00221         }
00222       }
00223     }
00224     GPIOx->CRL = tmpreg;
00225   }
00226 /*---------------------------- GPIO CRH Configuration ------------------------*/
00227   /* Configure the eight high port pins */
00228   if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
00229   {
00230     tmpreg = GPIOx->CRH;
00231     for (pinpos = 0x00; pinpos < 0x08; pinpos++)
00232     {
00233       pos = (((uint32_t)0x01) << (pinpos + 0x08));
00234       /* Get the port pins position */
00235       currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
00236       if (currentpin == pos)
00237       {
00238         pos = pinpos << 2;
00239         /* Clear the corresponding high control register bits */
00240         pinmask = ((uint32_t)0x0F) << pos;
00241         tmpreg &= ~pinmask;
00242         /* Write the mode configuration in the corresponding bits */
00243         tmpreg |= (currentmode << pos);
00244         /* Reset the corresponding ODR bit */
00245         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00246         {
00247           GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
00248         }
00249         /* Set the corresponding ODR bit */
00250         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00251         {
00252           GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
00253         }
00254       }
00255     }
00256     GPIOx->CRH = tmpreg;
00257   }
00258 }
00259 
00266 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
00267 {
00268   /* Reset GPIO init structure parameters values */
00269   GPIO_InitStruct->GPIO_Pin  = GPIO_Pin_All;
00270   GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
00271   GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
00272 }
00273 
00281 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00282 {
00283   uint8_t bitstatus = 0x00;
00284   
00285   /* Check the parameters */
00286   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00287   assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 
00288   
00289   if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
00290   {
00291     bitstatus = (uint8_t)Bit_SET;
00292   }
00293   else
00294   {
00295     bitstatus = (uint8_t)Bit_RESET;
00296   }
00297   return bitstatus;
00298 }
00299 
00305 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
00306 {
00307   /* Check the parameters */
00308   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00309   
00310   return ((uint16_t)GPIOx->IDR);
00311 }
00312 
00320 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00321 {
00322   uint8_t bitstatus = 0x00;
00323   /* Check the parameters */
00324   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00325   assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 
00326   
00327   if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
00328   {
00329     bitstatus = (uint8_t)Bit_SET;
00330   }
00331   else
00332   {
00333     bitstatus = (uint8_t)Bit_RESET;
00334   }
00335   return bitstatus;
00336 }
00337 
00343 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
00344 {
00345   /* Check the parameters */
00346   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00347     
00348   return ((uint16_t)GPIOx->ODR);
00349 }
00350 
00358 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00359 {
00360   /* Check the parameters */
00361   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00362   assert_param(IS_GPIO_PIN(GPIO_Pin));
00363   
00364   GPIOx->BSRR = GPIO_Pin;
00365 }
00366 
00374 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00375 {
00376   /* Check the parameters */
00377   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00378   assert_param(IS_GPIO_PIN(GPIO_Pin));
00379   
00380   GPIOx->BRR = GPIO_Pin;
00381 }
00382 
00394 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
00395 {
00396   /* Check the parameters */
00397   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00398   assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
00399   assert_param(IS_GPIO_BIT_ACTION(BitVal)); 
00400   
00401   if (BitVal != Bit_RESET)
00402   {
00403     GPIOx->BSRR = GPIO_Pin;
00404   }
00405   else
00406   {
00407     GPIOx->BRR = GPIO_Pin;
00408   }
00409 }
00410 
00417 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
00418 {
00419   /* Check the parameters */
00420   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00421   
00422   GPIOx->ODR = PortVal;
00423 }
00424 
00432 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00433 {
00434   uint32_t tmp = 0x00010000;
00435   
00436   /* Check the parameters */
00437   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00438   assert_param(IS_GPIO_PIN(GPIO_Pin));
00439   
00440   tmp |= GPIO_Pin;
00441   /* Set LCKK bit */
00442   GPIOx->LCKR = tmp;
00443   /* Reset LCKK bit */
00444   GPIOx->LCKR =  GPIO_Pin;
00445   /* Set LCKK bit */
00446   GPIOx->LCKR = tmp;
00447   /* Read LCKK bit*/
00448   tmp = GPIOx->LCKR;
00449   /* Read LCKK bit*/
00450   tmp = GPIOx->LCKR;
00451 }
00452 
00462 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
00463 {
00464   uint32_t tmpreg = 0x00;
00465   /* Check the parameters */
00466   assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
00467   assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
00468     
00469   tmpreg = AFIO->EVCR;
00470   /* Clear the PORT[6:4] and PIN[3:0] bits */
00471   tmpreg &= EVCR_PORTPINCONFIG_MASK;
00472   tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
00473   tmpreg |= GPIO_PinSource;
00474   AFIO->EVCR = tmpreg;
00475 }
00476 
00483 void GPIO_EventOutputCmd(FunctionalState NewState)
00484 {
00485   /* Check the parameters */
00486   assert_param(IS_FUNCTIONAL_STATE(NewState));
00487   
00488   *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
00489 }
00490 
00549 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
00550 {
00551   uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
00552 
00553   /* Check the parameters */
00554   assert_param(IS_GPIO_REMAP(GPIO_Remap));
00555   assert_param(IS_FUNCTIONAL_STATE(NewState));  
00556   
00557   if((GPIO_Remap & 0x80000000) == 0x80000000)
00558   {
00559     tmpreg = AFIO->MAPR2;
00560   }
00561   else
00562   {
00563     tmpreg = AFIO->MAPR;
00564   }
00565 
00566   tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
00567   tmp = GPIO_Remap & LSB_MASK;
00568 
00569   if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
00570   {
00571     tmpreg &= DBGAFR_SWJCFG_MASK;
00572     AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
00573   }
00574   else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
00575   {
00576     tmp1 = ((uint32_t)0x03) << tmpmask;
00577     tmpreg &= ~tmp1;
00578     tmpreg |= ~DBGAFR_SWJCFG_MASK;
00579   }
00580   else
00581   {
00582     tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
00583     tmpreg |= ~DBGAFR_SWJCFG_MASK;
00584   }
00585 
00586   if (NewState != DISABLE)
00587   {
00588     tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
00589   }
00590 
00591   if((GPIO_Remap & 0x80000000) == 0x80000000)
00592   {
00593     AFIO->MAPR2 = tmpreg;
00594   }
00595   else
00596   {
00597     AFIO->MAPR = tmpreg;
00598   }  
00599 }
00600 
00609 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
00610 {
00611   uint32_t tmp = 0x00;
00612   /* Check the parameters */
00613   assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
00614   assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
00615   
00616   tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
00617   AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
00618   AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
00619 }
00620 
00630 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) 
00631 { 
00632   assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); 
00633 
00634   /* Configure MII_RMII selection bit */ 
00635   *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; 
00636 }
00637   
00650 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/